From nobody Thu Apr 9 13:37:44 2026 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A7EFC3EBF07; Fri, 27 Feb 2026 06:44:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772174688; cv=none; b=NhmB1yGGmib4lUOD1QNFTO36EcqEj8kmyND0TvWKsSheXQD+a3PzugUNg17qiP4XKPC8GmXYsqDZwvHHKVR8LFcvx/6acGnvFQ7SjA3iqe4AaYYnpaOK3HutUgNo0x4A9bqulvjG+LoHJp4uXK8rBc9aOO5k5WELWuHuYD8XhBQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772174688; c=relaxed/simple; bh=MsK41lHUHc/yAdslHPs0q9i5ib5Ft1iliGOxwDrf3Kg=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=oxbaH7pf11a8z4bXC8+3lTSz17NA7X8shORmZ4CAzRjemYertTCJXvv2wZr6oX1Ql/y2U8Oz4vcvAb/EXA78yphD6UFD4CJGnXZWKKCaovQzFDlWi5aW9AOGH68+BTZHBJoYQ+VBRt19nKhuBTdHPC46KyYPlEqF7qpVX07f6H0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de; spf=pass smtp.mailfrom=linutronix.de; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=JnWzCg7D; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=tHlKNh6w; arc=none smtp.client-ip=193.142.43.55 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linutronix.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="JnWzCg7D"; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="tHlKNh6w" From: =?utf-8?q?Thomas_Wei=C3=9Fschuh?= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1772174684; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=XmucPrbDNMsefUcsKOtEJFfiebQUYcBxKvPhHkOrNBw=; b=JnWzCg7DEKYV2bv5K6E3fL2KDMQNza16vhQQfVP9nF3iJ/IoUaCDlBDz/d70U96JL4bnVy FjwNJ9HQBFViBxVX1Gf7tt25uFpAoDTwROf+MbHrNcMSCO2BKHTCiQ4FDqgpqOCTQFrdvf mGFzCCzjqfkLAEB+zSGT49adTuUHlugoT/PoXH4w67QEc3b3R9T1OWTP5SBlly1FzZ6+j8 VQwAmWJkDUJaNh8453C/m5M/+IY2xg1jbnSi6PezuKdBjZ29sBF1qsT0JlbnUo664I0cGP okw1YIVfE58WIO6J75t6Hq77Do+5U/qzPqrwmdKbX0dTaMNdCohQ6L7r3AdNcg== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1772174684; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=XmucPrbDNMsefUcsKOtEJFfiebQUYcBxKvPhHkOrNBw=; b=tHlKNh6wS5kvkLXvS6aQz/UTvClSXPsl2MOfkm2W3fc7sbbFTwrKKMB7iR+WUCpFSo/B4Z EWK+/op+KpFGrVCQ== Date: Fri, 27 Feb 2026 07:44:31 +0100 Subject: [PATCH v2 05/15] powerpc/vdso: Explicitly include asm/cputable.h and asm/feature-fixups.h Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260227-vdso-header-cleanups-v2-5-35d60acf7410@linutronix.de> References: <20260227-vdso-header-cleanups-v2-0-35d60acf7410@linutronix.de> In-Reply-To: <20260227-vdso-header-cleanups-v2-0-35d60acf7410@linutronix.de> To: Catalin Marinas , Will Deacon , Russell King , Madhavan Srinivasan , Michael Ellerman , Nicholas Piggin , "Christophe Leroy (CS GROUP)" , Huacai Chen , WANG Xuerui , Thomas Bogendoerfer , Andy Lutomirski , Thomas Gleixner , Vincenzo Frascino , Theodore Ts'o , "Jason A. Donenfeld" Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, loongarch@lists.linux.dev, linux-mips@vger.kernel.org, =?utf-8?q?Thomas_Wei=C3=9Fschuh?= , Christophe Leroy X-Developer-Signature: v=1; a=ed25519-sha256; t=1772174681; l=993; i=thomas.weissschuh@linutronix.de; s=20240209; h=from:subject:message-id; bh=MsK41lHUHc/yAdslHPs0q9i5ib5Ft1iliGOxwDrf3Kg=; b=TfyA4IzI496eXTs3L/06kAAhPp3mHtun65YNoMVIs2Yhuq39YNDXrVKmQsQU6Y4LdaAnU2PQ0 aCTV6rcrMRYADzKJ1REKA2yV8qrugygffNHq4VkMModR+niBGWTNBiB X-Developer-Key: i=thomas.weissschuh@linutronix.de; a=ed25519; pk=pfvxvpFUDJV2h2nY0FidLUml22uGLSjByFbM6aqQQws= The usage of ASM_FTR_IFCLR(CPU_TR_ARCH_31) requires asm/cputable.h and asm/feature-fixups.h. Currently these headers are included transitively, but that transitive inclusion is about to go away. Explicitly include the headers. Signed-off-by: Thomas Wei=C3=9Fschuh Reviewed-by: Christophe Leroy --- arch/powerpc/include/asm/vdso/processor.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/powerpc/include/asm/vdso/processor.h b/arch/powerpc/inclu= de/asm/vdso/processor.h index c1f3d7aaf3ee..4c6802c3a580 100644 --- a/arch/powerpc/include/asm/vdso/processor.h +++ b/arch/powerpc/include/asm/vdso/processor.h @@ -4,6 +4,9 @@ =20 #ifndef __ASSEMBLER__ =20 +#include +#include + /* Macros for adjusting thread priority (hardware multi-threading) */ #ifdef CONFIG_PPC64 #define HMT_very_low() asm volatile("or 31, 31, 31 # very low priority") --=20 2.53.0