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Fri, 27 Feb 2026 06:11:53 -0800 (PST) Received: from hu-vgarodia-hyd.qualcomm.com ([202.46.23.25]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2adfb5c183bsm60960865ad.24.2026.02.27.06.11.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 Feb 2026 06:11:52 -0800 (PST) From: Vikash Garodia Date: Fri, 27 Feb 2026 19:41:17 +0530 Subject: [PATCH v2 1/7] media: dt-bindings: qcom-kaanapali-iris: Add kaanapali video codec binding Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260227-kaanapali-iris-v2-1-850043ac3933@oss.qualcomm.com> References: <20260227-kaanapali-iris-v2-0-850043ac3933@oss.qualcomm.com> In-Reply-To: <20260227-kaanapali-iris-v2-0-850043ac3933@oss.qualcomm.com> To: Dikshita Agarwal , Abhinav Kumar , Bryan O'Donoghue , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Saravana Kannan , Joerg Roedel , Will Deacon , Robin Murphy , Stefan Schmidt , Hans Verkuil , Krzysztof Kozlowski , Vishnu Reddy , Hans Verkuil Cc: linux-arm-msm@vger.kernel.org, linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, iommu@lists.linux.dev, Bryan O'Donoghue , Vikash Garodia X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; 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When compared to previous generation, iris3x, it has, - separate power domains for stream and pixel processing hardware blocks (bse and vpp). - additional power domain for apv codec. - power domains for individual pipes (VPPx). - different clocks and reset lines. iommu-map include all the different stream-ids which can be possibly generated by vpu4 hardware as below, bitstream stream from vcodec non-pixel stream from vcodec non-pixel stream from tensilica pixel stream from vcodec secure bitstream stream from vcodec secure non-pixel stream from vcodec secure non-pixel stream from tensilica secure pixel stream from vcodec firmware stream from tensilica (might be handled by the TZ / hyp) This patch is depend on the below dt-schema patch. Link: https://github.com/devicetree-org/dt-schema/pull/184/changes/d341298d= 62805bc972dfba691da6b3b62aa3ff15 Signed-off-by: Vikash Garodia --- .../bindings/media/qcom,kaanapali-iris.yaml | 261 +++++++++++++++++= ++++ include/dt-bindings/media/qcom,iris.h | 18 ++ 2 files changed, 279 insertions(+) diff --git a/Documentation/devicetree/bindings/media/qcom,kaanapali-iris.ya= ml b/Documentation/devicetree/bindings/media/qcom,kaanapali-iris.yaml new file mode 100644 index 0000000000000000000000000000000000000000..db734c664a0417d8f5ea55b066f= 63f42583b1c14 --- /dev/null +++ b/Documentation/devicetree/bindings/media/qcom,kaanapali-iris.yaml @@ -0,0 +1,261 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/qcom,kaanapali-iris.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Kaanapali Iris video encoder and decoder + +maintainers: + - Vikash Garodia + - Dikshita Agarwal + +description: + The iris video processing unit is a video encode and decode accelerator + present on Qualcomm Kaanapali SoC. + +definitions: + iommu-types: + items: + - description: Function ID + - description: Phandle to IOMMU + - description: IOMMU stream ID base + - description: IOMMU stream ID mask + - description: Number of stream IDs + +properties: + compatible: + const: qcom,kaanapali-iris + + reg: + maxItems: 1 + + clocks: + maxItems: 10 + + clock-names: + items: + - const: iface + - const: core + - const: vcodec0_core + - const: iface1 + - const: core_freerun + - const: vcodec0_core_freerun + - const: vcodec_bse + - const: vcodec_vpp0 + - const: vcodec_vpp1 + - const: vcodec_apv + + dma-coherent: true + + firmware-name: + maxItems: 1 + + interconnects: + maxItems: 2 + + interconnect-names: + items: + - const: cpu-cfg + - const: video-mem + + interrupts: + maxItems: 1 + + iommu-map: + description: | + - bitstream stream from vcodec + - non-pixel stream from vcodec + - non-pixel stream from tensilica + - pixel stream from vcodec + - secure bitstream stream from vcodec + - secure non-pixel stream from vcodec + - secure non-pixel stream from tensilica + - secure pixel stream from vcodec + # firmware might be handled by the TZ / hyp + - firmware stream from tensilica + $ref: /schemas/types.yaml#/definitions/uint32-matrix + items: + $ref: '#/definitions/iommu-types' + minItems: 5 + minItems: 8 + maxItems: 9 + + memory-region: + maxItems: 1 + + operating-points-v2: true + opp-table: + type: object + + power-domains: + maxItems: 7 + + power-domain-names: + items: + - const: venus + - const: vcodec0 + - const: mxc + - const: mmcx + - const: vpp0 + - const: vpp1 + - const: apv + + resets: + maxItems: 4 + + reset-names: + items: + - const: bus0 + - const: bus1 + - const: core + - const: vcodec0_core + +required: + - compatible + - reg + - clocks + - clock-names + - dma-coherent + - interconnects + - interconnect-names + - interrupts + - iommu-map + - memory-region + - power-domains + - power-domain-names + - resets + - reset-names + +unevaluatedProperties: false + +examples: + - | + #include + #include + #include + + video-codec@2000000 { + compatible =3D "qcom,kaanapali-iris"; + reg =3D <0x02000000 0xf0000>; + + clocks =3D <&gcc_video_axi0_clk>, + <&video_cc_mvs0c_clk>, + <&video_cc_mvs0_clk>, + <&gcc_video_axi1_clk>, + <&video_cc_mvs0c_freerun_clk>, + <&video_cc_mvs0_freerun_clk>, + <&video_cc_mvs0b_clk>, + <&video_cc_mvs0_vpp0_clk>, + <&video_cc_mvs0_vpp1_clk>, + <&video_cc_mvs0a_clk>; + clock-names =3D "iface", + "core", + "vcodec0_core", + "iface1", + "core_freerun", + "vcodec0_core_freerun", + "vcodec_bse", + "vcodec_vpp0", + "vcodec_vpp1", + "vcodec_apv"; + + dma-coherent; + + interconnects =3D <&gem_noc_master_appss_proc &config_noc_slave_ve= nus_cfg>, + <&mmss_noc_master_video_mvp &mc_virt_slave_ebi1>; + interconnect-names =3D "cpu-cfg", + "video-mem"; + + interrupts =3D ; + + iommu-map =3D , + , + , + , + , + , + , + , + ; + + memory-region =3D <&video_mem>; + + operating-points-v2 =3D <&iris_opp_table>; + + power-domains =3D <&video_cc_mvs0c_gdsc>, + <&video_cc_mvs0_gdsc>, + <&rpmhpd RPMHPD_MXC>, + <&rpmhpd RPMHPD_MMCX>, + <&video_cc_mvs0_vpp0_gdsc>, + <&video_cc_mvs0_vpp1_gdsc>, + <&video_cc_mvs0a_gdsc>; + power-domain-names =3D "venus", + "vcodec0", + "mxc", + "mmcx", + "vpp0", + "vpp1", + "apv"; + + resets =3D <&gcc_video_axi0_clk_ares>, + <&gcc_video_axi1_clk_ares>, + <&video_cc_mvs0c_freerun_clk_ares>, + <&video_cc_mvs0_freerun_clk_ares>; + reset-names =3D "bus0", + "bus1", + "core", + "vcodec0_core"; + + iris_opp_table: opp-table { + compatible =3D "operating-points-v2"; + + opp-240000000 { + opp-hz =3D /bits/ 64 <240000000 240000000 240000000 360000= 000>; + required-opps =3D <&rpmhpd_opp_low_svs_d1>, + <&rpmhpd_opp_low_svs_d1>; + }; + + opp-338000000 { + opp-hz =3D /bits/ 64 <338000000 338000000 338000000 507000= 000>; + required-opps =3D <&rpmhpd_opp_low_svs>, + <&rpmhpd_opp_low_svs>; + }; + + opp-420000000 { + opp-hz =3D /bits/ 64 <420000000 420000000 420000000 630000= 000>; + required-opps =3D <&rpmhpd_opp_svs>, + <&rpmhpd_opp_svs>; + }; + + opp-444000000 { + opp-hz =3D /bits/ 64 <444000000 444000000 444000000 666000= 000>; + required-opps =3D <&rpmhpd_opp_svs_l1>, + <&rpmhpd_opp_svs_l1>; + }; + + opp-533000000 { + opp-hz =3D /bits/ 64 <533000000 533000000 533000000 800000= 000>; + required-opps =3D <&rpmhpd_opp_nom>, + <&rpmhpd_opp_nom>; + }; + + opp-630000000 { + opp-hz =3D /bits/ 64 <630000000 630000000 630000000 110400= 0000>; + required-opps =3D <&rpmhpd_opp_turbo>, + <&rpmhpd_opp_turbo>; + }; + + opp-800000000 { + opp-hz =3D /bits/ 64 <800000000 630000000 630000000 126000= 0000>; + required-opps =3D <&rpmhpd_opp_turbo_l0>, + <&rpmhpd_opp_turbo_l0>; + }; + + opp-1000000000 { + opp-hz =3D /bits/ 64 <1000000000 630000000 850000000 12600= 00000>; + required-opps =3D <&rpmhpd_opp_turbo_l1>, + <&rpmhpd_opp_turbo_l1>; + }; + }; + }; diff --git a/include/dt-bindings/media/qcom,iris.h b/include/dt-bindings/me= dia/qcom,iris.h new file mode 100644 index 0000000000000000000000000000000000000000..beb244289466ca938c7e5fe5cf1= 5526f606a3a6c --- /dev/null +++ b/include/dt-bindings/media/qcom,iris.h @@ -0,0 +1,18 @@ +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +#ifndef _DT_BINDINGS_MEDIA_QCOM_IRIS_H +#define _DT_BINDINGS_MEDIA_QCOM_IRIS_H + +/* Function identifiers for iommu-map to attach for the context bank devic= es */ +#define IRIS_BITSTREAM 0x100 +#define IRIS_NON_PIXEL 0x101 +#define IRIS_PIXEL 0x102 +#define IRIS_SECURE_BITSTREAM 0x200 +#define IRIS_SECURE_NON_PIXEL 0x201 +#define IRIS_SECURE_PIXEL 0x202 +#define IRIS_FIRMWARE 0x300 + +#endif --=20 2.34.1