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a=openpgp; fpr=6AFF162D57F4223A8770EF5AF7BF214136F41FAE X-Proofpoint-ORIG-GUID: 0l3noIVBjz__hdZJ-nZlNM91wgRBhqLe X-Proofpoint-GUID: 0l3noIVBjz__hdZJ-nZlNM91wgRBhqLe X-Authority-Analysis: v=2.4 cv=DOqCIiNb c=1 sm=1 tr=0 ts=69a1a8d1 cx=c_pps a=50t2pK5VMbmlHzFWWp8p/g==:117 a=oauzzCmhM186DRC0Y2yWPg==:17 a=IkcTkHD0fZMA:10 a=HzLeVaNsDn8A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=eoimf2acIAo5FJnRuUoq:22 a=VwQbUJbxAAAA:8 a=EUspDBNiAAAA:8 a=feC5BgBSBr5ATEYaNTcA:9 a=QEXdDO2ut3YA:10 a=IoWCM6iH3mJn3m4BftBB:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMjI3MDEyNyBTYWx0ZWRfX+xC8+kUETKvX kn0D7atFKF1jaPftGQzzIpecaaRQOwzdW9EtM+d469+BPyZ6Ja7GY46cQL/AvGcQUEe/qkB1URy I8utCw+KMc9EuKiEsCeb6bBglLDuecq2u45EIBD+vourdJzQGMQnhu168+o5ZZyLudxF7cFkVVL w+1/ZXKz2hM2jbFQZoyk/JBhK/A+k3u5s0lH4jUeGpxdc39RKUowJnRsZXiqK5Spl8zfVALYOcF 1tdafZlFIKogln2dKXzh7cOnZJCld2lWPD0EyYNCA32SWkCWE6Ez7CXFcD9TcEEUieQ6MzB1v6S kbybBMuoe+smV7UE7zMCPQCI/BkndJKnJqwbq+UQv1rZ4tmEP2/MYTfuCfrtCQQ3eXmWNrTpK+w 31lFfGz2PwXLZYh80Kf5EcjGqcwgNA4Ash4g4aDrwfcR44lYdlvuNuFXRInOKO2g2La1cTVfgyp rDj+R3QSXNciiQ/7V6g== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-02-27_02,2026-02-27_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 phishscore=0 malwarescore=0 adultscore=0 priorityscore=1501 clxscore=1015 suspectscore=0 impostorscore=0 lowpriorityscore=0 bulkscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2602130000 definitions=main-2602270127 The Glymur platform has four DisplayPort controllers. All the controllers support four streams (MST). However, the first three only have two streams wired up physically to the display subsystem, while the fourth controller has only one stream (SST). So add a dedicated clause for Glymur compatible to enforce reg ranges to describing all four streams while allowing either one pixel clock, for the third DP controller, or two pixel clocks, for the rest of them. Cc: stable@vger.kernel.org # v6.19 Fixes: 8f63bf908213 ("dt-bindings: display: msm: Document the Glymur Diplay= Port controller") Signed-off-by: Abel Vesa --- .../bindings/display/msm/dp-controller.yaml | 21 +++++++++++++++++= +++- 1 file changed, 20 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/display/msm/dp-controller.ya= ml b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml index ebda78db87a6..02ddfaab5f56 100644 --- a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml +++ b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml @@ -253,7 +253,6 @@ allOf: enum: # these platforms support 2 streams MST on some interfaces, # others are SST only - - qcom,glymur-dp - qcom,sc8280xp-dp - qcom,x1e80100-dp then: @@ -310,6 +309,26 @@ allOf: minItems: 6 maxItems: 8 =20 + - if: + properties: + compatible: + contains: + enum: + # these platforms support 2 streams MST on some interfaces, + # others are SST only, but all controllers have 4 ports + - qcom,glymur-dp + then: + properties: + reg: + minItems: 9 + maxItems: 9 + clocks: + minItems: 5 + maxItems: 6 + clocks-names: + minItems: 5 + maxItems: 6 + unevaluatedProperties: false =20 examples: --- base-commit: 7c21b660e919698b10efa8bdb120f0f9bc3d3832 change-id: 20260227-glymur-fix-dp-bindings-reg-clocks-704d0ccbeef9 Best regards, -- =20 Abel Vesa