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Fri, 27 Feb 2026 07:14:45 -0800 (PST) From: Akhila YS Date: Fri, 27 Feb 2026 15:14:31 +0000 Subject: [PATCH v4 1/5] dt-bindings: arm: microchip,sama7g5-chipid : convert to DT schema Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260227-arm-microchip-v4-1-7e2ae1c5b5d6@gmail.com> References: <20260227-arm-microchip-v4-0-7e2ae1c5b5d6@gmail.com> In-Reply-To: <20260227-arm-microchip-v4-0-7e2ae1c5b5d6@gmail.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Nicolas Ferre , Claudiu Beznea , Alexandre Belloni Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Akhila YS , Conor Dooley X-Mailer: b4 0.14.3 Convert Atmel system registers binding to YAML format. Acked-by: Conor Dooley Signed-off-by: Akhila YS Reviewed-by: Claudiu Beznea --- .../devicetree/bindings/arm/atmel-sysregs.txt | 5 --- .../bindings/arm/microchip,sama7g5-chipid.yaml | 41 ++++++++++++++++++= ++++ 2 files changed, 41 insertions(+), 5 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt b/Docu= mentation/devicetree/bindings/arm/atmel-sysregs.txt index 5ce54f9befe6..4ee18112586d 100644 --- a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt +++ b/Documentation/devicetree/bindings/arm/atmel-sysregs.txt @@ -1,10 +1,5 @@ Atmel system registers =20 -Chipid required properties: -- compatible: Should be "atmel,sama5d2-chipid" or "microchip,sama7g5-chipi= d" - "microchip,sama7d65-chipid" -- reg : Should contain registers location and length - PIT Timer required properties: - compatible: Should be "atmel,at91sam9260-pit" - reg: Should contain registers location and length diff --git a/Documentation/devicetree/bindings/arm/microchip,sama7g5-chipid= .yaml b/Documentation/devicetree/bindings/arm/microchip,sama7g5-chipid.yaml new file mode 100644 index 000000000000..4fdb068be929 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/microchip,sama7g5-chipid.yaml @@ -0,0 +1,41 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/microchip,sama7g5-chipid.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Atmel/Microchip RAMC SDRAM/DDR Controller + +maintainers: + - Nicolas Ferre + - Claudiu Beznea + +description: + This binding describes the Atmel/Microchip Chip ID register block used + for SoC identification and revision information. It requires compatible + strings matching specific SoC families and a reg property defining the + register address and size. + +properties: + compatible: + enum: + - atmel,sama5d2-chipid + - microchip,sama7g5-chipid + - microchip,sama7d65-chipid + + reg: + maxItems: 1 + +required: + - compatible + - reg + +unevaluatedProperties: false + +examples: + - | + chipid@fc069000 { + compatible =3D "atmel,sama5d2-chipid"; + reg =3D <0xfc069000 0x8>; + }; +... --=20 2.43.0