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Thu, 26 Feb 2026 08:31:40 -0800 From: Ketan Patil To: , , CC: , , Ketan Patil Subject: [PATCH v7 3/6] memory: tegra: Add support for multiple IRQs Date: Thu, 26 Feb 2026 16:31:12 +0000 Message-ID: <20260226163115.1152181-4-ketanp@nvidia.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20260226163115.1152181-1-ketanp@nvidia.com> References: <20260226163115.1152181-1-ketanp@nvidia.com> X-NVConfidentiality: public Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SA2PEPF00003AEA:EE_|CY8PR12MB8243:EE_ X-MS-Office365-Filtering-Correlation-Id: 7befab44-d1ae-44d6-5d9f-08de755490fe X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700013|1800799024|376014|82310400026; X-Microsoft-Antispam-Message-Info: nruHTIbWHZiDH8s22vOgknNUU1nBzngGPqXcb5Uqm6cLTUDrqJnG2f8KMxMc6Uzbaf/YFFEY99gmqzmb4MYHAQ7nLzOhgteQTzf2qct9SpfrqOvDJa2VfKAmt8l3uV0wgnCU7HkLdm/0/70+bDhDioYe7bNQD5fIZGiw3J/ifW1Z43CW8fQgdvLkfrliHhOxbloBYcSpyl+bb9I43TOtwewgeW1EzIUKGfOW/6LgmQJrGez8KcfmLxHEP48qxsBIx9qrMJyZFqKzKq/nF4+PRHE8l1ZA++DsLrRZEkGtrIPXhE1CQRoF8BinVE5NT381wQmrDvtQd7a8+RHke9LQKHD3zhisd/8TZolPCtlmeNEUYnqpiqc9k+4uN+2i4eAd4ycVNdn8qH3ZjsyRDfYjqtru9QzS4B/c8O5bh88yqjiEGP+pBSK4QLfDbNXk0od5uT+fK3x/COQYosn3JtFxYiPsZH3Emwepf+dMk3CRsgOejf5EcaeO3qYIY/Po4/4YWMFXDc7QwhnaX0F56GIHDoLPWNRqd/hDMEil+8s3AR6jMtYwZsw5SgoINar4eSJiYeeC9T4Z9szuJS2Y5WA9aHiUqMKLmBIJKNCPcpcP+v5hmZ9p+KEyowLHdszMKRus1F+FuOLqlPF5bb8Rp65EbP1KVNzrNm1FuzlThj/65ZStQsapHGDAHuUsmoN+jt/yRkvD2ROTgtm+sR6Fl/bj2ZpZqWKkZruEAZS9VB3BQH1zubuSRgXGH7mJGm+MjIZQweCvgwubh+Q9YGNk+YCQJZ3iawvyM4X30Hj9d4t4bu/88GUFfbzFH7AclQ1Q5UkEq32raF3RWZcQSzgbX4MC9g== X-Forefront-Antispam-Report: CIP:216.228.117.161;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge2.nvidia.com;CAT:NONE;SFS:(13230040)(36860700013)(1800799024)(376014)(82310400026);DIR:OUT;SFP:1101; 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charset="utf-8" Add support to handle multiple MC interrupts lines, as supported by Tegra264. Turn the single IRQ handler callback into a counted array to allow specifying a separate handler for each interrupt. Move IRQ handlers into tegra_mc_soc struct, so as to specify SoC specific values. Signed-off-by: Ketan Patil --- drivers/memory/tegra/mc.c | 34 ++++++++++++++++++++------------- drivers/memory/tegra/mc.h | 1 + drivers/memory/tegra/tegra114.c | 2 ++ drivers/memory/tegra/tegra124.c | 4 ++++ drivers/memory/tegra/tegra186.c | 3 ++- drivers/memory/tegra/tegra194.c | 2 ++ drivers/memory/tegra/tegra20.c | 7 ++++++- drivers/memory/tegra/tegra210.c | 2 ++ drivers/memory/tegra/tegra234.c | 2 ++ drivers/memory/tegra/tegra30.c | 2 ++ include/soc/tegra/mc.h | 8 +++++--- 11 files changed, 49 insertions(+), 18 deletions(-) diff --git a/drivers/memory/tegra/mc.c b/drivers/memory/tegra/mc.c index 1dacbe2aba4e..de988c312342 100644 --- a/drivers/memory/tegra/mc.c +++ b/drivers/memory/tegra/mc.c @@ -398,6 +398,10 @@ unsigned int tegra_mc_get_emem_device_count(struct teg= ra_mc *mc) } EXPORT_SYMBOL_GPL(tegra_mc_get_emem_device_count); =20 +const irq_handler_t tegra30_mc_irq_handlers[] =3D { + tegra30_mc_handle_irq +}; + #if defined(CONFIG_ARCH_TEGRA_3x_SOC) || \ defined(CONFIG_ARCH_TEGRA_114_SOC) || \ defined(CONFIG_ARCH_TEGRA_124_SOC) || \ @@ -551,7 +555,6 @@ int tegra30_mc_probe(struct tegra_mc *mc) =20 const struct tegra_mc_ops tegra30_mc_ops =3D { .probe =3D tegra30_mc_probe, - .handle_irq =3D tegra30_mc_handle_irq, }; #endif =20 @@ -952,26 +955,31 @@ static int tegra_mc_probe(struct platform_device *pde= v) =20 tegra_mc_num_channel_enabled(mc); =20 - if (mc->soc->ops && mc->soc->ops->handle_irq) { - mc->irq =3D platform_get_irq(pdev, 0); - if (mc->irq < 0) - return mc->irq; + if (mc->soc->handle_irq) { + unsigned int i; =20 WARN(!mc->soc->client_id_mask, "missing client ID mask for this SoC\n"); =20 + for (i =3D 0; i < mc->soc->num_interrupts; i++) { + int irq; + + irq =3D platform_get_irq(pdev, i); + if (irq < 0) + return irq; + + err =3D devm_request_irq(&pdev->dev, irq, mc->soc->handle_irq[i], 0, + dev_name(&pdev->dev), mc); + if (err < 0) { + dev_err(&pdev->dev, "failed to request IRQ#%u: %d\n", irq, err); + return err; + } + } + if (mc->soc->num_channels) mc_ch_writel(mc, MC_BROADCAST_CHANNEL, mc->soc->intmask, MC_INTMASK); else mc_writel(mc, mc->soc->intmask, MC_INTMASK); - - err =3D devm_request_irq(&pdev->dev, mc->irq, mc->soc->ops->handle_irq, = 0, - dev_name(&pdev->dev), mc); - if (err < 0) { - dev_err(&pdev->dev, "failed to request IRQ#%u: %d\n", mc->irq, - err); - return err; - } } =20 if (mc->soc->reset_ops) { diff --git a/drivers/memory/tegra/mc.h b/drivers/memory/tegra/mc.h index 5f816d703d81..34ce03ebc51c 100644 --- a/drivers/memory/tegra/mc.h +++ b/drivers/memory/tegra/mc.h @@ -193,6 +193,7 @@ extern const struct tegra_mc_ops tegra186_mc_ops; #endif =20 irqreturn_t tegra30_mc_handle_irq(int irq, void *data); +extern const irq_handler_t tegra30_mc_irq_handlers[1]; extern const char * const tegra_mc_status_names[32]; extern const char * const tegra_mc_error_names[8]; =20 diff --git a/drivers/memory/tegra/tegra114.c b/drivers/memory/tegra/tegra11= 4.c index ea7e4c7bb5f8..fffb28eea57f 100644 --- a/drivers/memory/tegra/tegra114.c +++ b/drivers/memory/tegra/tegra114.c @@ -1115,4 +1115,6 @@ const struct tegra_mc_soc tegra114_mc_soc =3D { .num_resets =3D ARRAY_SIZE(tegra114_mc_resets), .ops =3D &tegra30_mc_ops, .regs =3D &tegra20_mc_regs, + .handle_irq =3D tegra30_mc_irq_handlers, + .num_interrupts =3D ARRAY_SIZE(tegra30_mc_irq_handlers), }; diff --git a/drivers/memory/tegra/tegra124.c b/drivers/memory/tegra/tegra12= 4.c index f0cfe14bb475..2cf733198782 100644 --- a/drivers/memory/tegra/tegra124.c +++ b/drivers/memory/tegra/tegra124.c @@ -1276,6 +1276,8 @@ const struct tegra_mc_soc tegra124_mc_soc =3D { .icc_ops =3D &tegra124_mc_icc_ops, .ops =3D &tegra30_mc_ops, .regs =3D &tegra20_mc_regs, + .handle_irq =3D tegra30_mc_irq_handlers, + .num_interrupts =3D ARRAY_SIZE(tegra30_mc_irq_handlers), }; #endif /* CONFIG_ARCH_TEGRA_124_SOC */ =20 @@ -1309,5 +1311,7 @@ const struct tegra_mc_soc tegra132_mc_soc =3D { .icc_ops =3D &tegra124_mc_icc_ops, .ops =3D &tegra30_mc_ops, .regs =3D &tegra20_mc_regs, + .handle_irq =3D tegra30_mc_irq_handlers, + .num_interrupts =3D ARRAY_SIZE(tegra30_mc_irq_handlers), }; #endif /* CONFIG_ARCH_TEGRA_132_SOC */ diff --git a/drivers/memory/tegra/tegra186.c b/drivers/memory/tegra/tegra18= 6.c index 51e2dd628fb4..eb1eaaffc79a 100644 --- a/drivers/memory/tegra/tegra186.c +++ b/drivers/memory/tegra/tegra186.c @@ -174,7 +174,6 @@ const struct tegra_mc_ops tegra186_mc_ops =3D { .remove =3D tegra186_mc_remove, .resume =3D tegra186_mc_resume, .probe_device =3D tegra186_mc_probe_device, - .handle_irq =3D tegra30_mc_handle_irq, }; =20 #if defined(CONFIG_ARCH_TEGRA_186_SOC) @@ -915,5 +914,7 @@ const struct tegra_mc_soc tegra186_mc_soc =3D { .ch_intmask =3D 0x0000000f, .global_intstatus_channel_shift =3D 0, .regs =3D &tegra20_mc_regs, + .handle_irq =3D tegra30_mc_irq_handlers, + .num_interrupts =3D ARRAY_SIZE(tegra30_mc_irq_handlers), }; #endif diff --git a/drivers/memory/tegra/tegra194.c b/drivers/memory/tegra/tegra19= 4.c index 5b7ff2dd6812..cb0e7886857d 100644 --- a/drivers/memory/tegra/tegra194.c +++ b/drivers/memory/tegra/tegra194.c @@ -1359,4 +1359,6 @@ const struct tegra_mc_soc tegra194_mc_soc =3D { .ch_intmask =3D 0x00000f00, .global_intstatus_channel_shift =3D 8, .regs =3D &tegra20_mc_regs, + .handle_irq =3D tegra30_mc_irq_handlers, + .num_interrupts =3D ARRAY_SIZE(tegra30_mc_irq_handlers), }; diff --git a/drivers/memory/tegra/tegra20.c b/drivers/memory/tegra/tegra20.c index 1b2b598ab564..6750b08d875f 100644 --- a/drivers/memory/tegra/tegra20.c +++ b/drivers/memory/tegra/tegra20.c @@ -761,9 +761,12 @@ static irqreturn_t tegra20_mc_handle_irq(int irq, void= *data) return IRQ_HANDLED; } =20 +static const irq_handler_t tegra20_mc_irq_handlers[] =3D { + tegra20_mc_handle_irq +}; + static const struct tegra_mc_ops tegra20_mc_ops =3D { .probe =3D tegra20_mc_probe, - .handle_irq =3D tegra20_mc_handle_irq, }; =20 const struct tegra_mc_soc tegra20_mc_soc =3D { @@ -779,4 +782,6 @@ const struct tegra_mc_soc tegra20_mc_soc =3D { .icc_ops =3D &tegra20_mc_icc_ops, .ops =3D &tegra20_mc_ops, .regs =3D &tegra20_mc_regs, + .handle_irq =3D tegra20_mc_irq_handlers, + .num_interrupts =3D ARRAY_SIZE(tegra20_mc_irq_handlers), }; diff --git a/drivers/memory/tegra/tegra210.c b/drivers/memory/tegra/tegra21= 0.c index e166b33848e9..8283601ab52c 100644 --- a/drivers/memory/tegra/tegra210.c +++ b/drivers/memory/tegra/tegra210.c @@ -1288,4 +1288,6 @@ const struct tegra_mc_soc tegra210_mc_soc =3D { .num_resets =3D ARRAY_SIZE(tegra210_mc_resets), .ops =3D &tegra30_mc_ops, .regs =3D &tegra20_mc_regs, + .handle_irq =3D tegra30_mc_irq_handlers, + .num_interrupts =3D ARRAY_SIZE(tegra30_mc_irq_handlers), }; diff --git a/drivers/memory/tegra/tegra234.c b/drivers/memory/tegra/tegra23= 4.c index 512d054d7592..9586d7528fb7 100644 --- a/drivers/memory/tegra/tegra234.c +++ b/drivers/memory/tegra/tegra234.c @@ -1153,4 +1153,6 @@ const struct tegra_mc_soc tegra234_mc_soc =3D { */ .num_carveouts =3D 32, .regs =3D &tegra20_mc_regs, + .handle_irq =3D tegra30_mc_irq_handlers, + .num_interrupts =3D ARRAY_SIZE(tegra30_mc_irq_handlers), }; diff --git a/drivers/memory/tegra/tegra30.c b/drivers/memory/tegra/tegra30.c index 337501a30a73..ff89b9078772 100644 --- a/drivers/memory/tegra/tegra30.c +++ b/drivers/memory/tegra/tegra30.c @@ -1401,4 +1401,6 @@ const struct tegra_mc_soc tegra30_mc_soc =3D { .icc_ops =3D &tegra30_mc_icc_ops, .ops =3D &tegra30_mc_ops, .regs =3D &tegra20_mc_regs, + .handle_irq =3D tegra30_mc_irq_handlers, + .num_interrupts =3D ARRAY_SIZE(tegra30_mc_irq_handlers), }; diff --git a/include/soc/tegra/mc.h b/include/soc/tegra/mc.h index 372f47e824d5..d07de04c0f33 100644 --- a/include/soc/tegra/mc.h +++ b/include/soc/tegra/mc.h @@ -10,10 +10,11 @@ #include #include #include +#include #include #include -#include #include +#include =20 struct clk; struct device; @@ -164,7 +165,6 @@ struct tegra_mc_ops { int (*probe)(struct tegra_mc *mc); void (*remove)(struct tegra_mc *mc); int (*resume)(struct tegra_mc *mc); - irqreturn_t (*handle_irq)(int irq, void *data); int (*probe_device)(struct tegra_mc *mc, struct device *dev); }; =20 @@ -214,6 +214,9 @@ struct tegra_mc_soc { const struct tegra_mc_icc_ops *icc_ops; const struct tegra_mc_ops *ops; const struct tegra_mc_regs *regs; + + const irq_handler_t *handle_irq; + unsigned int num_interrupts; }; =20 struct tegra_mc { @@ -224,7 +227,6 @@ struct tegra_mc { void __iomem *bcast_ch_regs; void __iomem **ch_regs; struct clk *clk; - int irq; =20 const struct tegra_mc_soc *soc; unsigned long tick; --=20 2.17.1