From nobody Tue Apr 7 18:48:14 2026 Received: from smtpout-04.galae.net (smtpout-04.galae.net [185.171.202.116]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B64563603FF; Thu, 26 Feb 2026 16:42:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.171.202.116 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772124134; cv=none; b=AfcimwrZSp78GJ557mYewWpOxgRIdA41w4kG1xHI0avqenabfROsw8GwPKZYZZj9HhyZSAMpg15YxKy+aT86y1JIoy42dY2+3rn6aL5iAi+zRGgcMIYhGYucCjs4Lh0xujU3Y4FJF0pm0K1eaTqaSJjebEiJOzlFDcX8/4SD5EE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772124134; c=relaxed/simple; bh=CYeW3PEbzs01gqKg8gAU9WSxeeLjnKmZHEZEEo6LJ1k=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=FbOe9LAuiaS/C3LzpBOKGy9J0UCsCUZMwKSFY5D1Gej8AEr3c0WRHQ+J7YrsRbjE/P2xz4ap1Sdk/47+zeaET+hISoUaXki0K+wyTowkGhx5r0U4i74xFSJm3Lg2YyvGQsNX/w2lLJBIwleB7kY7kr4oCnfSUkwa6uHArFGeKuA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=Ofbv5Pfw; arc=none smtp.client-ip=185.171.202.116 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="Ofbv5Pfw" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-04.galae.net (Postfix) with ESMTPS id 0832FC4069A; Thu, 26 Feb 2026 16:42:27 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id 831075FDE9; Thu, 26 Feb 2026 16:42:11 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 0BFAE10369400; Thu, 26 Feb 2026 17:42:08 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1772124130; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=BM70wedB5BIrTblJ0yiBQDSz3cBgb8SIrmVMNTczivk=; b=Ofbv5PfwRikNXNeeH0xk0CSs+2XLipnneE+rfcABwtVDICPVvDT/KkjwK4IfIt2BBZLSbL QlMLJfuNQT2q2rCQvZbLLZTtTOB8sTtZQg693iNW5DwKn3IKidEcxbFWBPQgu2mW2uw0Vr d/R0GfqeAcDamNAWSjuG2tMVnoqwvXvhvfjRLeSezG4aUQAPfuOwItsVWB53Hab7PJucZH dGcctFGwgQL0ORLHA0DRN6sdbb6/RgAnoOKzTv68nP6mnyjCbzqbBphGAVDW8R1tH0dWVp gDRiEh95NtbzDapgGJWbLjww5konl7JBcDZZf/cdVW8IRvQktOC3m1BxxkRhdw== From: "Bastien Curutchet (Schneider Electric)" Date: Thu, 26 Feb 2026 17:41:54 +0100 Subject: [PATCH net-next v5 7/9] net: dsa: microchip: Explicitly enable detection of L2 PTP frames Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260226-ksz8463-ptp-v5-7-1bc24fb9627d@bootlin.com> References: <20260226-ksz8463-ptp-v5-0-1bc24fb9627d@bootlin.com> In-Reply-To: <20260226-ksz8463-ptp-v5-0-1bc24fb9627d@bootlin.com> To: Woojung Huh , UNGLinuxDriver@microchip.com, Andrew Lunn , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Richard Cochran , Simon Horman Cc: Pascal Eberhard , =?utf-8?q?Miqu=C3=A8l_Raynal?= , Thomas Petazzoni , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, "Bastien Curutchet (Schneider Electric)" X-Mailer: b4 0.14.2 X-Last-TLS-Session-Version: TLSv1.3 Detection of L2 PTP frames needs to be enabled for PTP to work at the L2 layer. The bit enabling this detection is set by default on the switches currently supported by the driver, but it is unset by default on the KSZ8463 for which support will be added in upcoming patches. Explicitly enable the detection of L2 PTP frames for all switches when PTP is enabled. Signed-off-by: Bastien Curutchet (Schneider Electric) --- drivers/net/dsa/microchip/ksz_ptp.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/net/dsa/microchip/ksz_ptp.c b/drivers/net/dsa/microchi= p/ksz_ptp.c index 5daadf62689e6d60ab32e7a5a6c1f3fac3024b87..7eb033157f226b1169bc184d715= 69328e9a20a5b 100644 --- a/drivers/net/dsa/microchip/ksz_ptp.c +++ b/drivers/net/dsa/microchip/ksz_ptp.c @@ -947,8 +947,8 @@ int ksz_ptp_clock_register(struct dsa_switch *ds) /* Currently only P2P mode is supported. When 802_1AS bit is set, it * forwards all PTP packets to host port and none to other ports. */ - ret =3D ksz_rmw16(dev, regs[PTP_MSG_CONF1], PTP_TC_P2P | PTP_802_1AS, - PTP_TC_P2P | PTP_802_1AS); + ret =3D ksz_rmw16(dev, regs[PTP_MSG_CONF1], PTP_TC_P2P | PTP_802_1AS | PT= P_ETH_ENABLE, + PTP_TC_P2P | PTP_802_1AS | PTP_ETH_ENABLE); if (ret) return ret; =20 --=20 2.53.0