From nobody Tue Apr 7 17:15:30 2026 Received: from smtpout-04.galae.net (smtpout-04.galae.net [185.171.202.116]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0AB3E355F3B for ; Thu, 26 Feb 2026 16:42:07 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.171.202.116 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772124129; cv=none; b=MslQDN6el5zHeK+XcF9gZNciulvrhHgoP6wM3ViYcfFjd6GZN9RNKNeWXnqbcFZWkf4nmuuYvVJtY34XKYSFA0zq7lfgy2ndSyVbaK/xuZ5poGwVH/K+O+K8KUPjZ70GwWEcEmZGe1qJcChQ+49zJIfhYSnqLio1TrlAxQcgQLM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772124129; c=relaxed/simple; bh=RYRy5g8W0Xf7Fu2ii+9Dvn7gs9XC+WhAzXnGhEem1q4=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=Typ2PT/Au3EJp25qEyGdAkCYTVmlsyi4DSepHMLYm/gq1WZkkF4pYFndwsopPIQ/bDEzIowR17gx1qZ2rgJ+0UdlHZJYw3BFT+P0tazQX7AfScvGthp1PS2q2ATap2YS8eVbPU2P8Bvw0i94mZvWvtK6bAZUMqV4B7/t9iBe+Ww= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=FC3BlTxk; arc=none smtp.client-ip=185.171.202.116 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="FC3BlTxk" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-04.galae.net (Postfix) with ESMTPS id 38463C4069B; Thu, 26 Feb 2026 16:42:15 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id B2DC45FDE9; Thu, 26 Feb 2026 16:41:59 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id D77D6103693DF; Thu, 26 Feb 2026 17:41:56 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1772124118; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=IITRpU+zvv8SCI02oLy3IeJ6AI5N5yaZpXdgBXpsLWg=; b=FC3BlTxkSs3TpfWiGZeTncsVoWzc+wyKHx6XCFipnO6idVeYgGkv0yh/zs2uMkYogaBY12 tomYrSqXn187XFDchwPCBcVIAsEbYn8EVPSJyKn0Nrw8/R3mnDj/ykjNdvyvBunI1ZeO7z ibYOInalPTcQF7eX/XTQDESVmTGf3/KRhyoEJfPhsDS0DVfFmq5BgrCDQo0ieeHbqFSDQB yOphfg8bJzy3eEOUboQf7oquKb/QDZu+Z/mJmpTZL5OyISE/Eh7xXpnMnYrzmwTSV0/LRY HDtSDXAGxJXFfBacoDmI/PE4dQ3MNJpqY7iPQCKkEfT6PK7dEUmZD5oAJ8dXnQ== From: "Bastien Curutchet (Schneider Electric)" Date: Thu, 26 Feb 2026 17:41:48 +0100 Subject: [PATCH net-next v5 1/9] net: dsa: microchip: Add support for KSZ8463 global irq Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260226-ksz8463-ptp-v5-1-1bc24fb9627d@bootlin.com> References: <20260226-ksz8463-ptp-v5-0-1bc24fb9627d@bootlin.com> In-Reply-To: <20260226-ksz8463-ptp-v5-0-1bc24fb9627d@bootlin.com> To: Woojung Huh , UNGLinuxDriver@microchip.com, Andrew Lunn , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Richard Cochran , Simon Horman Cc: Pascal Eberhard , =?utf-8?q?Miqu=C3=A8l_Raynal?= , Thomas Petazzoni , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, "Bastien Curutchet (Schneider Electric)" , Maxime Chevallier X-Mailer: b4 0.14.2 X-Last-TLS-Session-Version: TLSv1.3 KSZ8463's interrupt scheme differs from the others KSZ swicthes. Its global interrupt handling is done through an 'enable irq' register instead of a 'mask irq' one, so the bit logic to enable/disable interrupt is reversed. Also its interrupts registers are 16-bits registers and don't have the same address. Add ksz8463-specific global interrupt setup function that still relies on the ksz_irq_common_setup(). Add a check on the device type in the irq_chip operations to adjust the bit logic for KSZ8463 Reviewed-by: Maxime Chevallier Signed-off-by: Bastien Curutchet (Schneider Electric) --- drivers/net/dsa/microchip/ksz_common.c | 40 +++++++++++++++++++++++++++++-= ---- drivers/net/dsa/microchip/ksz_common.h | 3 +++ 2 files changed, 37 insertions(+), 6 deletions(-) diff --git a/drivers/net/dsa/microchip/ksz_common.c b/drivers/net/dsa/micro= chip/ksz_common.c index c517478cc47677544b6523faee113ece036c9ed9..0102b950e09df7d33c8e429d9b3= 4f51375e0ef73 100644 --- a/drivers/net/dsa/microchip/ksz_common.c +++ b/drivers/net/dsa/microchip/ksz_common.c @@ -2817,14 +2817,20 @@ static void ksz_irq_mask(struct irq_data *d) { struct ksz_irq *kirq =3D irq_data_get_irq_chip_data(d); =20 - kirq->masked |=3D BIT(d->hwirq); + if (ksz_is_ksz8463(kirq->dev)) + kirq->masked &=3D ~BIT(d->hwirq); + else + kirq->masked |=3D BIT(d->hwirq); } =20 static void ksz_irq_unmask(struct irq_data *d) { struct ksz_irq *kirq =3D irq_data_get_irq_chip_data(d); =20 - kirq->masked &=3D ~BIT(d->hwirq); + if (ksz_is_ksz8463(kirq->dev)) + kirq->masked |=3D BIT(d->hwirq); + else + kirq->masked &=3D ~BIT(d->hwirq); } =20 static void ksz_irq_bus_lock(struct irq_data *d) @@ -2840,7 +2846,10 @@ static void ksz_irq_bus_sync_unlock(struct irq_data = *d) struct ksz_device *dev =3D kirq->dev; int ret; =20 - ret =3D ksz_write8(dev, kirq->reg_mask, kirq->masked); + if (ksz_is_ksz8463(dev)) + ret =3D ksz_write16(dev, kirq->reg_mask, kirq->masked); + else + ret =3D ksz_write8(dev, kirq->reg_mask, kirq->masked); if (ret) dev_err(dev->dev, "failed to change IRQ mask\n"); =20 @@ -2890,14 +2899,14 @@ static irqreturn_t ksz_irq_thread_fn(int irq, void = *dev_id) unsigned int nhandled =3D 0; struct ksz_device *dev; unsigned int sub_irq; - u8 data; + u16 data; int ret; u8 n; =20 dev =3D kirq->dev; =20 /* Read interrupt status register */ - ret =3D ksz_read8(dev, kirq->reg_status, &data); + ret =3D ksz_read16(dev, kirq->reg_status, &data); if (ret) goto out; =20 @@ -2939,6 +2948,22 @@ static int ksz_irq_common_setup(struct ksz_device *d= ev, struct ksz_irq *kirq) return ret; } =20 +static int ksz8463_girq_setup(struct dsa_switch *ds) +{ + struct ksz_device *dev =3D ds->priv; + struct ksz_irq *girq =3D &dev->girq; + + girq->nirqs =3D 15; + girq->reg_mask =3D KSZ8463_REG_IER; + girq->reg_status =3D KSZ8463_REG_ISR; + girq->masked =3D 0; + snprintf(girq->name, sizeof(girq->name), "global_irq"); + + girq->irq_num =3D dev->irq; + + return ksz_irq_common_setup(dev, girq); +} + static int ksz_girq_setup(struct ksz_device *dev) { struct ksz_irq *girq =3D &dev->girq; @@ -3044,7 +3069,10 @@ static int ksz_setup(struct dsa_switch *ds) p->learning =3D true; =20 if (dev->irq > 0) { - ret =3D ksz_girq_setup(dev); + if (ksz_is_ksz8463(dev)) + ret =3D ksz8463_girq_setup(ds); + else + ret =3D ksz_girq_setup(dev); if (ret) return ret; =20 diff --git a/drivers/net/dsa/microchip/ksz_common.h b/drivers/net/dsa/micro= chip/ksz_common.h index 929aff4c55de5254defdc1afb52b224b3898233b..67a488a3b5787f93f9e2a9266ce= 04f6611b56bf8 100644 --- a/drivers/net/dsa/microchip/ksz_common.h +++ b/drivers/net/dsa/microchip/ksz_common.h @@ -839,6 +839,9 @@ static inline bool ksz_is_sgmii_port(struct ksz_device = *dev, int port) #define KSZ87XX_INT_PME_MASK BIT(4) =20 /* Interrupt */ +#define KSZ8463_REG_ISR 0x190 +#define KSZ8463_REG_IER 0x192 + #define REG_SW_PORT_INT_STATUS__1 0x001B #define REG_SW_PORT_INT_MASK__1 0x001F =20 --=20 2.53.0 From nobody Tue Apr 7 17:15:30 2026 Received: from smtpout-04.galae.net (smtpout-04.galae.net [185.171.202.116]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0ABBC355F3C; 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arc=none smtp.client-ip=185.171.202.116 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="PFmAHQHN" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-04.galae.net (Postfix) with ESMTPS id E2725C4069A; Thu, 26 Feb 2026 16:42:16 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id 66AE95FDE9; Thu, 26 Feb 2026 16:42:01 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id D2AA4103693FC; Thu, 26 Feb 2026 17:41:58 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1772124120; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=4TnwgEqPYIMq06dLVSQrp+AiDYlF+CriWMK5nyoWTro=; b=PFmAHQHNCkR6e+S/woQliJVo+IzWYUgWD7Stqdn4Ac1+9klk/6zPvqmi+8qifbNk4z9Q7e wovPrN5HiBzxvMf+eSh8qYwLf8zZ5xwIufHIrzKh4m/PjUEG1ohhOWjdm08js/uskRPnsj /jw+zHsGBmF9O+CR2Cb7NZc94JT5GmFpzpMMCQ156IMZRiLAtkb5GDjHLZ3+pslzZOLvgp 8uif6VNM6ZgTPC0f+hvnHlW7Qak2Wkvj+kWgi9/izK1HnNHAbK8q2OgirFVjdgEWBmEh7Q ELMe74N5T4nj0UJS555MxK5sa5T5D4gS9xiu23SNZrBZa3lvRxGsZIfy8pCIPA== From: "Bastien Curutchet (Schneider Electric)" Date: Thu, 26 Feb 2026 17:41:49 +0100 Subject: [PATCH net-next v5 2/9] net: dsa: microchip: Decorrelate IRQ domain from port Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260226-ksz8463-ptp-v5-2-1bc24fb9627d@bootlin.com> References: <20260226-ksz8463-ptp-v5-0-1bc24fb9627d@bootlin.com> In-Reply-To: <20260226-ksz8463-ptp-v5-0-1bc24fb9627d@bootlin.com> To: Woojung Huh , UNGLinuxDriver@microchip.com, Andrew Lunn , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Richard Cochran , Simon Horman Cc: Pascal Eberhard , =?utf-8?q?Miqu=C3=A8l_Raynal?= , Thomas Petazzoni , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, "Bastien Curutchet (Schneider Electric)" X-Mailer: b4 0.14.2 X-Last-TLS-Session-Version: TLSv1.3 KSZ8463 has one register holding interrupt bits from both port 1 and 2. So it has to use one IRQ domain for both of its ports. This conflicts with the current initialization procedure that ties one IRQ domain to each port. Decorrelate IRQ domain from port so a port can use an IRQ domain not directly related to itself. Signed-off-by: Bastien Curutchet (Schneider Electric) --- drivers/net/dsa/microchip/ksz_ptp.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/drivers/net/dsa/microchip/ksz_ptp.c b/drivers/net/dsa/microchi= p/ksz_ptp.c index 4a2cc57a628f97bd51fcb11057bc4effda9205dd..3b0dddf918595e9318c9e977903= 5d5152dcd9dde 100644 --- a/drivers/net/dsa/microchip/ksz_ptp.c +++ b/drivers/net/dsa/microchip/ksz_ptp.c @@ -1099,18 +1099,17 @@ static void ksz_ptp_msg_irq_free(struct ksz_port *p= ort, u8 n) irq_dispose_mapping(ptpmsg_irq->num); } =20 -static int ksz_ptp_msg_irq_setup(struct ksz_port *port, u8 n) +static int ksz_ptp_msg_irq_setup(struct irq_domain *domain, struct ksz_por= t *port, u8 n) { u16 ts_reg[] =3D {REG_PTP_PORT_PDRESP_TS, REG_PTP_PORT_XDELAY_TS, REG_PTP_PORT_SYNC_TS}; static const char * const name[] =3D {"pdresp-msg", "xdreq-msg", "sync-msg"}; const struct ksz_dev_ops *ops =3D port->ksz_dev->dev_ops; - struct ksz_irq *ptpirq =3D &port->ptpirq; struct ksz_ptp_irq *ptpmsg_irq; =20 ptpmsg_irq =3D &port->ptpmsg_irq[n]; - ptpmsg_irq->num =3D irq_create_mapping(ptpirq->domain, n); + ptpmsg_irq->num =3D irq_create_mapping(domain, n); if (!ptpmsg_irq->num) return -EINVAL; =20 @@ -1162,7 +1161,7 @@ int ksz_ptp_irq_setup(struct dsa_switch *ds, u8 p) goto out; =20 for (irq =3D 0; irq < ptpirq->nirqs; irq++) { - ret =3D ksz_ptp_msg_irq_setup(port, irq); + ret =3D ksz_ptp_msg_irq_setup(ptpirq->domain, port, irq); if (ret) goto out_ptp_msg; } --=20 2.53.0 From nobody Tue Apr 7 17:15:30 2026 Received: from smtpout-02.galae.net (smtpout-02.galae.net [185.246.84.56]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B363A332635 for ; Thu, 26 Feb 2026 16:42:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.246.84.56 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772124126; cv=none; b=N/YELwALmLqIkgVBb33avfwHr7No21TNMLsa+FQyoa4Ab3R6NXibh7GnI/mn6NBJiQ9Cq9Lv4agU6DG14vLTb67WIIAOnxzsB2SCWqdjcZsNjI5jiryTSdfI85ZT4CxtWvVd63cthH09MTTjzG6cENj1+cLg2kTDpPGA972HsMs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772124126; c=relaxed/simple; bh=qAUGqtuwCqJ0laxCFzHnXNutNvHz8zxfyVdBttZkIQY=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=N7GanwibpWIXE/WzzNLxt4QlvGR0Mv8UGkC8zA2vmp8CUCRK1Thb3yP1boAvqic6tz0u1oe3VKYPMMZLnMF0lu8BaNRPeF8cKlJHUOdJwV8E6oZH87oi7uF5dMdZW5FMiodLxXZtST8gaRujz7f1z9okRLKBnZ7ZOBS0aFak9sQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=PrYNTNMJ; arc=none smtp.client-ip=185.246.84.56 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="PrYNTNMJ" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-02.galae.net (Postfix) with ESMTPS id 99ADA1A1577; Thu, 26 Feb 2026 16:42:03 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id 707225FDE9; Thu, 26 Feb 2026 16:42:03 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 0D6D3103693FB; Thu, 26 Feb 2026 17:42:00 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1772124122; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=Dt/xWp/luOgqyet9/x/e/zuW8LChXz1mN0JA1otPa0w=; b=PrYNTNMJMZx+6shinKM+OCrZhocShxW44POVa68Cz1kDuY3trTQlAN3M2vLx1FNNzunh5V AUPE5bk+Fu0AIPN8CPz6qba2FxtsSjhlUDBKFo2hkL/wx1oLoQ7htpqEzNIX4w3BmjTQsI oP9gA2UIU4OBQLo09zojZHC5+dCnDMJagEZD4JxFEZUlSF993k9qI86MjtuyEArkEvURD/ dYPWWTMvSkPpewYK8y7CsfF4VNjnFoyJ7uJTlEwRxcoLiMtcSF82PZPGTRpGatw0vZu9bt PkcRhTSUqeio+NqUTZQCMEy2w6t3at60NXMy/qgc90gTsrsu6DQ/K/1XmC2r4w== From: "Bastien Curutchet (Schneider Electric)" Date: Thu, 26 Feb 2026 17:41:50 +0100 Subject: [PATCH net-next v5 3/9] net: dsa: microchip: Decorrelate msg_irq index from IRQ bit offset Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260226-ksz8463-ptp-v5-3-1bc24fb9627d@bootlin.com> References: <20260226-ksz8463-ptp-v5-0-1bc24fb9627d@bootlin.com> In-Reply-To: <20260226-ksz8463-ptp-v5-0-1bc24fb9627d@bootlin.com> To: Woojung Huh , UNGLinuxDriver@microchip.com, Andrew Lunn , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Richard Cochran , Simon Horman Cc: Pascal Eberhard , =?utf-8?q?Miqu=C3=A8l_Raynal?= , Thomas Petazzoni , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, "Bastien Curutchet (Schneider Electric)" X-Mailer: b4 0.14.2 X-Last-TLS-Session-Version: TLSv1.3 KSZ8463 has one register containing all the PTP-related interrupts from all ports. So it will use one IRQ domain for all of them, leading to 4 interrupt bits to be dispatched in two ports. Current implementation doesn't allow to do so because the IRQ bit offset is also used as index to store the struct ptpmsg_irq in the table held by the port. Add a new input to the setup() function to independently provide the interrupt bit offset and the ptpmsg_irq index. Signed-off-by: Bastien Curutchet (Schneider Electric) --- drivers/net/dsa/microchip/ksz_ptp.c | 13 +++++++------ 1 file changed, 7 insertions(+), 6 deletions(-) diff --git a/drivers/net/dsa/microchip/ksz_ptp.c b/drivers/net/dsa/microchi= p/ksz_ptp.c index 3b0dddf918595e9318c9e9779035d5152dcd9dde..ae46ba41c588c076de2c3b70c7c= 6702ad85263d5 100644 --- a/drivers/net/dsa/microchip/ksz_ptp.c +++ b/drivers/net/dsa/microchip/ksz_ptp.c @@ -1099,7 +1099,8 @@ static void ksz_ptp_msg_irq_free(struct ksz_port *por= t, u8 n) irq_dispose_mapping(ptpmsg_irq->num); } =20 -static int ksz_ptp_msg_irq_setup(struct irq_domain *domain, struct ksz_por= t *port, u8 n) +static int ksz_ptp_msg_irq_setup(struct irq_domain *domain, struct ksz_por= t *port, + u8 index, int irq) { u16 ts_reg[] =3D {REG_PTP_PORT_PDRESP_TS, REG_PTP_PORT_XDELAY_TS, REG_PTP_PORT_SYNC_TS}; @@ -1108,15 +1109,15 @@ static int ksz_ptp_msg_irq_setup(struct irq_domain = *domain, struct ksz_port *por const struct ksz_dev_ops *ops =3D port->ksz_dev->dev_ops; struct ksz_ptp_irq *ptpmsg_irq; =20 - ptpmsg_irq =3D &port->ptpmsg_irq[n]; - ptpmsg_irq->num =3D irq_create_mapping(domain, n); + ptpmsg_irq =3D &port->ptpmsg_irq[index]; + ptpmsg_irq->num =3D irq_create_mapping(domain, irq); if (!ptpmsg_irq->num) return -EINVAL; =20 ptpmsg_irq->port =3D port; - ptpmsg_irq->ts_reg =3D ops->get_port_addr(port->num, ts_reg[n]); + ptpmsg_irq->ts_reg =3D ops->get_port_addr(port->num, ts_reg[index]); =20 - strscpy(ptpmsg_irq->name, name[n]); + strscpy(ptpmsg_irq->name, name[index]); =20 return request_threaded_irq(ptpmsg_irq->num, NULL, ksz_ptp_msg_thread_fn, IRQF_ONESHOT, @@ -1161,7 +1162,7 @@ int ksz_ptp_irq_setup(struct dsa_switch *ds, u8 p) goto out; =20 for (irq =3D 0; irq < ptpirq->nirqs; irq++) { - ret =3D ksz_ptp_msg_irq_setup(ptpirq->domain, port, irq); + ret =3D ksz_ptp_msg_irq_setup(ptpirq->domain, port, irq, irq); if (ret) goto out_ptp_msg; } --=20 2.53.0 From nobody Tue Apr 7 17:15:30 2026 Received: from smtpout-04.galae.net (smtpout-04.galae.net [185.171.202.116]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DE8BB3603DD for ; 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arc=none smtp.client-ip=185.171.202.116 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="mTsUue/2" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-04.galae.net (Postfix) with ESMTPS id 0DDFCC4069D; Thu, 26 Feb 2026 16:42:21 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id 84F005FDE9; Thu, 26 Feb 2026 16:42:05 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id D8FB4103693DF; Thu, 26 Feb 2026 17:42:02 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1772124124; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=2k46UmcdIZlsYIFFkjiNBnzEAvjefgMYz08QLRPkAMc=; b=mTsUue/2DUhMDSV/MlsBVi0J/PETq4XwJzQZmYJy3MMnU50iCD4CWA9KMhVVD3n6lnIRC6 ncxh01+hwjsnlr05A0eHUixnsZ99YMgMeCiRwbJYmJS1umLHE9sr5QeJgQQYTo8vLWOAqW 68VGxKO2h32jjm0SMUYEoMNLI/xOetzUMwspSJcC9UnWfBuZAo/rB0qjrLi6TsLBKl1meU geGGKKTzNMsq/P5zLUM/R+7WhN1W58L+4bBWyq8TOiw5mdVbD5iRbGhTwTYtXe4itw7XRp GiwvfyA/qZu7Jk13Fj+yUHd+6nOaBnSLiXFq79BcYJ3Ey8QAIWuX5mIAkVBupg== From: "Bastien Curutchet (Schneider Electric)" Date: Thu, 26 Feb 2026 17:41:51 +0100 Subject: [PATCH net-next v5 4/9] net: dsa: microchip: Add support for KSZ8463's PTP interrupts Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260226-ksz8463-ptp-v5-4-1bc24fb9627d@bootlin.com> References: <20260226-ksz8463-ptp-v5-0-1bc24fb9627d@bootlin.com> In-Reply-To: <20260226-ksz8463-ptp-v5-0-1bc24fb9627d@bootlin.com> To: Woojung Huh , UNGLinuxDriver@microchip.com, Andrew Lunn , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Richard Cochran , Simon Horman Cc: Pascal Eberhard , =?utf-8?q?Miqu=C3=A8l_Raynal?= , Thomas Petazzoni , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, "Bastien Curutchet (Schneider Electric)" X-Mailer: b4 0.14.2 X-Last-TLS-Session-Version: TLSv1.3 KSZ8463 PTP interrupts aren't handled by the driver. The interrupt layout in KSZ8463 has nothing to do with the other switches: - all the interrupts of all ports are grouped into one status register while others have one interrupt register per port - xdelay_req and pdresp timestamps share one single interrupt bit on the KSZ8463 while each of them has its own interrupt bit on other switches Add KSZ8463-specific IRQ setup()/free() functions to support KSZ8463. Both ports share one IRQ domain held by port n=C2=B01. Signed-off-by: Bastien Curutchet (Schneider Electric) --- drivers/net/dsa/microchip/ksz_common.c | 49 +++++++++----- drivers/net/dsa/microchip/ksz_common.h | 2 + drivers/net/dsa/microchip/ksz_ptp.c | 112 ++++++++++++++++++++++++++++= +++- drivers/net/dsa/microchip/ksz_ptp.h | 9 +++ drivers/net/dsa/microchip/ksz_ptp_reg.h | 7 ++ 5 files changed, 160 insertions(+), 19 deletions(-) diff --git a/drivers/net/dsa/microchip/ksz_common.c b/drivers/net/dsa/micro= chip/ksz_common.c index 0102b950e09df7d33c8e429d9b34f51375e0ef73..7deeb0b86793bab4818a7e70bc4= 68346ec8f22e3 100644 --- a/drivers/net/dsa/microchip/ksz_common.c +++ b/drivers/net/dsa/microchip/ksz_common.c @@ -3076,15 +3076,21 @@ static int ksz_setup(struct dsa_switch *ds) if (ret) return ret; =20 - dsa_switch_for_each_user_port(dp, dev->ds) { - ret =3D ksz_pirq_setup(dev, dp->index); + if (ksz_is_ksz8463(dev)) { + ret =3D ksz8463_ptp_irq_setup(ds); if (ret) - goto port_release; - - if (dev->info->ptp_capable) { - ret =3D ksz_ptp_irq_setup(ds, dp->index); + goto girq_release; + } else { + dsa_switch_for_each_user_port(dp, dev->ds) { + ret =3D ksz_pirq_setup(dev, dp->index); if (ret) - goto pirq_release; + goto port_release; + + if (dev->info->ptp_capable) { + ret =3D ksz_ptp_irq_setup(ds, dp->index); + if (ret) + goto pirq_release; + } } } } @@ -3119,14 +3125,20 @@ static int ksz_setup(struct dsa_switch *ds) ksz_ptp_clock_unregister(ds); port_release: if (dev->irq > 0) { - dsa_switch_for_each_user_port_continue_reverse(dp, dev->ds) { - if (dev->info->ptp_capable) - ksz_ptp_irq_free(ds, dp->index); + if (ksz_is_ksz8463(dev)) { + ksz8463_ptp_irq_free(ds); + } else { + dsa_switch_for_each_user_port_continue_reverse(dp, dev->ds) { + if (dev->info->ptp_capable) + ksz_ptp_irq_free(ds, dp->index); pirq_release: - ksz_irq_free(&dev->ports[dp->index].pirq); + ksz_irq_free(&dev->ports[dp->index].pirq); + } } - ksz_irq_free(&dev->girq); } +girq_release: + if (dev->irq > 0) + ksz_irq_free(&dev->girq); =20 return ret; } @@ -3140,11 +3152,14 @@ static void ksz_teardown(struct dsa_switch *ds) ksz_ptp_clock_unregister(ds); =20 if (dev->irq > 0) { - dsa_switch_for_each_user_port(dp, dev->ds) { - if (dev->info->ptp_capable) - ksz_ptp_irq_free(ds, dp->index); - - ksz_irq_free(&dev->ports[dp->index].pirq); + if (ksz_is_ksz8463(dev)) { + ksz8463_ptp_irq_free(ds); + } else { + dsa_switch_for_each_user_port(dp, dev->ds) { + if (dev->info->ptp_capable) + ksz_ptp_irq_free(ds, dp->index); + ksz_irq_free(&dev->ports[dp->index].pirq); + } } =20 ksz_irq_free(&dev->girq); diff --git a/drivers/net/dsa/microchip/ksz_common.h b/drivers/net/dsa/micro= chip/ksz_common.h index 67a488a3b5787f93f9e2a9266ce04f6611b56bf8..dfbc3d13daca8d7a8b9d3ffe6a7= c1ec9927863f2 100644 --- a/drivers/net/dsa/microchip/ksz_common.h +++ b/drivers/net/dsa/microchip/ksz_common.h @@ -851,6 +851,8 @@ static inline bool ksz_is_sgmii_port(struct ksz_device = *dev, int port) #define PORT_SRC_PHY_INT 1 #define PORT_SRC_PTP_INT 2 =20 +#define KSZ8463_SRC_PTP_INT 12 + #define KSZ8795_HUGE_PACKET_SIZE 2000 #define KSZ8863_HUGE_PACKET_SIZE 1916 #define KSZ8863_NORMAL_PACKET_SIZE 1536 diff --git a/drivers/net/dsa/microchip/ksz_ptp.c b/drivers/net/dsa/microchi= p/ksz_ptp.c index ae46ba41c588c076de2c3b70c7c6702ad85263d5..5daadf62689e6d60ab32e7a5a6c= 1f3fac3024b87 100644 --- a/drivers/net/dsa/microchip/ksz_ptp.c +++ b/drivers/net/dsa/microchip/ksz_ptp.c @@ -31,6 +31,9 @@ #define KSZ_PTP_SUBNS_BITS 32 =20 #define KSZ_PTP_INT_START 13 +#define KSZ8463_PTP_PORT1_INT_START 12 +#define KSZ8463_PTP_PORT2_INT_START 14 +#define KSZ8463_PTP_INT_START KSZ8463_PTP_PORT1_INT_START =20 static int ksz_ptp_tou_gpio(struct ksz_device *dev) { @@ -1102,6 +1105,7 @@ static void ksz_ptp_msg_irq_free(struct ksz_port *por= t, u8 n) static int ksz_ptp_msg_irq_setup(struct irq_domain *domain, struct ksz_por= t *port, u8 index, int irq) { + static const char * const ksz8463_name[] =3D {"sync-msg", "delay-msg"}; u16 ts_reg[] =3D {REG_PTP_PORT_PDRESP_TS, REG_PTP_PORT_XDELAY_TS, REG_PTP_PORT_SYNC_TS}; static const char * const name[] =3D {"pdresp-msg", "xdreq-msg", @@ -1115,15 +1119,106 @@ static int ksz_ptp_msg_irq_setup(struct irq_domain= *domain, struct ksz_port *por return -EINVAL; =20 ptpmsg_irq->port =3D port; - ptpmsg_irq->ts_reg =3D ops->get_port_addr(port->num, ts_reg[index]); =20 - strscpy(ptpmsg_irq->name, name[index]); + if (ksz_is_ksz8463(port->ksz_dev)) { + ts_reg[0] =3D KSZ8463_REG_PORT_SYNC_TS; + ts_reg[1] =3D KSZ8463_REG_PORT_DREQ_TS; + strscpy(ptpmsg_irq->name, ksz8463_name[index]); + } else { + strscpy(ptpmsg_irq->name, name[index]); + } + + ptpmsg_irq->ts_reg =3D ops->get_port_addr(port->num, ts_reg[index]); =20 return request_threaded_irq(ptpmsg_irq->num, NULL, ksz_ptp_msg_thread_fn, IRQF_ONESHOT, ptpmsg_irq->name, ptpmsg_irq); } =20 +static int ksz8463_ptp_port_irq_setup(struct ksz_irq *ptpirq, struct ksz_p= ort *port, int hw_irq) +{ + int ret; + int i; + + init_completion(&port->tstamp_msg_comp); + + for (i =3D 0; i < 2; i++) { + ret =3D ksz_ptp_msg_irq_setup(ptpirq->domain, port, i, hw_irq++); + if (ret) + goto release_msg_irq; + } + + return 0; + +release_msg_irq: + while (i--) + ksz_ptp_msg_irq_free(port, i); + + return ret; +} + +static void ksz8463_ptp_port_irq_teardown(struct ksz_port *port) +{ + int i; + + for (i =3D 0; i < 2; i++) + ksz_ptp_msg_irq_free(port, i); +} + +int ksz8463_ptp_irq_setup(struct dsa_switch *ds) +{ + struct ksz_device *dev =3D ds->priv; + struct ksz_port *port1, *port2; + struct ksz_irq *ptpirq; + int ret; + + port1 =3D &dev->ports[0]; + port2 =3D &dev->ports[1]; + ptpirq =3D &port1->ptpirq; + + ptpirq->irq_num =3D irq_find_mapping(dev->girq.domain, KSZ8463_SRC_PTP_IN= T); + if (!ptpirq->irq_num) + return -EINVAL; + + ptpirq->dev =3D dev; + ptpirq->nirqs =3D 4; + ptpirq->reg_mask =3D KSZ8463_PTP_TS_IER; + ptpirq->reg_status =3D KSZ8463_PTP_TS_ISR; + ptpirq->irq0_offset =3D KSZ8463_PTP_INT_START; + snprintf(ptpirq->name, sizeof(ptpirq->name), "ptp-irq"); + + ptpirq->domain =3D irq_domain_create_linear(dev_fwnode(dev->dev), ptpirq-= >nirqs, + &ksz_ptp_irq_domain_ops, ptpirq); + if (!ptpirq->domain) + return -ENOMEM; + + ret =3D request_threaded_irq(ptpirq->irq_num, NULL, ksz_ptp_irq_thread_fn, + IRQF_ONESHOT, ptpirq->name, ptpirq); + if (ret) + goto release_domain; + + ret =3D ksz8463_ptp_port_irq_setup(ptpirq, port1, + KSZ8463_PTP_PORT1_INT_START - KSZ8463_PTP_INT_START); + if (ret) + goto release_irq; + + ret =3D ksz8463_ptp_port_irq_setup(ptpirq, port2, + KSZ8463_PTP_PORT2_INT_START - KSZ8463_PTP_INT_START); + if (ret) + goto free_port1; + + return 0; + +free_port1: + ksz8463_ptp_port_irq_teardown(port1); +release_irq: + free_irq(ptpirq->irq_num, ptpirq); +release_domain: + irq_domain_remove(ptpirq->domain); + + return ret; +} + int ksz_ptp_irq_setup(struct dsa_switch *ds, u8 p) { struct ksz_device *dev =3D ds->priv; @@ -1181,6 +1276,19 @@ int ksz_ptp_irq_setup(struct dsa_switch *ds, u8 p) return ret; } =20 +void ksz8463_ptp_irq_free(struct dsa_switch *ds) +{ + struct ksz_device *dev =3D ds->priv; + struct ksz_port *port1 =3D &dev->ports[0]; + struct ksz_port *port2 =3D &dev->ports[1]; + struct ksz_irq *ptpirq =3D &port1->ptpirq; + + ksz8463_ptp_port_irq_teardown(port1); + ksz8463_ptp_port_irq_teardown(port2); + free_irq(ptpirq->irq_num, ptpirq); + irq_domain_remove(ptpirq->domain); +} + void ksz_ptp_irq_free(struct dsa_switch *ds, u8 p) { struct ksz_device *dev =3D ds->priv; diff --git a/drivers/net/dsa/microchip/ksz_ptp.h b/drivers/net/dsa/microchi= p/ksz_ptp.h index 3086e519b1b641e9e4126cb6ff43409f6d7f29a5..46494caacc4287b845b8e5c3a68= bcfc7a03bcf9d 100644 --- a/drivers/net/dsa/microchip/ksz_ptp.h +++ b/drivers/net/dsa/microchip/ksz_ptp.h @@ -48,6 +48,8 @@ void ksz_port_txtstamp(struct dsa_switch *ds, int port, s= truct sk_buff *skb); void ksz_port_deferred_xmit(struct kthread_work *work); bool ksz_port_rxtstamp(struct dsa_switch *ds, int port, struct sk_buff *sk= b, unsigned int type); +int ksz8463_ptp_irq_setup(struct dsa_switch *ds); +void ksz8463_ptp_irq_free(struct dsa_switch *ds); int ksz_ptp_irq_setup(struct dsa_switch *ds, u8 p); void ksz_ptp_irq_free(struct dsa_switch *ds, u8 p); =20 @@ -65,6 +67,13 @@ static inline int ksz_ptp_clock_register(struct dsa_swit= ch *ds) =20 static inline void ksz_ptp_clock_unregister(struct dsa_switch *ds) { } =20 +static inline int ksz8463_ptp_irq_setup(struct dsa_switch *ds) +{ + return 0; +} + +static inline void ksz8463_ptp_irq_free(struct dsa_switch *ds) {} + static inline int ksz_ptp_irq_setup(struct dsa_switch *ds, u8 p) { return 0; diff --git a/drivers/net/dsa/microchip/ksz_ptp_reg.h b/drivers/net/dsa/micr= ochip/ksz_ptp_reg.h index eab9aecb7fa8a50323de4140695b2004d1beab8c..e80fb4bd1a0e970ba3570374d3d= c82c8e2cc15b4 100644 --- a/drivers/net/dsa/microchip/ksz_ptp_reg.h +++ b/drivers/net/dsa/microchip/ksz_ptp_reg.h @@ -121,6 +121,10 @@ #define REG_PTP_PORT_SYNC_TS 0x0C0C #define REG_PTP_PORT_PDRESP_TS 0x0C10 =20 +#define KSZ8463_REG_PORT_DREQ_TS 0x0648 +#define KSZ8463_REG_PORT_SYNC_TS 0x064C +#define KSZ8463_REG_PORT_DRESP_TS 0x0650 + #define REG_PTP_PORT_TX_INT_STATUS__2 0x0C14 #define REG_PTP_PORT_TX_INT_ENABLE__2 0x0C16 =20 @@ -131,4 +135,7 @@ #define KSZ_XDREQ_MSG 1 #define KSZ_PDRES_MSG 0 =20 +#define KSZ8463_PTP_TS_ISR 0x68C +#define KSZ8463_PTP_TS_IER 0x68E + #endif --=20 2.53.0 From nobody Tue Apr 7 17:15:30 2026 Received: from smtpout-02.galae.net (smtpout-02.galae.net [185.246.84.56]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CA68C332635 for ; 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bh=RCz7ZiFxHupdO6m0tzR5VygQNoN38bElGRsCY7k3JYI=; b=OquxiftTQbqzdCxMyWM0e1MQmzcv5cbNzxwlStHDF4PfuhBD45Lj8tlTwo2mgSlGbSgRlU S/0JKAr5kyN6Q27Fg5HAY81oC8fNfBQ8nxGRHELjir6v/Jjiwv/dUJ812R52jMsVJMdhK2 bb5gU3hIyLPteYC9EZevLbd1axE/hpDbNG4Z1Ha6+Ps9ioJFPZUoeiMoc54KwNq6V5Uy+k 1mYaKfSeNLFGcWtPnS53D82+titThbE1cPUWlcQzVM9wH5afQPCagIFKb3+7iTSUN/uuCv ad+UIWBq3ZfsTbqK6orpVd6zd2JcNbH+vWw6YJw95PuPU1vjFJKFAS88G0+/Uw== From: "Bastien Curutchet (Schneider Electric)" Date: Thu, 26 Feb 2026 17:41:52 +0100 Subject: [PATCH net-next v5 5/9] net: dsa: tag_ksz: Share code for KSZ8795 and KSZ9893 xmit operations Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260226-ksz8463-ptp-v5-5-1bc24fb9627d@bootlin.com> References: <20260226-ksz8463-ptp-v5-0-1bc24fb9627d@bootlin.com> In-Reply-To: <20260226-ksz8463-ptp-v5-0-1bc24fb9627d@bootlin.com> To: Woojung Huh , UNGLinuxDriver@microchip.com, Andrew Lunn , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Richard Cochran , Simon Horman Cc: Pascal Eberhard , =?utf-8?q?Miqu=C3=A8l_Raynal?= , Thomas Petazzoni , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, "Bastien Curutchet (Schneider Electric)" X-Mailer: b4 0.14.2 X-Last-TLS-Session-Version: TLSv1.3 KSZ8795 and KSZ9893 have very similar tag handling in the xmit path, leading to code duplication. There are only two differences between the two ksz*_xmit(): - the KSZ8795 doesn't handle priorities between frames - ksz8795_xmit() directly returns the SKB instead of calling ksz_defer_xmit(). Yet, ksz_defer_xmit() also returns directly the SKB if no clone is present inside the SKB. Clones are only created by the KSZ driver when the PTP feature is enabled. Since KSZ8795 doesn't support PTP, returning the SKB directly or ksz_defer_xmit() is the same. The upcoming support for the KSZ8463 also requires a similar xmit(). Move KSZ8795 operations below the definition of ksz_defer_xmit(). Gather the common code from ksz8795_xmit() and ksz9893_xmit() into a new ksz_common_xmit() function that takes three input arguments: - do_tstamp to tell whether ksz_xmit_timestamp() should be called - prio to give the priority tag (if any) - override_mask to give the location of the override bit (if any) Signed-off-by: Bastien Curutchet (Schneider Electric) --- net/dsa/tag_ksz.c | 161 +++++++++++++++++++++++++++-----------------------= ---- 1 file changed, 80 insertions(+), 81 deletions(-) diff --git a/net/dsa/tag_ksz.c b/net/dsa/tag_ksz.c index d2475c3bbb7d227bb42b0368914275b00fb2784a..6ec9bcb324a953d988ef665a177= 566159e27027f 100644 --- a/net/dsa/tag_ksz.c +++ b/net/dsa/tag_ksz.c @@ -99,68 +99,6 @@ static struct sk_buff *ksz_common_rcv(struct sk_buff *sk= b, return skb; } =20 -/* - * For Ingress (Host -> KSZ8795), 1 byte is added before FCS. - * -----------------------------------------------------------------------= ---- - * DA(6bytes)|SA(6bytes)|....|Data(nbytes)|tag(1byte)|FCS(4bytes) - * -----------------------------------------------------------------------= ---- - * tag : each bit represents port (eg, 0x01=3Dport1, 0x02=3Dport2, 0x10=3D= port5) - * - * For Egress (KSZ8795 -> Host), 1 byte is added before FCS. - * -----------------------------------------------------------------------= ---- - * DA(6bytes)|SA(6bytes)|....|Data(nbytes)|tag0(1byte)|FCS(4bytes) - * -----------------------------------------------------------------------= ---- - * tag0 : zero-based value represents port - * (eg, 0x0=3Dport1, 0x2=3Dport3, 0x3=3Dport4) - */ - -#define KSZ8795_TAIL_TAG_EG_PORT_M GENMASK(1, 0) -#define KSZ8795_TAIL_TAG_OVERRIDE BIT(6) -#define KSZ8795_TAIL_TAG_LOOKUP BIT(7) - -static struct sk_buff *ksz8795_xmit(struct sk_buff *skb, struct net_device= *dev) -{ - struct ethhdr *hdr; - u8 *tag; - - if (skb->ip_summed =3D=3D CHECKSUM_PARTIAL && skb_checksum_help(skb)) - return NULL; - - /* Tag encoding */ - tag =3D skb_put(skb, KSZ_INGRESS_TAG_LEN); - hdr =3D skb_eth_hdr(skb); - - *tag =3D dsa_xmit_port_mask(skb, dev); - if (is_link_local_ether_addr(hdr->h_dest)) - *tag |=3D KSZ8795_TAIL_TAG_OVERRIDE; - - return skb; -} - -static struct sk_buff *ksz8795_rcv(struct sk_buff *skb, struct net_device = *dev) -{ - u8 *tag; - - if (skb_linearize(skb)) - return NULL; - - tag =3D skb_tail_pointer(skb) - KSZ_EGRESS_TAG_LEN; - - return ksz_common_rcv(skb, dev, tag[0] & KSZ8795_TAIL_TAG_EG_PORT_M, - KSZ_EGRESS_TAG_LEN); -} - -static const struct dsa_device_ops ksz8795_netdev_ops =3D { - .name =3D KSZ8795_NAME, - .proto =3D DSA_TAG_PROTO_KSZ8795, - .xmit =3D ksz8795_xmit, - .rcv =3D ksz8795_rcv, - .needed_tailroom =3D KSZ_INGRESS_TAG_LEN, -}; - -DSA_TAG_DRIVER(ksz8795_netdev_ops); -MODULE_ALIAS_DSA_TAG_DRIVER(DSA_TAG_PROTO_KSZ8795, KSZ8795_NAME); - /* * For Ingress (Host -> KSZ9477), 2/6 bytes are added before FCS. * -----------------------------------------------------------------------= ---- @@ -274,6 +212,35 @@ static struct sk_buff *ksz_defer_xmit(struct dsa_port = *dp, struct sk_buff *skb) return NULL; } =20 +static struct sk_buff *ksz_common_xmit(struct sk_buff *skb, + struct net_device *dev, + bool do_tstamp, + u8 prio, + u8 override_mask) +{ + struct dsa_port *dp =3D dsa_user_to_port(dev); + struct ethhdr *hdr; + u8 *tag; + + if (skb->ip_summed =3D=3D CHECKSUM_PARTIAL && skb_checksum_help(skb)) + return NULL; + + /* Tag encoding */ + if (do_tstamp) + ksz_xmit_timestamp(dp, skb); + + tag =3D skb_put(skb, KSZ_INGRESS_TAG_LEN); + hdr =3D skb_eth_hdr(skb); + + *tag =3D dsa_xmit_port_mask(skb, dev); + *tag |=3D prio; + + if (is_link_local_ether_addr(hdr->h_dest)) + *tag |=3D override_mask; + + return ksz_defer_xmit(dp, skb); +} + static struct sk_buff *ksz9477_xmit(struct sk_buff *skb, struct net_device *dev) { @@ -339,35 +306,67 @@ static const struct dsa_device_ops ksz9477_netdev_ops= =3D { DSA_TAG_DRIVER(ksz9477_netdev_ops); MODULE_ALIAS_DSA_TAG_DRIVER(DSA_TAG_PROTO_KSZ9477, KSZ9477_NAME); =20 -#define KSZ9893_TAIL_TAG_PRIO GENMASK(4, 3) -#define KSZ9893_TAIL_TAG_OVERRIDE BIT(5) -#define KSZ9893_TAIL_TAG_LOOKUP BIT(6) +/* + * For Ingress (Host -> KSZ8795), 1 byte is added before FCS. + * -----------------------------------------------------------------------= ---- + * DA(6bytes)|SA(6bytes)|....|Data(nbytes)|tag(1byte)|FCS(4bytes) + * -----------------------------------------------------------------------= ---- + * tag : each bit represents port (eg, 0x01=3Dport1, 0x02=3Dport2, 0x10=3D= port5) + * + * For Egress (KSZ8795 -> Host), 1 byte is added before FCS. + * -----------------------------------------------------------------------= ---- + * DA(6bytes)|SA(6bytes)|....|Data(nbytes)|tag0(1byte)|FCS(4bytes) + * -----------------------------------------------------------------------= ---- + * tag0 : zero-based value represents port + * (eg, 0x0=3Dport1, 0x2=3Dport3, 0x3=3Dport4) + */ =20 -static struct sk_buff *ksz9893_xmit(struct sk_buff *skb, - struct net_device *dev) +#define KSZ8795_TAIL_TAG_EG_PORT_M GENMASK(1, 0) +#define KSZ8795_TAIL_TAG_OVERRIDE BIT(6) +#define KSZ8795_TAIL_TAG_LOOKUP BIT(7) + +static struct sk_buff *ksz8795_xmit(struct sk_buff *skb, struct net_device= *dev) +{ + return ksz_common_xmit(skb, dev, false, 0, KSZ8795_TAIL_TAG_OVERRIDE); +} + +static struct sk_buff *ksz8795_rcv(struct sk_buff *skb, struct net_device = *dev) { - u16 queue_mapping =3D skb_get_queue_mapping(skb); - u8 prio =3D netdev_txq_to_tc(dev, queue_mapping); - struct dsa_port *dp =3D dsa_user_to_port(dev); - struct ethhdr *hdr; u8 *tag; =20 - if (skb->ip_summed =3D=3D CHECKSUM_PARTIAL && skb_checksum_help(skb)) + if (skb_linearize(skb)) return NULL; =20 - /* Tag encoding */ - ksz_xmit_timestamp(dp, skb); + tag =3D skb_tail_pointer(skb) - KSZ_EGRESS_TAG_LEN; =20 - tag =3D skb_put(skb, KSZ_INGRESS_TAG_LEN); - hdr =3D skb_eth_hdr(skb); + return ksz_common_rcv(skb, dev, tag[0] & KSZ8795_TAIL_TAG_EG_PORT_M, + KSZ_EGRESS_TAG_LEN); +} =20 - *tag =3D dsa_xmit_port_mask(skb, dev); - *tag |=3D FIELD_PREP(KSZ9893_TAIL_TAG_PRIO, prio); +static const struct dsa_device_ops ksz8795_netdev_ops =3D { + .name =3D KSZ8795_NAME, + .proto =3D DSA_TAG_PROTO_KSZ8795, + .xmit =3D ksz8795_xmit, + .rcv =3D ksz8795_rcv, + .needed_tailroom =3D KSZ_INGRESS_TAG_LEN, +}; =20 - if (is_link_local_ether_addr(hdr->h_dest)) - *tag |=3D KSZ9893_TAIL_TAG_OVERRIDE; +DSA_TAG_DRIVER(ksz8795_netdev_ops); +MODULE_ALIAS_DSA_TAG_DRIVER(DSA_TAG_PROTO_KSZ8795, KSZ8795_NAME); =20 - return ksz_defer_xmit(dp, skb); +#define KSZ9893_TAIL_TAG_PRIO GENMASK(4, 3) +#define KSZ9893_TAIL_TAG_OVERRIDE BIT(5) +#define KSZ9893_TAIL_TAG_LOOKUP BIT(6) + +static struct sk_buff *ksz9893_xmit(struct sk_buff *skb, + struct net_device *dev) +{ + u16 queue_mapping =3D skb_get_queue_mapping(skb); + u8 prio =3D netdev_txq_to_tc(dev, queue_mapping); + + return ksz_common_xmit(skb, dev, true, + FIELD_PREP(KSZ9893_TAIL_TAG_PRIO, prio), + KSZ9893_TAIL_TAG_OVERRIDE); } =20 static const struct dsa_device_ops ksz9893_netdev_ops =3D { --=20 2.53.0 From nobody Tue Apr 7 17:15:30 2026 Received: from smtpout-04.galae.net (smtpout-04.galae.net [185.171.202.116]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1596735A3B1 for ; Thu, 26 Feb 2026 16:42:10 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="aY4Dt9I3" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-04.galae.net (Postfix) with ESMTPS id 2128DC4069E; Thu, 26 Feb 2026 16:42:25 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id 999965FDE9; Thu, 26 Feb 2026 16:42:09 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id B57DB103693FE; Thu, 26 Feb 2026 17:42:06 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1772124128; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=LIWPK5v4kauktcENJzQ+X9YyyIohLYTZEqoF2EsTY+c=; b=aY4Dt9I3d2tiKk9YzF+v/1igs16R8tkgeeepV6b4NhXlnzL3nACoVYsve3x2V0P+T+ZPBt ge9Ay9oDjgmYUIPmWJpYHSzufd1PHBbH4/IHy7Urm8nCnC/ndK74pbwInyN4EhZ8xOBVW2 V5WM8laj6SaubJJgVYEAE6KeK1IfBx0jsrDKD59O4pJ3zMXL12amOM0lL5dNvBY+CjJWkF giRZj0v49ErsoWSKkEnDCscATRQWThDEmpbSdmdFTT/IaDLtqLGcUkxWQYtC9xzuqchgh1 CDr/5JMjs4A1jNWfFPuY11+NXvAzQy+7WUQ0zhFO+qmwxeTXdooiQ4bWlwUvRg== From: "Bastien Curutchet (Schneider Electric)" Date: Thu, 26 Feb 2026 17:41:53 +0100 Subject: [PATCH net-next v5 6/9] net: dsa: microchip: Add KSZ8463 tail tag handling Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260226-ksz8463-ptp-v5-6-1bc24fb9627d@bootlin.com> References: <20260226-ksz8463-ptp-v5-0-1bc24fb9627d@bootlin.com> In-Reply-To: <20260226-ksz8463-ptp-v5-0-1bc24fb9627d@bootlin.com> To: Woojung Huh , UNGLinuxDriver@microchip.com, Andrew Lunn , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Richard Cochran , Simon Horman Cc: Pascal Eberhard , =?utf-8?q?Miqu=C3=A8l_Raynal?= , Thomas Petazzoni , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, "Bastien Curutchet (Schneider Electric)" X-Mailer: b4 0.14.2 X-Last-TLS-Session-Version: TLSv1.3 KSZ8463 uses the KSZ9893 DSA TAG driver. However, the KSZ8463 doesn't use the tail tag to convey timestamps to the host as KSZ9893 does. It uses the reserved fields in the PTP header instead. Add a KSZ8463-specifig DSA_TAG driver to handle KSZ8463 timestamps. There is no information in the tail tag to distinguish PTP packets from others so use the ptp_classify_raw() helper to find the PTP packets and extract the timestamp from their PTP headers. Signed-off-by: Bastien Curutchet (Schneider Electric) --- drivers/net/dsa/microchip/ksz_common.c | 5 ++- include/net/dsa.h | 2 ++ net/dsa/tag_ksz.c | 62 ++++++++++++++++++++++++++++++= ++++ 3 files changed, 68 insertions(+), 1 deletion(-) diff --git a/drivers/net/dsa/microchip/ksz_common.c b/drivers/net/dsa/micro= chip/ksz_common.c index 7deeb0b86793bab4818a7e70bc468346ec8f22e3..4b36a3b88f49363273e72d19f96= 25e542bff1b06 100644 --- a/drivers/net/dsa/microchip/ksz_common.c +++ b/drivers/net/dsa/microchip/ksz_common.c @@ -3580,8 +3580,10 @@ static enum dsa_tag_protocol ksz_get_tag_protocol(st= ruct dsa_switch *ds, if (ksz_is_ksz87xx(dev) || ksz_is_8895_family(dev)) proto =3D DSA_TAG_PROTO_KSZ8795; =20 + if (dev->chip_id =3D=3D KSZ8463_CHIP_ID) + proto =3D DSA_TAG_PROTO_KSZ8463; + if (dev->chip_id =3D=3D KSZ88X3_CHIP_ID || - dev->chip_id =3D=3D KSZ8463_CHIP_ID || dev->chip_id =3D=3D KSZ8563_CHIP_ID || dev->chip_id =3D=3D KSZ9893_CHIP_ID || dev->chip_id =3D=3D KSZ9563_CHIP_ID) @@ -3609,6 +3611,7 @@ static int ksz_connect_tag_protocol(struct dsa_switch= *ds, switch (proto) { case DSA_TAG_PROTO_KSZ8795: return 0; + case DSA_TAG_PROTO_KSZ8463: case DSA_TAG_PROTO_KSZ9893: case DSA_TAG_PROTO_KSZ9477: case DSA_TAG_PROTO_LAN937X: diff --git a/include/net/dsa.h b/include/net/dsa.h index 6c17446f3dcc29682e07a70362bae8d8fa6233b0..e854cde8b400c2f47e5c474460e= 914e1abbf8984 100644 --- a/include/net/dsa.h +++ b/include/net/dsa.h @@ -58,6 +58,7 @@ struct tc_action; #define DSA_TAG_PROTO_YT921X_VALUE 30 #define DSA_TAG_PROTO_MXL_GSW1XX_VALUE 31 #define DSA_TAG_PROTO_MXL862_VALUE 32 +#define DSA_TAG_PROTO_KSZ8463_VALUE 33 =20 enum dsa_tag_protocol { DSA_TAG_PROTO_NONE =3D DSA_TAG_PROTO_NONE_VALUE, @@ -93,6 +94,7 @@ enum dsa_tag_protocol { DSA_TAG_PROTO_YT921X =3D DSA_TAG_PROTO_YT921X_VALUE, DSA_TAG_PROTO_MXL_GSW1XX =3D DSA_TAG_PROTO_MXL_GSW1XX_VALUE, DSA_TAG_PROTO_MXL862 =3D DSA_TAG_PROTO_MXL862_VALUE, + DSA_TAG_PROTO_KSZ8463 =3D DSA_TAG_PROTO_KSZ8463_VALUE, }; =20 struct dsa_switch; diff --git a/net/dsa/tag_ksz.c b/net/dsa/tag_ksz.c index 6ec9bcb324a953d988ef665a177566159e27027f..310390ce08c207a1d872de8ffc4= ce1f301f0f1c7 100644 --- a/net/dsa/tag_ksz.c +++ b/net/dsa/tag_ksz.c @@ -12,6 +12,7 @@ =20 #include "tag.h" =20 +#define KSZ8463_NAME "ksz8463" #define KSZ8795_NAME "ksz8795" #define KSZ9477_NAME "ksz9477" #define KSZ9893_NAME "ksz9893" @@ -382,6 +383,66 @@ static const struct dsa_device_ops ksz9893_netdev_ops = =3D { DSA_TAG_DRIVER(ksz9893_netdev_ops); MODULE_ALIAS_DSA_TAG_DRIVER(DSA_TAG_PROTO_KSZ9893, KSZ9893_NAME); =20 +#define KSZ8463_TAIL_TAG_PRIO GENMASK(4, 3) +#define KSZ8463_TAIL_TAG_EG_PORT_M GENMASK(2, 0) + +static struct sk_buff *ksz8463_xmit(struct sk_buff *skb, + struct net_device *dev) +{ + u16 queue_mapping =3D skb_get_queue_mapping(skb); + u8 prio =3D netdev_txq_to_tc(dev, queue_mapping); + + return ksz_common_xmit(skb, dev, false, + FIELD_PREP(KSZ8463_TAIL_TAG_PRIO, prio), + 0); +} + +static struct sk_buff *ksz8463_rcv(struct sk_buff *skb, struct net_device = *dev) +{ + unsigned int len =3D KSZ_EGRESS_TAG_LEN; + struct ptp_header *ptp_hdr; + unsigned int ptp_class; + unsigned int port; + ktime_t tstamp; + u8 *tag; + + if (skb_linearize(skb)) + return NULL; + + /* Tag decoding */ + tag =3D skb_tail_pointer(skb) - KSZ_EGRESS_TAG_LEN; + port =3D tag[0] & KSZ8463_TAIL_TAG_EG_PORT_M; + + __skb_push(skb, ETH_HLEN); + ptp_class =3D ptp_classify_raw(skb); + __skb_pull(skb, ETH_HLEN); + if (ptp_class =3D=3D PTP_CLASS_NONE) + goto common_rcv; + + ptp_hdr =3D ptp_parse_header(skb, ptp_class); + if (ptp_hdr) { + tstamp =3D ksz_decode_tstamp(get_unaligned_be32(&ptp_hdr->reserved2)); + KSZ_SKB_CB(skb)->tstamp =3D tstamp; + ptp_hdr->reserved2 =3D 0; + } + +common_rcv: + return ksz_common_rcv(skb, dev, port, len); +} + +static const struct dsa_device_ops ksz8463_netdev_ops =3D { + .name =3D KSZ8463_NAME, + .proto =3D DSA_TAG_PROTO_KSZ8463, + .xmit =3D ksz8463_xmit, + .rcv =3D ksz8463_rcv, + .connect =3D ksz_connect, + .disconnect =3D ksz_disconnect, + .needed_tailroom =3D KSZ_INGRESS_TAG_LEN, +}; + +DSA_TAG_DRIVER(ksz8463_netdev_ops); +MODULE_ALIAS_DSA_TAG_DRIVER(DSA_TAG_PROTO_KSZ8463, KSZ8463_NAME); + /* For xmit, 2/6 bytes are added before FCS. * -----------------------------------------------------------------------= ---- * DA(6bytes)|SA(6bytes)|....|Data(nbytes)|ts(4bytes)|tag0(1byte)|tag1(1by= te)| @@ -452,6 +513,7 @@ DSA_TAG_DRIVER(lan937x_netdev_ops); MODULE_ALIAS_DSA_TAG_DRIVER(DSA_TAG_PROTO_LAN937X, LAN937X_NAME); =20 static struct dsa_tag_driver *dsa_tag_driver_array[] =3D { + &DSA_TAG_DRIVER_NAME(ksz8463_netdev_ops), &DSA_TAG_DRIVER_NAME(ksz8795_netdev_ops), &DSA_TAG_DRIVER_NAME(ksz9477_netdev_ops), &DSA_TAG_DRIVER_NAME(ksz9893_netdev_ops), --=20 2.53.0 From nobody Tue Apr 7 17:15:30 2026 Received: from smtpout-04.galae.net (smtpout-04.galae.net [185.171.202.116]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B64563603FF; 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arc=none smtp.client-ip=185.171.202.116 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="Ofbv5Pfw" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-04.galae.net (Postfix) with ESMTPS id 0832FC4069A; Thu, 26 Feb 2026 16:42:27 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id 831075FDE9; Thu, 26 Feb 2026 16:42:11 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 0BFAE10369400; Thu, 26 Feb 2026 17:42:08 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1772124130; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=BM70wedB5BIrTblJ0yiBQDSz3cBgb8SIrmVMNTczivk=; b=Ofbv5PfwRikNXNeeH0xk0CSs+2XLipnneE+rfcABwtVDICPVvDT/KkjwK4IfIt2BBZLSbL QlMLJfuNQT2q2rCQvZbLLZTtTOB8sTtZQg693iNW5DwKn3IKidEcxbFWBPQgu2mW2uw0Vr d/R0GfqeAcDamNAWSjuG2tMVnoqwvXvhvfjRLeSezG4aUQAPfuOwItsVWB53Hab7PJucZH dGcctFGwgQL0ORLHA0DRN6sdbb6/RgAnoOKzTv68nP6mnyjCbzqbBphGAVDW8R1tH0dWVp gDRiEh95NtbzDapgGJWbLjww5konl7JBcDZZf/cdVW8IRvQktOC3m1BxxkRhdw== From: "Bastien Curutchet (Schneider Electric)" Date: Thu, 26 Feb 2026 17:41:54 +0100 Subject: [PATCH net-next v5 7/9] net: dsa: microchip: Explicitly enable detection of L2 PTP frames Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260226-ksz8463-ptp-v5-7-1bc24fb9627d@bootlin.com> References: <20260226-ksz8463-ptp-v5-0-1bc24fb9627d@bootlin.com> In-Reply-To: <20260226-ksz8463-ptp-v5-0-1bc24fb9627d@bootlin.com> To: Woojung Huh , UNGLinuxDriver@microchip.com, Andrew Lunn , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Richard Cochran , Simon Horman Cc: Pascal Eberhard , =?utf-8?q?Miqu=C3=A8l_Raynal?= , Thomas Petazzoni , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, "Bastien Curutchet (Schneider Electric)" X-Mailer: b4 0.14.2 X-Last-TLS-Session-Version: TLSv1.3 Detection of L2 PTP frames needs to be enabled for PTP to work at the L2 layer. The bit enabling this detection is set by default on the switches currently supported by the driver, but it is unset by default on the KSZ8463 for which support will be added in upcoming patches. Explicitly enable the detection of L2 PTP frames for all switches when PTP is enabled. Signed-off-by: Bastien Curutchet (Schneider Electric) --- drivers/net/dsa/microchip/ksz_ptp.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/net/dsa/microchip/ksz_ptp.c b/drivers/net/dsa/microchi= p/ksz_ptp.c index 5daadf62689e6d60ab32e7a5a6c1f3fac3024b87..7eb033157f226b1169bc184d715= 69328e9a20a5b 100644 --- a/drivers/net/dsa/microchip/ksz_ptp.c +++ b/drivers/net/dsa/microchip/ksz_ptp.c @@ -947,8 +947,8 @@ int ksz_ptp_clock_register(struct dsa_switch *ds) /* Currently only P2P mode is supported. When 802_1AS bit is set, it * forwards all PTP packets to host port and none to other ports. */ - ret =3D ksz_rmw16(dev, regs[PTP_MSG_CONF1], PTP_TC_P2P | PTP_802_1AS, - PTP_TC_P2P | PTP_802_1AS); + ret =3D ksz_rmw16(dev, regs[PTP_MSG_CONF1], PTP_TC_P2P | PTP_802_1AS | PT= P_ETH_ENABLE, + PTP_TC_P2P | PTP_802_1AS | PTP_ETH_ENABLE); if (ret) return ret; =20 --=20 2.53.0 From nobody Tue Apr 7 17:15:30 2026 Received: from smtpout-04.galae.net (smtpout-04.galae.net [185.171.202.116]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 978844418C8 for ; Thu, 26 Feb 2026 16:42:14 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.171.202.116 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772124135; cv=none; b=m1LOuUXq/EqrdihfzO1d+vYqGqM2dsmRM5zzJIfRlUE8TZ071KIOBt7FPDIuij1NyzZJxYnkKun8KX9pazVwP5lWOpON9Wxga31wu96VCzcngZGfXHJAmtBh5iLa+xvYhsQguZsGZ43yyOxN668Q4szshpN0toPoK7Au/AENsqk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772124135; c=relaxed/simple; bh=hlNmX8QTYbudhIP0ciMy+y3TsWJoFdhR3w6eV7zimz0=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=cOvObaewv4ca8qV6YroJBTWKNB+QDjFbjt3k0XRbVhO0RiC4awMhBHKee0i7mmYXsff+oMCB+uYIu0yMp5EvJWZFmeVrmgnJHP3BRl8uwys240UaHU7TEd/lo+by/VEjbnDWEKQ3p73oobB306VII7ycRGzFsuNHUKhzUjM1/Cg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=F7iKHZQa; arc=none smtp.client-ip=185.171.202.116 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="F7iKHZQa" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-04.galae.net (Postfix) with ESMTPS id E662EC4069B for ; Thu, 26 Feb 2026 16:42:28 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id 6AB7C5FDE9; Thu, 26 Feb 2026 16:42:13 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id F2F26103693FF; Thu, 26 Feb 2026 17:42:10 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1772124132; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=RT79xI7c4HyPB3ciXHZP+9zR0KZk+cQOgHzcyMyuvrY=; b=F7iKHZQav4qKLuG2+TDGqE4ovB/Jt8Ir0/86ZM8S42jTYVZzJ01nbuN2+Fxnf61NVxag7z WYYmoanlIL+OJXKZ400MIwoXHqx0JqeX5YGomf2/gygZGgNc+q28rdZf7juEXmSlmNu9nj YjuWee6oTrJZFEIeT4OIBIk3f5u2IgU96STx1eK9OVoTKKPkxDrSpyaXCBB9HiJE9tCUgc tQvzVXlW3t4OSgJTIYos4B0Mjov/o6uJk4ikJauOtz3QUfGsWfFkrqwyf4ch99D0Yt7ogQ mM9jqboPmWgaqtU5mzylMglok3Y6Pe+QuQNNZYoUKPjbJC7ZvObYxdAvP4n1vQ== From: "Bastien Curutchet (Schneider Electric)" Date: Thu, 26 Feb 2026 17:41:55 +0100 Subject: [PATCH net-next v5 8/9] net: dsa: microchip: Adapt port offset for KSZ8463's PTP register Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260226-ksz8463-ptp-v5-8-1bc24fb9627d@bootlin.com> References: <20260226-ksz8463-ptp-v5-0-1bc24fb9627d@bootlin.com> In-Reply-To: <20260226-ksz8463-ptp-v5-0-1bc24fb9627d@bootlin.com> To: Woojung Huh , UNGLinuxDriver@microchip.com, Andrew Lunn , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Richard Cochran , Simon Horman Cc: Pascal Eberhard , =?utf-8?q?Miqu=C3=A8l_Raynal?= , Thomas Petazzoni , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, "Bastien Curutchet (Schneider Electric)" X-Mailer: b4 0.14.2 X-Last-TLS-Session-Version: TLSv1.3 In KSZ8463 register's layout, the offset between port 1 and port 2 registers isn't the same in the generic control register area than in the PTP register area. The get_port_addr() always uses the same offset so it doesn't work when it's used to access PTP registers. Adapt the port offset in get_port_addr() when the accessed register is in the PTP area. Signed-off-by: Bastien Curutchet (Schneider Electric) --- drivers/net/dsa/microchip/ksz8.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/net/dsa/microchip/ksz8.c b/drivers/net/dsa/microchip/k= sz8.c index c354abdafc1b542a32c276ef939a90db30c67f55..a05527899b8bab6d53509ba38c5= 8101b79e98ee5 100644 --- a/drivers/net/dsa/microchip/ksz8.c +++ b/drivers/net/dsa/microchip/ksz8.c @@ -2020,6 +2020,9 @@ u32 ksz8_get_port_addr(int port, int offset) =20 u32 ksz8463_get_port_addr(int port, int offset) { + if (offset >=3D KSZ8463_PTP_CLK_CTRL) + return offset + 0x20 * port; + return offset + 0x18 * port; } =20 --=20 2.53.0 From nobody Tue Apr 7 17:15:30 2026 Received: from smtpout-04.galae.net (smtpout-04.galae.net [185.171.202.116]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7929244A73E; Thu, 26 Feb 2026 16:42:16 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.171.202.116 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772124137; cv=none; b=bF7l0jmL2DofMAWMnmGZItEjhqGU9PYTnEqV/GBgoYaMPt+aav6qcdP1pupGDjg9bnLarJqF3YQQ3GRp+2ds/5xygqkH8VFMSScCdc/pcX+iLsxHYllzPG9E2YvQ2nwHFQJxSBN6Qs3urGk43EGHfPRdz0OxlVXotRJ/ehr2B5M= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772124137; c=relaxed/simple; bh=KRmKGQBWH+ts0/8aEiIDuVI5DrNundB/A7IAzt1uPew=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=nqgpDdyOBOUj9hz7rNCfkTSZHKlc6OYXua+Ni3V6vlT1OnvqRKjPGGdYA/KaKozFN2ARbGBdk2is2lZt+XYbN0H+aDvjR9FoOHSngCRL9WdPaYgqRiF20zkhYjvqVAgXbGGlRuhkvyw79wkNXNoc7tA/Gpt71cGMSszZCraE1+A= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=swyeQXgP; arc=none smtp.client-ip=185.171.202.116 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="swyeQXgP" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-04.galae.net (Postfix) with ESMTPS id A70F5C4069A; Thu, 26 Feb 2026 16:42:30 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id 2F1045FDE9; Thu, 26 Feb 2026 16:42:15 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id CEE7D10369401; Thu, 26 Feb 2026 17:42:12 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1772124134; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=wc0PGEj/+qz44Y7I/+GAB4/Qv1uHFLPLhpqG4sAl0N0=; b=swyeQXgPW5vmCBKn/fa7Y+0qy348cjjwn7GRfpBVbWKq/77uo9Gl5//H+HqLFU1mJSGIJ3 1JPhZ9RYXdWG6UUtAuBG33kk8wrJKSMcJ6DFAFsjr8o9O8b7i3DuBqqUwEbhetQeasG+AB Rpyb1DF640x9HCiVejR/NpcJAfAy78nUvQQ6TabC7FInPAYL8aXAsgPcBTtfsWFIbkbslb 1+1+4S/BKuB9dhi8OYyHS8VCkW3YlTKl5deBadDZsgv91ECfNuOgWabhIQW77oYP95tLzq P65Kg7Kxlg50ZtMGRZ7bU8xYcxIIPaV+w9H/SvMJcRnD4gnMJr0dIUAuMc4DUQ== From: "Bastien Curutchet (Schneider Electric)" Date: Thu, 26 Feb 2026 17:41:56 +0100 Subject: [PATCH net-next v5 9/9] net: dsa: microchip: Add two-step PTP support for KSZ8463 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260226-ksz8463-ptp-v5-9-1bc24fb9627d@bootlin.com> References: <20260226-ksz8463-ptp-v5-0-1bc24fb9627d@bootlin.com> In-Reply-To: <20260226-ksz8463-ptp-v5-0-1bc24fb9627d@bootlin.com> To: Woojung Huh , UNGLinuxDriver@microchip.com, Andrew Lunn , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Richard Cochran , Simon Horman Cc: Pascal Eberhard , =?utf-8?q?Miqu=C3=A8l_Raynal?= , Thomas Petazzoni , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, "Bastien Curutchet (Schneider Electric)" X-Mailer: b4 0.14.2 X-Last-TLS-Session-Version: TLSv1.3 The KSZ8463 switch supports PTP but it's not supported by driver. Add L2 two-step PTP support for the KSZ8463. IPv4 and IPv6 layers aren't supported. Neither is one-step PTP. The pdelay_req and pdelay_resp timestamps share one interrupt bit status while they're located in two different registers. So introduce last_tx_is_pdelayresp to keep track of the last sent event type. This flag is set by the xmit worker right before sending the packet and then used in the interrupt handler to retrieve the timestamp location. Signed-off-by: Bastien Curutchet (Schneider Electric) --- drivers/net/dsa/microchip/ksz8.c | 9 ++--- drivers/net/dsa/microchip/ksz8_reg.h | 1 + drivers/net/dsa/microchip/ksz_common.c | 1 + drivers/net/dsa/microchip/ksz_common.h | 1 + drivers/net/dsa/microchip/ksz_ptp.c | 72 ++++++++++++++++++++++++++++-= ---- drivers/net/dsa/microchip/ksz_ptp_reg.h | 4 ++ 6 files changed, 71 insertions(+), 17 deletions(-) diff --git a/drivers/net/dsa/microchip/ksz8.c b/drivers/net/dsa/microchip/k= sz8.c index a05527899b8bab6d53509ba38c58101b79e98ee5..f4dfdbd52b9daeab8a0134fb09c= f4c960d9d9409 100644 --- a/drivers/net/dsa/microchip/ksz8.c +++ b/drivers/net/dsa/microchip/ksz8.c @@ -143,9 +143,9 @@ int ksz8_reset_switch(struct ksz_device *dev) KSZ8863_GLOBAL_SOFTWARE_RESET | KSZ8863_PCS_RESET, false); } else if (ksz_is_ksz8463(dev)) { ksz_cfg(dev, KSZ8463_REG_SW_RESET, - KSZ8463_GLOBAL_SOFTWARE_RESET, true); + KSZ8463_GLOBAL_SOFTWARE_RESET | KSZ8463_PTP_SOFTWARE_RESET, true); ksz_cfg(dev, KSZ8463_REG_SW_RESET, - KSZ8463_GLOBAL_SOFTWARE_RESET, false); + KSZ8463_GLOBAL_SOFTWARE_RESET | KSZ8463_PTP_SOFTWARE_RESET, false); } else { /* reset switch */ ksz_write8(dev, REG_POWER_MANAGEMENT_1, @@ -1763,10 +1763,7 @@ void ksz8_config_cpu_port(struct dsa_switch *ds) COPPER_RECEIVE_ADJUSTMENT, 0); } =20 - /* Turn off PTP function as the switch's proprietary way of - * handling timestamp is not supported in current Linux PTP - * stack implementation. - */ + /* Turn off PTP function as the switch enables it by default */ regmap_update_bits(ksz_regmap_16(dev), KSZ8463_PTP_MSG_CONF1, PTP_ENABLE, 0); diff --git a/drivers/net/dsa/microchip/ksz8_reg.h b/drivers/net/dsa/microch= ip/ksz8_reg.h index 332408567b473c141c3695328a524f257f2cfc70..0558740ae57738fa7e4a8f3f429= 254033c54af12 100644 --- a/drivers/net/dsa/microchip/ksz8_reg.h +++ b/drivers/net/dsa/microchip/ksz8_reg.h @@ -765,6 +765,7 @@ #define KSZ8463_REG_SW_RESET 0x126 =20 #define KSZ8463_GLOBAL_SOFTWARE_RESET BIT(0) +#define KSZ8463_PTP_SOFTWARE_RESET BIT(2) =20 #define KSZ8463_PTP_CLK_CTRL 0x600 =20 diff --git a/drivers/net/dsa/microchip/ksz_common.c b/drivers/net/dsa/micro= chip/ksz_common.c index 4b36a3b88f49363273e72d19f9625e542bff1b06..1ba0d27b56bd56e9faeb295968f= 9d3deb02a1b64 100644 --- a/drivers/net/dsa/microchip/ksz_common.c +++ b/drivers/net/dsa/microchip/ksz_common.c @@ -1512,6 +1512,7 @@ const struct ksz_chip_data ksz_switch_chips[] =3D { .supports_mii =3D {false, false, true}, .supports_rmii =3D {false, false, true}, .internal_phy =3D {true, true, false}, + .ptp_capable =3D true, }, =20 [KSZ8563] =3D { diff --git a/drivers/net/dsa/microchip/ksz_common.h b/drivers/net/dsa/micro= chip/ksz_common.h index dfbc3d13daca8d7a8b9d3ffe6a7c1ec9927863f2..1fface82086eed87749d4702b04= 6fcab313663e9 100644 --- a/drivers/net/dsa/microchip/ksz_common.h +++ b/drivers/net/dsa/microchip/ksz_common.h @@ -150,6 +150,7 @@ struct ksz_port { struct kernel_hwtstamp_config tstamp_config; bool hwts_tx_en; bool hwts_rx_en; + bool last_tx_is_pdelayresp; struct ksz_irq ptpirq; struct ksz_ptp_irq ptpmsg_irq[3]; ktime_t tstamp_msg; diff --git a/drivers/net/dsa/microchip/ksz_ptp.c b/drivers/net/dsa/microchi= p/ksz_ptp.c index 7eb033157f226b1169bc184d71569328e9a20a5b..c6a85bdf87b1791f7841948cea3= ff82bd840c545 100644 --- a/drivers/net/dsa/microchip/ksz_ptp.c +++ b/drivers/net/dsa/microchip/ksz_ptp.c @@ -308,15 +308,20 @@ int ksz_get_ts_info(struct dsa_switch *ds, int port, = struct kernel_ethtool_ts_in SOF_TIMESTAMPING_RX_HARDWARE | SOF_TIMESTAMPING_RAW_HARDWARE; =20 - ts->tx_types =3D BIT(HWTSTAMP_TX_OFF) | BIT(HWTSTAMP_TX_ONESTEP_P2P); + ts->tx_types =3D BIT(HWTSTAMP_TX_OFF); =20 - if (is_lan937x(dev)) + if (!ksz_is_ksz8463(dev)) + ts->tx_types |=3D BIT(HWTSTAMP_TX_ONESTEP_P2P); + + if (is_lan937x(dev) || ksz_is_ksz8463(dev)) ts->tx_types |=3D BIT(HWTSTAMP_TX_ON); =20 ts->rx_filters =3D BIT(HWTSTAMP_FILTER_NONE) | - BIT(HWTSTAMP_FILTER_PTP_V2_L4_EVENT) | - BIT(HWTSTAMP_FILTER_PTP_V2_L2_EVENT) | - BIT(HWTSTAMP_FILTER_PTP_V2_EVENT); + BIT(HWTSTAMP_FILTER_PTP_V2_L2_EVENT); + if (!ksz_is_ksz8463(dev)) { + ts->rx_filters |=3D BIT(HWTSTAMP_FILTER_PTP_V2_L4_EVENT) | + BIT(HWTSTAMP_FILTER_PTP_V2_EVENT); + } =20 ts->phc_index =3D ptp_clock_index(ptp_data->clock); =20 @@ -353,6 +358,9 @@ static int ksz_set_hwtstamp_config(struct ksz_device *d= ev, prt->hwts_tx_en =3D false; break; case HWTSTAMP_TX_ONESTEP_P2P: + if (ksz_is_ksz8463(dev)) + return -ERANGE; + prt->ptpmsg_irq[KSZ_SYNC_MSG].ts_en =3D false; prt->ptpmsg_irq[KSZ_XDREQ_MSG].ts_en =3D true; prt->ptpmsg_irq[KSZ_PDRES_MSG].ts_en =3D false; @@ -364,14 +372,19 @@ static int ksz_set_hwtstamp_config(struct ksz_device = *dev, =20 break; case HWTSTAMP_TX_ON: - if (!is_lan937x(dev)) + if (!is_lan937x(dev) && !ksz_is_ksz8463(dev)) return -ERANGE; =20 - prt->ptpmsg_irq[KSZ_SYNC_MSG].ts_en =3D true; - prt->ptpmsg_irq[KSZ_XDREQ_MSG].ts_en =3D true; - prt->ptpmsg_irq[KSZ_PDRES_MSG].ts_en =3D true; - prt->hwts_tx_en =3D true; + if (ksz_is_ksz8463(dev)) { + prt->ptpmsg_irq[KSZ8463_SYNC_MSG].ts_en =3D true; + prt->ptpmsg_irq[KSZ8463_XDREQ_PDRES_MSG].ts_en =3D true; + } else { + prt->ptpmsg_irq[KSZ_SYNC_MSG].ts_en =3D true; + prt->ptpmsg_irq[KSZ_XDREQ_MSG].ts_en =3D true; + prt->ptpmsg_irq[KSZ_PDRES_MSG].ts_en =3D true; + } =20 + prt->hwts_tx_en =3D true; ret =3D ksz_rmw16(dev, regs[PTP_MSG_CONF1], PTP_1STEP, 0); if (ret) return ret; @@ -387,6 +400,8 @@ static int ksz_set_hwtstamp_config(struct ksz_device *d= ev, break; case HWTSTAMP_FILTER_PTP_V2_L4_EVENT: case HWTSTAMP_FILTER_PTP_V2_L4_SYNC: + if (ksz_is_ksz8463(dev)) + return -ERANGE; config->rx_filter =3D HWTSTAMP_FILTER_PTP_V2_L4_EVENT; prt->hwts_rx_en =3D true; break; @@ -397,6 +412,8 @@ static int ksz_set_hwtstamp_config(struct ksz_device *d= ev, break; case HWTSTAMP_FILTER_PTP_V2_EVENT: case HWTSTAMP_FILTER_PTP_V2_SYNC: + if (ksz_is_ksz8463(dev)) + return -ERANGE; config->rx_filter =3D HWTSTAMP_FILTER_PTP_V2_EVENT; prt->hwts_rx_en =3D true; break; @@ -565,6 +582,27 @@ static void ksz_ptp_txtstamp_skb(struct ksz_device *de= v, skb_complete_tx_timestamp(skb, &hwtstamps); } =20 +static void ksz8463_set_pdelayresp_flag(struct ksz_port *prt, struct sk_bu= ff *skb) +{ + struct ptp_header *hdr; + unsigned int type; + u8 ptp_msg_type; + + if (!ksz_is_ksz8463(prt->ksz_dev)) + return; + + type =3D ptp_classify_raw(skb); + if (type =3D=3D PTP_CLASS_NONE) + return; + + hdr =3D ptp_parse_header(skb, type); + if (!hdr) + return; + + ptp_msg_type =3D ptp_get_msgtype(hdr, type); + prt->last_tx_is_pdelayresp =3D (ptp_msg_type =3D=3D PTP_MSGTYPE_PDELAY_RE= SP); +} + void ksz_port_deferred_xmit(struct kthread_work *work) { struct ksz_deferred_xmit_work *xmit_work =3D work_to_xmit_work(work); @@ -581,6 +619,8 @@ void ksz_port_deferred_xmit(struct kthread_work *work) =20 reinit_completion(&prt->tstamp_msg_comp); =20 + ksz8463_set_pdelayresp_flag(prt, skb); + dsa_enqueue_skb(skb, skb->dev); =20 ksz_ptp_txtstamp_skb(dev, prt, clone); @@ -972,7 +1012,17 @@ void ksz_ptp_clock_unregister(struct dsa_switch *ds) =20 static int ksz_read_ts(struct ksz_port *port, u16 reg, u32 *ts) { - return ksz_read32(port->ksz_dev, reg, ts); + u16 ts_reg =3D reg; + + /** + * On KSZ8463 DREQ and DRESP timestamps share one interrupt line + * so we have to check the nature of the latest event sent to know + * where the timestamp is located + */ + if (ksz_is_ksz8463(port->ksz_dev) && port->last_tx_is_pdelayresp) + ts_reg +=3D KSZ8463_DRESP_TS_OFFSET; + + return ksz_read32(port->ksz_dev, ts_reg, ts); } =20 static irqreturn_t ksz_ptp_msg_thread_fn(int irq, void *dev_id) diff --git a/drivers/net/dsa/microchip/ksz_ptp_reg.h b/drivers/net/dsa/micr= ochip/ksz_ptp_reg.h index e80fb4bd1a0e970ba3570374d3dc82c8e2cc15b4..ac9d0f2b348b0469abbeed0e645= fe8ef441d35fb 100644 --- a/drivers/net/dsa/microchip/ksz_ptp_reg.h +++ b/drivers/net/dsa/microchip/ksz_ptp_reg.h @@ -125,6 +125,10 @@ #define KSZ8463_REG_PORT_SYNC_TS 0x064C #define KSZ8463_REG_PORT_DRESP_TS 0x0650 =20 +#define KSZ8463_DRESP_TS_OFFSET (KSZ8463_REG_PORT_DRESP_TS - KSZ8463_REG_= PORT_DREQ_TS) +#define KSZ8463_SYNC_MSG 0 +#define KSZ8463_XDREQ_PDRES_MSG 1 + #define REG_PTP_PORT_TX_INT_STATUS__2 0x0C14 #define REG_PTP_PORT_TX_INT_ENABLE__2 0x0C16 =20 --=20 2.53.0