From nobody Tue Apr 7 15:30:35 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6DE88396D06; Thu, 26 Feb 2026 08:54:15 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772096055; cv=none; b=fCjvghcmu/11FM7uX3GUPG5TGMD6fpk/fkynFihsz2TLkvIjtJW8V9oLsrjdgA4R3fJE/Yu5zdzd7UPHTx5+jzFGCepcm6fOScYRWFJyaqcsobtMR+ykIDONHO4AiReBncmiKczdY0uZpc5AFGtp5Jvr8JM6Bj/S8ENCzduxCXk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772096055; c=relaxed/simple; bh=Q9V6sTMaJ2pd7d5NGrdgzvEcNvyFxJE7OuvaMwzwrfQ=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=E85Hjd/WeiuiP9/lJWy8BURnne43Azfkcu4GpeI1o3znMEPWA8eDCK4lbsto24C8CeArP6xbMdRv7SlGw7TqMRtpLaXGskpVDg3pdFt4M+gw+IBho3onrZdilfDhGwrxiHKwkLSGElovPN6v9hMxogTPy1l49dKkUEl8F1CQ/PQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=OEnTesdL; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="OEnTesdL" Received: by smtp.kernel.org (Postfix) with ESMTPS id 0DE03C19424; Thu, 26 Feb 2026 08:54:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1772096055; bh=Q9V6sTMaJ2pd7d5NGrdgzvEcNvyFxJE7OuvaMwzwrfQ=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=OEnTesdLTXh3CRG5FMziIXiU5v7UC1fFPXvISlCawSgWNkNG00f6jobgbp4NEqCTG w4d80TikFRuNdyWYoIaWZCjXtiG+vMVxxdu0HNFaQKTwrniV7JU9JxNOuJnvV3hCfT 2HqVLHXm6AsXZYWY7uYtNTWSJPKRIEi/W89Jf8uVVX7zanc/nQ+OX7WK3pJ2lUozjN /1l5Nso20pqtJixJo070o2aImKJLEKti3AQZRW2XYaFWDm/9zAOpmtDWIPqdrodQ7Z IDYAGRyGfXZENuxjdkz9gMGuAHBQRi966HOd0ZNnFPvBOVzK4Mo9VIyYQAjPwpKPVt MThc4+jlmWUjQ== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id EE62AFC5913; Thu, 26 Feb 2026 08:54:14 +0000 (UTC) From: Jan Petrous via B4 Relay Date: Thu, 26 Feb 2026 09:54:06 +0100 Subject: [PATCH v7 1/5] net: stmmac: Use helper macro for loop over queue-based arrays Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260226-dwmac_multi_irq-v7-1-f8fe3b945bb4@oss.nxp.com> References: <20260226-dwmac_multi_irq-v7-0-f8fe3b945bb4@oss.nxp.com> In-Reply-To: <20260226-dwmac_multi_irq-v7-0-f8fe3b945bb4@oss.nxp.com> To: Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Maxime Coquelin , Alexandre Torgue , Chester Lin , Matthias Brugger , Ghennadi Procopciuc , NXP S32 Linux Team , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Frank Li Cc: netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, imx@lists.linux.dev, devicetree@vger.kernel.org, rmk+kernel@armlinux.org.uk, vladimir.oltean@nxp.com, boon.khai.ng@altera.com, "Jan Petrous (OSS)" X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1772096053; l=4143; i=jan.petrous@oss.nxp.com; s=20240922; h=from:subject:message-id; bh=AN9BxArjvT+LtwWtaoyDzsO4XeDTxufZg6uDwPtH3+8=; b=qx4zViXLhquemljUdcK9/hePoUKUSGDPdEFSLQaAUKxdNbrTHqfA5yznxNKgqzJbgLNjeQe5h HwPpAWooWzzCnl0hEP7EkpABcn72M2PYEy57NzXZsGL5wKXTtsMpsUG X-Developer-Key: i=jan.petrous@oss.nxp.com; a=ed25519; pk=Ke3wwK7rb2Me9UQRf6vR8AsfJZfhTyoDaxkUCqmSWYY= X-Endpoint-Received: by B4 Relay for jan.petrous@oss.nxp.com/20240922 with auth_id=217 X-Original-From: "Jan Petrous (OSS)" Reply-To: jan.petrous@oss.nxp.com From: "Jan Petrous (OSS)" The stmmac driver contains similar pattern for processing queue-based arrays, ie. interrupt lines, etc. Factor out the for loop and provide a macro STMMAC_FOREACH_MTL_QUEUE(var, limit). Signed-off-by: Jan Petrous (OSS) --- drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c | 2 +- drivers/net/ethernet/stmicro/stmmac/stmmac.h | 3 +++ drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 16 ++++++++-------- 3 files changed, 12 insertions(+), 9 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c b/drivers/= net/ethernet/stmicro/stmmac/dwxgmac2_core.c index 49893b9fb88c..3890e82c69f6 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c @@ -233,7 +233,7 @@ static void dwxgmac2_prog_mtl_tx_algorithms(struct mac_= device_info *hw, writel(value, ioaddr + XGMAC_MTL_OPMODE); =20 /* Set ETS if desired */ - for (i =3D 0; i < MTL_MAX_TX_QUEUES; i++) { + STMMAC_FOREACH_MTL_QUEUE(i, MTL_MAX_TX_QUEUES) { value =3D readl(ioaddr + XGMAC_MTL_TCx_ETS_CONTROL(i)); value &=3D ~XGMAC_TSA; if (ets) diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac.h b/drivers/net/eth= ernet/stmicro/stmmac/stmmac.h index 51c96a738151..c972ad8e79f8 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac.h +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac.h @@ -382,6 +382,9 @@ enum stmmac_state { =20 extern const struct dev_pm_ops stmmac_simple_pm_ops; =20 +#define STMMAC_FOREACH_MTL_QUEUE(var, limit) \ + for (var =3D 0; var < (limit); var++) + int stmmac_mdio_unregister(struct net_device *ndev); int stmmac_mdio_register(struct net_device *ndev); int stmmac_mdio_reset(struct mii_bus *mii); diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/ne= t/ethernet/stmicro/stmmac/stmmac_main.c index edf0799b7236..b920ca17b2be 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c @@ -3875,7 +3875,7 @@ static int stmmac_request_irq_multi_msi(struct net_de= vice *dev) } =20 /* Request Rx MSI irq */ - for (i =3D 0; i < priv->plat->rx_queues_to_use; i++) { + STMMAC_FOREACH_MTL_QUEUE(i, priv->plat->rx_queues_to_use) { if (i >=3D MTL_MAX_RX_QUEUES) break; if (priv->rx_irq[i] =3D=3D 0) @@ -3899,7 +3899,7 @@ static int stmmac_request_irq_multi_msi(struct net_de= vice *dev) } =20 /* Request Tx MSI irq */ - for (i =3D 0; i < priv->plat->tx_queues_to_use; i++) { + STMMAC_FOREACH_MTL_QUEUE(i, priv->plat->tx_queues_to_use) { if (i >=3D MTL_MAX_TX_QUEUES) break; if (priv->tx_irq[i] =3D=3D 0) @@ -4084,10 +4084,10 @@ static int __stmmac_open(struct net_device *dev, struct stmmac_dma_conf *dma_conf) { struct stmmac_priv *priv =3D netdev_priv(dev); + int ret, i; u32 chan; - int ret; =20 - for (int i =3D 0; i < MTL_MAX_TX_QUEUES; i++) + STMMAC_FOREACH_MTL_QUEUE(i, MTL_MAX_TX_QUEUES) if (priv->dma_conf.tx_queue[i].tbs & STMMAC_TBS_EN) dma_conf->tx_queue[i].tbs =3D priv->dma_conf.tx_queue[i].tbs; memcpy(&priv->dma_conf, dma_conf, sizeof(*dma_conf)); @@ -7734,9 +7734,9 @@ static int __stmmac_dvr_probe(struct device *device, priv->device =3D device; priv->dev =3D ndev; =20 - for (i =3D 0; i < MTL_MAX_RX_QUEUES; i++) + STMMAC_FOREACH_MTL_QUEUE(i, MTL_MAX_RX_QUEUES) u64_stats_init(&priv->xstats.rxq_stats[i].napi_syncp); - for (i =3D 0; i < MTL_MAX_TX_QUEUES; i++) { + STMMAC_FOREACH_MTL_QUEUE(i, MTL_MAX_TX_QUEUES) { u64_stats_init(&priv->xstats.txq_stats[i].q_syncp); u64_stats_init(&priv->xstats.txq_stats[i].napi_syncp); } @@ -7759,9 +7759,9 @@ static int __stmmac_dvr_probe(struct device *device, priv->sfty_irq =3D res->sfty_irq; priv->sfty_ce_irq =3D res->sfty_ce_irq; priv->sfty_ue_irq =3D res->sfty_ue_irq; - for (i =3D 0; i < MTL_MAX_RX_QUEUES; i++) + STMMAC_FOREACH_MTL_QUEUE(i, MTL_MAX_RX_QUEUES) priv->rx_irq[i] =3D res->rx_irq[i]; - for (i =3D 0; i < MTL_MAX_TX_QUEUES; i++) + STMMAC_FOREACH_MTL_QUEUE(i, MTL_MAX_TX_QUEUES) priv->tx_irq[i] =3D res->tx_irq[i]; =20 if (!is_zero_ether_addr(res->mac)) --=20 2.47.0 From nobody Tue Apr 7 15:30:36 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6DD9C396D05; Thu, 26 Feb 2026 08:54:15 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772096055; cv=none; b=esjvSgXWndo5I1c2DQ0qJFN+9TnUzgqG72i3c7AqS3C8ZGK44WliQIbt8bOMyBTYW0cBReYnC2dNAP36foi5tpXRk4eIO4JqFh1P0Ive/xPwROuAXUnVj3xT6VYNHnzQo4NQHPvE3v3xLVSn1W2+0Ktr39Lgk6MFYnOBL5/I0jk= ARC-Message-Signature: i=1; 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b=JbWLH3cy0ujfAt5EGN+yK9a/6D295YSMQHj5z0WyS4EMUf94rHTXOwcXK2CU4vRvH ZCI9Rbz7vVs93LcgZiHBZAPrWr146Z6poTxLfS/7/v1trp4Xh0PfpYCv29ISm8Vlb/ Ee0u77S7WngUKaXLw5ER3bAawwXasvuTTs1h7SMqumNUEYOwfVoAOxWjjLWm28YDGO zm39NE880+jWm2ZZ+4u38d4560QYNX1FA4SfwwZeZxDV1t7aR3QwOGmcsghZpzNYz0 2VXnuik7ncLDkuIeOSPHD/LwuPHuRbvVGXekaVAPR6BD8yh5z4WeIjZHpY93KGTHQI KbTUvEfUBrflA== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 12A8AFC590F; Thu, 26 Feb 2026 08:54:15 +0000 (UTC) From: Jan Petrous via B4 Relay Date: Thu, 26 Feb 2026 09:54:07 +0100 Subject: [PATCH v7 2/5] net: stmmac: platform: read channels irq Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260226-dwmac_multi_irq-v7-2-f8fe3b945bb4@oss.nxp.com> References: <20260226-dwmac_multi_irq-v7-0-f8fe3b945bb4@oss.nxp.com> In-Reply-To: <20260226-dwmac_multi_irq-v7-0-f8fe3b945bb4@oss.nxp.com> To: Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Maxime Coquelin , Alexandre Torgue , Chester Lin , Matthias Brugger , Ghennadi Procopciuc , NXP S32 Linux Team , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Frank Li Cc: netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, imx@lists.linux.dev, devicetree@vger.kernel.org, rmk+kernel@armlinux.org.uk, vladimir.oltean@nxp.com, boon.khai.ng@altera.com, "Jan Petrous (OSS)" X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1772096053; l=2366; i=jan.petrous@oss.nxp.com; s=20240922; h=from:subject:message-id; bh=B8c7aRywEeVNEcViOxgmKHLxUkmd8vB8bY3PlIZqha4=; b=nyhyzPI1D0afCBmRHglDGqjiujEUV363kenRORGy0ZtLu65WQkn+154GaEcVDysPIpFaont+e bJn7AI8bHxUA4VnxSpuYmF2wK09phvW/u3tYVvS7En+hvpFj63S0NJZ X-Developer-Key: i=jan.petrous@oss.nxp.com; a=ed25519; pk=Ke3wwK7rb2Me9UQRf6vR8AsfJZfhTyoDaxkUCqmSWYY= X-Endpoint-Received: by B4 Relay for jan.petrous@oss.nxp.com/20240922 with auth_id=217 X-Original-From: "Jan Petrous (OSS)" Reply-To: jan.petrous@oss.nxp.com From: "Jan Petrous (OSS)" Read IRQ resources for all rx/tx channels, to allow Multi-IRQ mode for platform glue drivers. Reviewed-by: Matthias Brugger Signed-off-by: Jan Petrous (OSS) --- .../net/ethernet/stmicro/stmmac/stmmac_platform.c | 46 ++++++++++++++++++= +++- 1 file changed, 45 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c b/driver= s/net/ethernet/stmicro/stmmac/stmmac_platform.c index 5c9fd91a1db9..93bd915ab6eb 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c @@ -697,9 +697,40 @@ struct clk *stmmac_pltfr_find_clk(struct plat_stmmacen= et_data *plat_dat, } EXPORT_SYMBOL_GPL(stmmac_pltfr_find_clk); =20 +static int stmmac_pltfr_get_queue_irqs(struct platform_device *pdev, + struct stmmac_resources *stmmac_res, + bool tx) +{ + int *irqs =3D tx ? &stmmac_res->tx_irq[0] : &stmmac_res->rx_irq[0]; + char name[16]; + int i; + + /* RX channels irq */ + STMMAC_FOREACH_MTL_QUEUE(i, MTL_MAX_RX_QUEUES) { + scnprintf(name, sizeof(name), "%cx-queue-%d", + tx ? 't' : 'r', i); + + irqs[i] =3D platform_get_irq_byname_optional(pdev, name); + if (irqs[i] <=3D 0) { + if (irqs[i] =3D=3D -EPROBE_DEFER) + return -EPROBE_DEFER; + + dev_dbg(&pdev->dev, "IRQ %s not found\n", name); + + /* Stop on first unset rx/tx-queue-%i property member */ + irqs[i] =3D 0; + break; + } + } + + return 0; +} + int stmmac_get_platform_resources(struct platform_device *pdev, struct stmmac_resources *stmmac_res) { + int ret; + memset(stmmac_res, 0, sizeof(*stmmac_res)); =20 /* Get IRQ information early to have an ability to ask for deferred @@ -735,7 +766,20 @@ int stmmac_get_platform_resources(struct platform_devi= ce *pdev, =20 stmmac_res->addr =3D devm_platform_ioremap_resource(pdev, 0); =20 - return PTR_ERR_OR_ZERO(stmmac_res->addr); + if (IS_ERR(stmmac_res->addr)) + return PTR_ERR(stmmac_res->addr); + + /* TX channels irq */ + ret =3D stmmac_pltfr_get_queue_irqs(pdev, stmmac_res, true); + if (ret) + return ret; + + /* RX channels irq */ + ret =3D stmmac_pltfr_get_queue_irqs(pdev, stmmac_res, false); + if (ret) + return ret; + + return 0; } EXPORT_SYMBOL_GPL(stmmac_get_platform_resources); =20 --=20 2.47.0 From nobody Tue Apr 7 15:30:36 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5DDC1396B9C; Thu, 26 Feb 2026 08:54:15 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772096055; cv=none; b=G3uJi5qvaRN7odgx2lufOsiYgzb8TRLXr0ORYVmq83axBHZnbxkBFuGMJxLK3JhFSjwPS4UiibnU3jBx3+oLMEZLJo2Njm6QWceXeANXTtD2vByHEAhG4kVUOIqfxGwxl7LbjnBonx14Xc9TvzEVt5uamItGXkKH8UBHQpeaQlw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772096055; c=relaxed/simple; bh=t5KwaNb/RUlMNvnjAQljSY30lTI+e060jlUtQ9txKe8=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=s2pluPaZi6zjVaWn/lzmDgAMMrSE9tMkCn0yOK9Vb54pUs+WYP6DyeLBfN61eiveprfLbujJFkkwjwjzEIF2TDn9f1Epi1udl7Shdy1W7p32zYkZAG+qI2tnZlzYXAv0keWGDO/EFIrlqXUQIxUZrZMj5Q8p7aeb8zO/kRl9IC8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=SOqGR2Om; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="SOqGR2Om" Received: by smtp.kernel.org (Postfix) with ESMTPS id 348EEC2BC9E; Thu, 26 Feb 2026 08:54:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1772096055; bh=t5KwaNb/RUlMNvnjAQljSY30lTI+e060jlUtQ9txKe8=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=SOqGR2OmEHLVawxw6UrEIUfJE8opEBGZGSRHumChI+FX0LUnul6kF4V0ucCKUs+PR lLPMWsLDIOnBrEwn6DTFtGEY0rUOSES48zS2QOf5NaXMr+MozAhLqFnCSMRbOvU61i Y+ElHSlQf+gJTR0E7SEUBnxNwKddh6zScLSD8c7Y4/XCIYk6Nd6zY2Iv4BLpFB30Fj Q9pp5AFtdtrlVjKERhxSN45GRo8fQPqoWFNeRoBjGTYx9Hf12ldJ8snq1MLjnny9na mZg59Vqz5yUV9UsdWDOdNP0WKrfzL2PrxwNaH9T1E32xQWzfTntX/JbKR9BDvwXdCk gfD03qWBda1xw== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 255D3FC5914; Thu, 26 Feb 2026 08:54:15 +0000 (UTC) From: Jan Petrous via B4 Relay Date: Thu, 26 Feb 2026 09:54:08 +0100 Subject: [PATCH v7 3/5] arm64: dts: s32: set Ethernet channel irqs Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260226-dwmac_multi_irq-v7-3-f8fe3b945bb4@oss.nxp.com> References: <20260226-dwmac_multi_irq-v7-0-f8fe3b945bb4@oss.nxp.com> In-Reply-To: <20260226-dwmac_multi_irq-v7-0-f8fe3b945bb4@oss.nxp.com> To: Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Maxime Coquelin , Alexandre Torgue , Chester Lin , Matthias Brugger , Ghennadi Procopciuc , NXP S32 Linux Team , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Frank Li Cc: netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, imx@lists.linux.dev, devicetree@vger.kernel.org, rmk+kernel@armlinux.org.uk, vladimir.oltean@nxp.com, boon.khai.ng@altera.com, "Jan Petrous (OSS)" X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1772096053; l=4163; i=jan.petrous@oss.nxp.com; s=20240922; h=from:subject:message-id; bh=GJtLVXXJ6B4rcW9eI+Zdnzjbg44iN/frnopr12Ti4EU=; b=SEVgjkS/0MfgQSmf+fu8YnMhxcr6nTtyan8b7iwjxEpDFTWw869WM4YvBIw+HMQZ/bVWay5na AiM2pLSpte9AgCYqLbaiqXQMFr0jpqGtk7pwcGTgIb5rbYKr1U+lIcs X-Developer-Key: i=jan.petrous@oss.nxp.com; a=ed25519; pk=Ke3wwK7rb2Me9UQRf6vR8AsfJZfhTyoDaxkUCqmSWYY= X-Endpoint-Received: by B4 Relay for jan.petrous@oss.nxp.com/20240922 with auth_id=217 X-Original-From: "Jan Petrous (OSS)" Reply-To: jan.petrous@oss.nxp.com From: "Jan Petrous (OSS)" The GMAC Ethernet controller found on S32G2/S32G3 and S32R45 contains up to 5 RX and 5 TX channels. It can operate in two interrupt modes: 1) Sharing IRQ mode: only MAC IRQ line is used for all channels. 2) Multiple IRQ mode: every channel uses two IRQ lines, one for RX and second for TX. Specify all IRQ twins for all channels. Reviewed-by: Matthias Brugger Signed-off-by: Jan Petrous (OSS) --- arch/arm64/boot/dts/freescale/s32g2.dtsi | 26 +++++++++++++++++++++++--- arch/arm64/boot/dts/freescale/s32g3.dtsi | 26 +++++++++++++++++++++++--- 2 files changed, 46 insertions(+), 6 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/s32g2.dtsi b/arch/arm64/boot/dts= /freescale/s32g2.dtsi index 51d00dac12de..5a553d503137 100644 --- a/arch/arm64/boot/dts/freescale/s32g2.dtsi +++ b/arch/arm64/boot/dts/freescale/s32g2.dtsi @@ -3,7 +3,7 @@ * NXP S32G2 SoC family * * Copyright (c) 2021 SUSE LLC - * Copyright 2017-2021, 2024-2025 NXP + * Copyright 2017-2021, 2024-2026 NXP */ =20 #include @@ -732,8 +732,28 @@ gmac0: ethernet@4033c000 { reg =3D <0x4033c000 0x2000>, /* gmac IP */ <0x4007c004 0x4>; /* GMAC_0_CTRL_STS */ interrupt-parent =3D <&gic>; - interrupts =3D ; - interrupt-names =3D "macirq"; + interrupts =3D , + /* CHN 0: tx, rx */ + , + , + /* CHN 1: tx, rx */ + , + , + /* CHN 2: tx, rx */ + , + , + /* CHN 3: tx, rx */ + , + , + /* CHN 4: tx, rx */ + , + ; + interrupt-names =3D "macirq", + "tx-queue-0", "rx-queue-0", + "tx-queue-1", "rx-queue-1", + "tx-queue-2", "rx-queue-2", + "tx-queue-3", "rx-queue-3", + "tx-queue-4", "rx-queue-4"; snps,mtl-rx-config =3D <&mtl_rx_setup>; snps,mtl-tx-config =3D <&mtl_tx_setup>; status =3D "disabled"; diff --git a/arch/arm64/boot/dts/freescale/s32g3.dtsi b/arch/arm64/boot/dts= /freescale/s32g3.dtsi index e314f3c7d61d..b43e6f001f4d 100644 --- a/arch/arm64/boot/dts/freescale/s32g3.dtsi +++ b/arch/arm64/boot/dts/freescale/s32g3.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) /* - * Copyright 2021-2025 NXP + * Copyright 2021-2026 NXP * * Authors: Ghennadi Procopciuc * Ciprian Costea @@ -809,8 +809,28 @@ gmac0: ethernet@4033c000 { reg =3D <0x4033c000 0x2000>, /* gmac IP */ <0x4007c004 0x4>; /* GMAC_0_CTRL_STS */ interrupt-parent =3D <&gic>; - interrupts =3D ; - interrupt-names =3D "macirq"; + interrupts =3D , + /* CHN 0: tx, rx */ + , + , + /* CHN 1: tx, rx */ + , + , + /* CHN 2: tx, rx */ + , + , + /* CHN 3: tx, rx */ + , + , + /* CHN 4: tx, rx */ + , + ; + interrupt-names =3D "macirq", + "tx-queue-0", "rx-queue-0", + "tx-queue-1", "rx-queue-1", + "tx-queue-2", "rx-queue-2", + "tx-queue-3", "rx-queue-3", + "tx-queue-4", "rx-queue-4"; snps,mtl-rx-config =3D <&mtl_rx_setup>; snps,mtl-tx-config =3D <&mtl_tx_setup>; status =3D "disabled"; --=20 2.47.0 From nobody Tue Apr 7 15:30:36 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 83CDC396D24; Thu, 26 Feb 2026 08:54:15 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772096055; cv=none; b=h8mRVIoxMgNszY6rqKVJjm7Rd2m1G/JWvW+v6TnQl76ynSjIMwyya+I7YJv/R2laO3xY4OaLu1adX7oo/LVJa8k7bTCh6soWX61NIOpnSc88x4bEwJUyEIZstVAzYuEsEeh850SAIhPY+s1+LxyJ929H162FYxVA/7xJlS0Ajbc= ARC-Message-Signature: i=1; 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b=NBmEEySyjir0pNKDyl8fZ8qAfnmFnYbxr9lDgyxpvgXoQ/+zgaz0MfudOEH09W4hh M8rKq+oPF9Ehx6tzMETgWhGSmhd0oUHM7dkoG8CpItZ2N3H5a1y94rWWpuk3Y4H/0L rMXHs4PkPLV7UPPdAawLMLfnnR1WYblzIhRQ7xtLkuO57pce3vmUxZZtSIF8do9DoC 9ejFCjVFFUViZjGdJFxUt7o4fSRWm4wIUpQx4D3TbOb2R4KfvufJov1AiyVp3l3zWM lAYtpBL7a1iF63GMo23vxuhIgAoTKjY2L/Hvfjy3OMI6rapDSqn3KFgLevqlwAuFv/ nlec5xtKVfZcA== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 38AF2FC5916; Thu, 26 Feb 2026 08:54:15 +0000 (UTC) From: Jan Petrous via B4 Relay Date: Thu, 26 Feb 2026 09:54:09 +0100 Subject: [PATCH v7 4/5] dt-bindings: net: nxp,s32-dwmac: Declare per-queue interrupts Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260226-dwmac_multi_irq-v7-4-f8fe3b945bb4@oss.nxp.com> References: <20260226-dwmac_multi_irq-v7-0-f8fe3b945bb4@oss.nxp.com> In-Reply-To: <20260226-dwmac_multi_irq-v7-0-f8fe3b945bb4@oss.nxp.com> To: Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Maxime Coquelin , Alexandre Torgue , Chester Lin , Matthias Brugger , Ghennadi Procopciuc , NXP S32 Linux Team , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Frank Li Cc: netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, imx@lists.linux.dev, devicetree@vger.kernel.org, rmk+kernel@armlinux.org.uk, vladimir.oltean@nxp.com, boon.khai.ng@altera.com, "Jan Petrous (OSS)" X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1772096053; l=3455; i=jan.petrous@oss.nxp.com; s=20240922; h=from:subject:message-id; bh=Ulgz8SoBFJZWXNyBqoPUpgpX/c4gObaapFU2nTXzIJo=; b=UT9Qnilg/WovbJ350EVFkkHtyTiIJ/8YySev0ZAZqayVGhbPMzLEiSpapf65FmRkFN42GTtjD jsQfEpx3uCsAnn+P+DQUXtsW/Pt4oKRObdxxyWJxA2CxT7ahzuivfgj X-Developer-Key: i=jan.petrous@oss.nxp.com; a=ed25519; pk=Ke3wwK7rb2Me9UQRf6vR8AsfJZfhTyoDaxkUCqmSWYY= X-Endpoint-Received: by B4 Relay for jan.petrous@oss.nxp.com/20240922 with auth_id=217 X-Original-From: "Jan Petrous (OSS)" Reply-To: jan.petrous@oss.nxp.com From: "Jan Petrous (OSS)" The DWMAC IP on NXP S32G/R SoCs has connected queue-based IRQ lines, set them to allow using Multi-IRQ mode. Reviewed-by: Matthias Brugger Reviewed-by: Rob Herring (Arm) Signed-off-by: Jan Petrous (OSS) --- .../devicetree/bindings/net/nxp,s32-dwmac.yaml | 44 ++++++++++++++++++= +--- 1 file changed, 39 insertions(+), 5 deletions(-) diff --git a/Documentation/devicetree/bindings/net/nxp,s32-dwmac.yaml b/Doc= umentation/devicetree/bindings/net/nxp,s32-dwmac.yaml index 1b2934f3c87c..3a0e41b63c3d 100644 --- a/Documentation/devicetree/bindings/net/nxp,s32-dwmac.yaml +++ b/Documentation/devicetree/bindings/net/nxp,s32-dwmac.yaml @@ -1,5 +1,5 @@ # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) -# Copyright 2021-2024 NXP +# Copyright 2021-2026 NXP %YAML 1.2 --- $id: http://devicetree.org/schemas/net/nxp,s32-dwmac.yaml# @@ -16,6 +16,8 @@ description: the SoC S32R45 has two instances. The devices can use RGMII/RMII/MII interface over Pinctrl device or the output can be routed to the embedded SerDes for SGMII connectivity. + The DWMAC instances have connected all RX/TX queues interrupts, + enabling load balancing of data traffic across all CPU cores. =20 properties: compatible: @@ -45,10 +47,22 @@ properties: FlexTimer Modules connect to GMAC_0. =20 interrupts: - maxItems: 1 + minItems: 11 + maxItems: 11 =20 interrupt-names: - const: macirq + items: + - const: macirq + - const: tx-queue-0 + - const: rx-queue-0 + - const: tx-queue-1 + - const: rx-queue-1 + - const: tx-queue-2 + - const: rx-queue-2 + - const: tx-queue-3 + - const: rx-queue-3 + - const: tx-queue-4 + - const: rx-queue-4 =20 clocks: items: @@ -88,8 +102,28 @@ examples: <0x0 0x4007c004 0x0 0x4>; /* GMAC_0_CTRL_STS */ nxp,phy-sel =3D <&gpr 0x4>; interrupt-parent =3D <&gic>; - interrupts =3D ; - interrupt-names =3D "macirq"; + interrupts =3D , + /* CHN 0: tx, rx */ + , + , + /* CHN 1: tx, rx */ + , + , + /* CHN 2: tx, rx */ + , + , + /* CHN 3: tx, rx */ + , + , + /* CHN 4: tx, rx */ + , + ; + interrupt-names =3D "macirq", + "tx-queue-0", "rx-queue-0", + "tx-queue-1", "rx-queue-1", + "tx-queue-2", "rx-queue-2", + "tx-queue-3", "rx-queue-3", + "tx-queue-4", "rx-queue-4"; snps,mtl-rx-config =3D <&mtl_rx_setup>; snps,mtl-tx-config =3D <&mtl_tx_setup>; clocks =3D <&clks 24>, <&clks 17>, <&clks 16>, <&clks 15>; --=20 2.47.0 From nobody Tue Apr 7 15:30:36 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9A8ED396D36; Thu, 26 Feb 2026 08:54:15 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772096055; cv=none; b=DJK2d9GYbjFNdK14DcQA0xrKVzkDz0FM+22IuQeiU7+h1LUDm28CZGGmIthg0eY2qlisVe5aarwUKsWEqkz8er6SdftGhecsBfKoQJCKqWhSyzC5OgKuC+u8zoGnlFXLkkHqdEM5BO4CgZ9hxz2htDFrBa+dCxKWGyzkvtwMBtM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772096055; c=relaxed/simple; bh=1wg2w5Y5/YzQPQzVr+3ynFChKDaTwYad7mRHpb7T0TQ=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=em0fcwJZS0fK8S0fEl+ZzWai5j9+gINq9sIGWezycSUJBtfgX4Kx5PWmZt4kNeTJgbvzOpyA8fPblNZj51YZU02QT/i+HWNVG8TE2ijqpcprQ5h3YEyjR5ea1q9+Ube13fiyL9TRcPZ5tAQy3gISqwsGk/d5hHtFTN0+Q0Kd3jc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=GhibQRGh; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="GhibQRGh" Received: by smtp.kernel.org (Postfix) with ESMTPS id 5749EC4AF0B; Thu, 26 Feb 2026 08:54:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1772096055; bh=1wg2w5Y5/YzQPQzVr+3ynFChKDaTwYad7mRHpb7T0TQ=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=GhibQRGh9R+/lKyptF5a++nhpPERpYyQpH4klbV+ayzRGG72pA9NcxW1MWU3FgPvy SwIh4shk+21rXYLfmYTH146kgSbNYcyw2ESQg1iZ3SwnNj8JdMNRjo5EaqbzHvK2h7 hZA2jrAcvvqQPTPfohLag6AMVCPTp1zGA6yAE1SCXPzoPnaO/r6ruwlvv5nZjsDVOC c++kkg8izPatQ6uBQ7SVVWR+TEW3qC1N2DmP+5tzNa+owTaoSR+jCXk8qFi4Hm1fqp HVSpVqRtjVJRZRl/CrVjerfwtOSmVY1gHvUiI+AYxgKwppYw6iJ3TicnyJNk+j0Pd5 FCZnoyoTbZu/w== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4BF63FC5913; Thu, 26 Feb 2026 08:54:15 +0000 (UTC) From: Jan Petrous via B4 Relay Date: Thu, 26 Feb 2026 09:54:10 +0100 Subject: [PATCH v7 5/5] stmmac: s32: enable support for Multi-IRQ mode Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260226-dwmac_multi_irq-v7-5-f8fe3b945bb4@oss.nxp.com> References: <20260226-dwmac_multi_irq-v7-0-f8fe3b945bb4@oss.nxp.com> In-Reply-To: <20260226-dwmac_multi_irq-v7-0-f8fe3b945bb4@oss.nxp.com> To: Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Maxime Coquelin , Alexandre Torgue , Chester Lin , Matthias Brugger , Ghennadi Procopciuc , NXP S32 Linux Team , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Frank Li Cc: netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, imx@lists.linux.dev, devicetree@vger.kernel.org, rmk+kernel@armlinux.org.uk, vladimir.oltean@nxp.com, boon.khai.ng@altera.com, "Jan Petrous (OSS)" X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1772096053; l=4698; i=jan.petrous@oss.nxp.com; s=20240922; h=from:subject:message-id; bh=VhNXhFN3LNj9piUSrvcU0j8rDNgFhxjzRPwBQhKPqME=; b=rTW1rgW36BQG9W8vhkdKo7i6hmx+oypOULuNvBZ5/0qDzBjtlxCqiaQlJURwJpJiF4XimoTj8 8ueaAAj16BHCBfMwqaYvjTc9ApHWVRh/Cv+QywNIFf19DhyZvU3/plF X-Developer-Key: i=jan.petrous@oss.nxp.com; a=ed25519; pk=Ke3wwK7rb2Me9UQRf6vR8AsfJZfhTyoDaxkUCqmSWYY= X-Endpoint-Received: by B4 Relay for jan.petrous@oss.nxp.com/20240922 with auth_id=217 X-Original-From: "Jan Petrous (OSS)" Reply-To: jan.petrous@oss.nxp.com From: "Jan Petrous (OSS)" Based on previous changes in platform driver, the vendor glue driver can enable Multi-IRQ mode, if needed. To get enabled Multi-IRQ mode for dwmac-s32, the driver checks: 1) property of 'snps,mtl-xx-config' subnode defines 'snps,xx-queues-to-use' bigger then one, ie: ethernet@4033c000 { compatible =3D "nxp,s32g2-dwmac"; ... snps,mtl-rx-config =3D <&mtl_rx_setup>; ... mtl_rx_setup: rx-queues-config { snps,rx-queues-to-use =3D <2>; }; 2) queue based IRQs are set, ie: ethernet@4033c000 { compatible =3D "nxp,s32g2-dwmac"; ... interrupts =3D , /* CHN 0: tx, rx */ , , /* CHN 1: tx, rx */ , ; interrupt-names =3D "macirq", "tx-queue-0", "rx-queue-0", "tx-queue-1", "rx-queue-1"; If those prerequisites are met, the driver switch to Multi-IRQ mode, using per-queue IRQs for rx/tx data pathr: [ 1.387045] s32-dwmac 4033c000.ethernet: Multi-IRQ mode (per queue IRQs)= selected Now the driver owns all queues IRQs: root@s32g399aevb3:~# grep eth /proc/interrupts 29: 0 0 0 0 0 0 0 0 GICv3 89 Level eth0:mac 30: 0 0 0 0 0 0 0 0 GICv3 91 Level eth0:rx-0 31: 0 0 0 0 0 0 0 0 GICv3 93 Level eth0:rx-1 32: 0 0 0 0 0 0 0 0 GICv3 95 Level eth0:rx-2 33: 0 0 0 0 0 0 0 0 GICv3 97 Level eth0:rx-3 34: 0 0 0 0 0 0 0 0 GICv3 99 Level eth0:rx-4 35: 0 0 0 0 0 0 0 0 GICv3 90 Level eth0:tx-0 36: 0 0 0 0 0 0 0 0 GICv3 92 Level eth0:tx-1 37: 0 0 0 0 0 0 0 0 GICv3 94 Level eth0:tx-2 38: 0 0 0 0 0 0 0 0 GICv3 96 Level eth0:tx-3 39: 0 0 0 0 0 0 0 0 GICv3 98 Level eth0:tx-4 Otherwise, if one of the prerequisite don't met, the driver continue with MAC IRQ mode: [ 1.387045] s32-dwmac 4033c000.ethernet: MAC IRQ mode selected And only MAC IRQ will be attached: root@s32g399aevb3:~# grep eth /proc/interrupts 29: 0 0 0 0 0 0 0 0 GICv3 89 Level eth0:mac What represents the original MAC IRQ mode and is fully backward compatible. Reviewed-by: Matthias Brugger Signed-off-by: Jan Petrous (OSS) --- drivers/net/ethernet/stmicro/stmmac/dwmac-s32.c | 36 +++++++++++++++++++++= +++- 1 file changed, 35 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-s32.c b/drivers/net/= ethernet/stmicro/stmmac/dwmac-s32.c index af594a096676..03e014c10d3f 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-s32.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-s32.c @@ -2,7 +2,7 @@ /* * NXP S32G/R GMAC glue layer * - * Copyright 2019-2024 NXP + * Copyright 2019-2026 NXP * */ =20 @@ -110,6 +110,37 @@ static void s32_gmac_exit(struct device *dev, void *pr= iv) clk_disable_unprepare(gmac->rx_clk); } =20 +static void s32_gmac_validate_multi_irq(struct device *dev, + struct plat_stmmacenet_data *plat, + struct stmmac_resources *res) +{ + int i; + + /* RX IRQs */ + STMMAC_FOREACH_MTL_QUEUE(i, plat->rx_queues_to_use) { + if (res->rx_irq[i] <=3D 0) { + dev_dbg(dev, "Missing RX queue %d interrupt\n", i); + goto no_multi_irq; + } + } + + /* TX IRQs */ + STMMAC_FOREACH_MTL_QUEUE(i, plat->tx_queues_to_use) { + if (res->tx_irq[i] <=3D 0) { + dev_dbg(dev, "Missing TX queue %d interrupt\n", i); + goto no_multi_irq; + } + } + + plat->flags |=3D STMMAC_FLAG_MULTI_MSI_EN; + dev_info(dev, "Multi-IRQ mode (per queue IRQs) selected\n"); + return; + +no_multi_irq: + plat->flags &=3D ~STMMAC_FLAG_MULTI_MSI_EN; + dev_info(dev, "MAC IRQ mode selected\n"); +} + static int s32_dwmac_probe(struct platform_device *pdev) { struct plat_stmmacenet_data *plat; @@ -165,6 +196,9 @@ static int s32_dwmac_probe(struct platform_device *pdev) plat->core_type =3D DWMAC_CORE_GMAC4; plat->pmt =3D 1; plat->flags |=3D STMMAC_FLAG_SPH_DISABLE; + + s32_gmac_validate_multi_irq(dev, plat, &res); + plat->rx_fifo_size =3D 20480; plat->tx_fifo_size =3D 20480; =20 --=20 2.47.0