From nobody Tue Apr 7 15:29:29 2026 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 4BB5D27B35F for ; Wed, 25 Feb 2026 20:55:07 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772052908; cv=none; b=R3UjVnH+u+rWo/FM5UG4sLOndzaz+cXNU8k+L9a2IcnFbIFLO5MXoWhqffyQ1RzKTQeAppWPQFK0zLEcAt3To3lvmM1+4rpdJzD+EML26TTCBP9YD/72N1mANBHazzqBFj5DnoD2tKkXwq7ZUtMTbOg4tfKNjc52KmR8oornle0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772052908; c=relaxed/simple; bh=P5CGkcUYxtRe9Fy/nifAutJvfswwdtvxqn1e2KldiAU=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=WQZKs7aRrhJwOa3EMp6SXkDkTBY6nFmNTHo0P4eV5MOWl9SgHYIOzWgw+Xb6u8CZ4ziViERSxBcgaI7h68yH0JlbOs/HVC8bEnTKS+YGrfQCNqALrRFS2Rlv5qs9BfiDRXzCEWhx3KmvsDC6ibRRzYQhvmqI8GB0l1A2tAy4/14= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 5526F175A; Wed, 25 Feb 2026 12:55:00 -0800 (PST) Received: from e134344.cambridge.arm.com (e134344.arm.com [10.1.196.46]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 23F803F73B; Wed, 25 Feb 2026 12:55:03 -0800 (PST) From: Ben Horgan To: ben.horgan@arm.com Cc: amitsinght@marvell.com, baisheng.gao@unisoc.com, baolin.wang@linux.alibaba.com, carl@os.amperecomputing.com, dave.martin@arm.com, david@kernel.org, dfustini@baylibre.com, fenghuay@nvidia.com, gshan@redhat.com, james.morse@arm.com, jonathan.cameron@huawei.com, kobak@nvidia.com, lcherian@marvell.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, peternewman@google.com, punit.agrawal@oss.qualcomm.com, quic_jiles@quicinc.com, reinette.chatre@intel.com, rohit.mathew@arm.com, scott@os.amperecomputing.com, sdonthineni@nvidia.com, tan.shaopeng@fujitsu.com, xhao@linux.alibaba.com, zengheng4@huawei.com Subject: [RFC PATCH v1 4/4] arm_mpam: resctrl: Add resctrl_arch_cntr_read() & resctrl_arch_reset_cntr() Date: Wed, 25 Feb 2026 20:54:36 +0000 Message-ID: <20260225205436.3571756-5-ben.horgan@arm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260225205436.3571756-1-ben.horgan@arm.com> References: <20260225205436.3571756-1-ben.horgan@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: James Morse When used in ABMC mode, resctrl uses a different set of helpers to read and reset the counters. Add these. Reviewed-by: Jonathan Cameron Signed-off-by: James Morse Signed-off-by: Ben Horgan --- drivers/resctrl/mpam_resctrl.c | 56 ++++++++++++++++++++++++++-------- 1 file changed, 43 insertions(+), 13 deletions(-) diff --git a/drivers/resctrl/mpam_resctrl.c b/drivers/resctrl/mpam_resctrl.c index 18528210ba46..6c2542cfb0df 100644 --- a/drivers/resctrl/mpam_resctrl.c +++ b/drivers/resctrl/mpam_resctrl.c @@ -137,19 +137,6 @@ void resctrl_arch_reset_rmid_all(struct rdt_resource *= r, struct rdt_l3_mon_domai { } =20 -void resctrl_arch_reset_cntr(struct rdt_resource *r, struct rdt_l3_mon_dom= ain *d, - u32 closid, u32 rmid, int cntr_id, - enum resctrl_event_id eventid) -{ -} - -int resctrl_arch_cntr_read(struct rdt_resource *r, struct rdt_l3_mon_domai= n *d, - u32 unused, u32 rmid, int cntr_id, - enum resctrl_event_id eventid, u64 *val) -{ - return -EOPNOTSUPP; -} - bool resctrl_arch_mbm_cntr_assign_enabled(struct rdt_resource *r) { if (r !=3D &mpam_resctrl_controls[RDT_RESOURCE_L3].resctrl_res) @@ -544,6 +531,28 @@ int resctrl_arch_rmid_read(struct rdt_resource *r, str= uct rdt_domain_hdr *hdr, closid, rmid, val); } =20 +/* MBWU counters when in ABMC mode */ +int resctrl_arch_cntr_read(struct rdt_resource *r, struct rdt_l3_mon_domai= n *d, + u32 closid, u32 rmid, int mon_idx, + enum resctrl_event_id eventid, u64 *val) +{ + struct mpam_resctrl_mon *mon =3D &mpam_resctrl_counters[eventid]; + struct mpam_resctrl_dom *l3_dom; + struct mpam_component *mon_comp; + + if (!mpam_is_enabled()) + return -EINVAL; + + if (eventid =3D=3D QOS_L3_OCCUP_EVENT_ID || !mon->class) + return -EINVAL; + + l3_dom =3D container_of(d, struct mpam_resctrl_dom, resctrl_mon_dom); + mon_comp =3D l3_dom->mon_comp[eventid]; + + return read_mon_cdp_safe(mon, mon_comp, mpam_feat_msmon_mbwu, mon_idx, + closid, rmid, val); +} + static void __reset_mon(struct mpam_resctrl_mon *mon, struct mpam_componen= t *mon_comp, int mon_idx, enum resctrl_conf_type cdp_type, u32 closid, u32 rmid) @@ -600,6 +609,27 @@ void resctrl_arch_reset_rmid(struct rdt_resource *r, s= truct rdt_l3_mon_domain *d reset_mon_cdp_safe(mon, mon_comp, USE_PRE_ALLOCATED, closid, rmid); } =20 +/* Reset an assigned counter */ +void resctrl_arch_reset_cntr(struct rdt_resource *r, struct rdt_l3_mon_dom= ain *d, + u32 closid, u32 rmid, int cntr_id, + enum resctrl_event_id eventid) +{ + struct mpam_resctrl_mon *mon =3D &mpam_resctrl_counters[eventid]; + struct mpam_resctrl_dom *l3_dom; + struct mpam_component *mon_comp; + + if (!mpam_is_enabled()) + return; + + if (eventid =3D=3D QOS_L3_OCCUP_EVENT_ID || !mon->class) + return; + + l3_dom =3D container_of(d, struct mpam_resctrl_dom, resctrl_mon_dom); + mon_comp =3D l3_dom->mon_comp[eventid]; + + reset_mon_cdp_safe(mon, mon_comp, USE_PRE_ALLOCATED, closid, rmid); +} + /* * The rmid realloc threshold should be for the smallest cache exposed to * resctrl. --=20 2.43.0