From nobody Thu Apr 16 20:58:09 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.20]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 85A5D395255 for ; Wed, 25 Feb 2026 16:17:07 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.20 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772036230; cv=none; b=uQdTazTexfrJq+NK3EIMDjB7DaT13Hy2cDnwUFutnm5HBrl5EgZ872yliSkKt1pRaiMruNQI8wV9iQ0o5Z6pkFVnVSOmU04Tm1oZRDAhVuO0MZ/dptoSvbztJgcEgdm5I7ixadIvaZnP0Prqr9XcrHFWY+fZJuajEUNtGq7IoH8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772036230; c=relaxed/simple; bh=1rUxMu9OMJ0rOknLdIz6iSzQkW6FgEjpgRF9j0FCNis=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Zq0K+1NA8rtoBhnxAzBk0IKa+ckWRg9FZTVrLQHQgUOj4RpiyfaSVI7defGVqMuGPVDic5jBtecM3V8A1zEP2ncq2cMI/hYPrNG+ubuhgr+Yv/jiEaOWx/0CiTeUiMDe7x5FxoCI8cJuDDPm1GdXf1M6Mo0rA1ZhUWMejuPys0k= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=pass smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=i0pYimUD; arc=none smtp.client-ip=198.175.65.20 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="i0pYimUD" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1772036227; x=1803572227; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=1rUxMu9OMJ0rOknLdIz6iSzQkW6FgEjpgRF9j0FCNis=; b=i0pYimUDzKl5Cr4ESHdBt3Q5Ivm6rxtB34p6yCvONF6G8yzmI3eSoq4O WqRhtPuzQ2iVQHujJWSGKXGFWSn4NHJkwtPnych1pH/TzUkkXdUwjfbEH v6o65BT6jKcZqyqW0cf7RuE9yr2JK4wBO+2VZzW6eDXoSKJQW9qQ12Ici cy9gABJuySbCL9jATAD+BYnG+pTNbYdglQDX2rYFzEg1Lx14+9MEHYNdq gaXHY0R6X8uXv6SXDzl0Sz2xUqIzkTCJP8rJc2moJKsQjxYJRdfp+NLeL +vqzxqfMJ9dumZlmFlUkyPwlWnvdpFEg01tp+hdHgyhgtm3gEOANKzqGx A==; X-CSE-ConnectionGUID: sH94pGfTSJOubSOuuG0pPg== X-CSE-MsgGUID: EflwQbM1SbWOIMI0qNZd0g== X-IronPort-AV: E=McAfee;i="6800,10657,11712"; a="72783299" X-IronPort-AV: E=Sophos;i="6.21,310,1763452800"; d="scan'208";a="72783299" Received: from fmviesa003.fm.intel.com ([10.60.135.143]) by orvoesa112.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Feb 2026 08:17:03 -0800 X-CSE-ConnectionGUID: NbqALLR6QSOVdSp/SSaaZQ== X-CSE-MsgGUID: MM2DwbsMTR28DeeDuk3eWg== X-ExtLoop1: 1 Received: from black.igk.intel.com ([10.91.253.5]) by fmviesa003.fm.intel.com with ESMTP; 25 Feb 2026 08:17:02 -0800 Received: by black.igk.intel.com (Postfix, from userid 1003) id B866F99; Wed, 25 Feb 2026 17:17:00 +0100 (CET) From: Andy Shevchenko To: Mark Brown , Andy Shevchenko , linux-kernel@vger.kernel.org, driver-core@lists.linux.dev Cc: Greg Kroah-Hartman , "Rafael J. Wysocki" , Danilo Krummrich Subject: [PATCH v2 1/5] regcache: Remove duplicate check in regcache_hw_init() Date: Wed, 25 Feb 2026 17:15:55 +0100 Message-ID: <20260225161659.3811671-2-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20260225161659.3811671-1-andriy.shevchenko@linux.intel.com> References: <20260225161659.3811671-1-andriy.shevchenko@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The regcache_hw_init() is never called without preliminary check for num_reg_defaults_raw not being 0. Thus, remove duplicate in the function. Signed-off-by: Andy Shevchenko --- drivers/base/regmap/regcache.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/drivers/base/regmap/regcache.c b/drivers/base/regmap/regcache.c index a35f2b20298b..d41cdb39c78f 100644 --- a/drivers/base/regmap/regcache.c +++ b/drivers/base/regmap/regcache.c @@ -50,9 +50,6 @@ static int regcache_hw_init(struct regmap *map) unsigned int reg, val; void *tmp_buf; =20 - if (!map->num_reg_defaults_raw) - return -EINVAL; - /* calculate the size of reg_defaults */ for (count =3D 0, i =3D 0; i < map->num_reg_defaults_raw; i++) if (regmap_readable(map, i * map->reg_stride) && --=20 2.50.1 From nobody Thu Apr 16 20:58:09 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.20]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4E9AD3939C7 for ; Wed, 25 Feb 2026 16:17:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.20 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772036229; cv=none; b=loGNV69LN3idfGBjeDXDa0HeckQV55F2iYI8PWQnIOKamfrwLsghoMgZp9u/8BvlqGM4EqwbraZCa8v0tqB0nRovxmbozrEuEc7mSQ565RgS7I5sfNJQGAMM9d1GEc8Lw/u7kIy+LfDHuIYIqU7/WP2vJ96maOQIoRGi+lXeEVY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772036229; c=relaxed/simple; bh=KB5uIH+bxuXS+jO+xUrSeBRqrW2qkuL+VRN/E6aFTsI=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=hlyyHtkxfq2IoYyLOLSz1sE7tptcECYb/mDmW+8dDbvR1mgjdIXIFzw7Vma459uVwvLTeLITvCNBdn3wrqLaOmaPENjieWB/PN1klw+PDNv7iXG8BScmNq+7YGBNPxYjRZWmly9HNFWAXn9Bdee6tbTPfztrAT/q15BHeqnkhBc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=pass smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=R+XWlmaI; arc=none smtp.client-ip=198.175.65.20 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="R+XWlmaI" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1772036226; x=1803572226; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=KB5uIH+bxuXS+jO+xUrSeBRqrW2qkuL+VRN/E6aFTsI=; b=R+XWlmaIVkY1JLtuiRvJJWWqBFZnlDL7pI6iySvryehGGSYYuJEskaNb LrPlr6htWR+nOqEMHpbu9p5QtAAYjG9Bsc01N9MipopwC0KIjBuyoceyb lS6IM4hvA/F3duH1me09KcjV7OHMFQ8r0c9Az9UhPw1E9wVdl5Jv+Bsl2 5K4nsE+3W1jnXCs3KF1PkNMHIzSh5nzwnESj3SDjnzC11ZsXqYpQZG2ee y9yHIVFe67bE5+ARB8tCVfMILDwWHv6F8AOocfMQQXmOcFwjLT8dXd7f3 MRgHfKV6luYXss1eS8WhR0nu5P90W/36nJ34pjB6uutfftLOLT8HuhodX g==; X-CSE-ConnectionGUID: 8agHSwBiSASqr29AtA1Fyg== X-CSE-MsgGUID: +07qTi+tQxGCp9zJR8jyjg== X-IronPort-AV: E=McAfee;i="6800,10657,11712"; a="72783294" X-IronPort-AV: E=Sophos;i="6.21,310,1763452800"; d="scan'208";a="72783294" Received: from fmviesa003.fm.intel.com ([10.60.135.143]) by orvoesa112.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Feb 2026 08:17:03 -0800 X-CSE-ConnectionGUID: lSjHeH+gRBira1jP/RgY3w== X-CSE-MsgGUID: yoYN6fnCQka7mg/vmXXBnQ== X-ExtLoop1: 1 Received: from black.igk.intel.com ([10.91.253.5]) by fmviesa003.fm.intel.com with ESMTP; 25 Feb 2026 08:17:02 -0800 Received: by black.igk.intel.com (Postfix, from userid 1003) id BCE959B; Wed, 25 Feb 2026 17:17:00 +0100 (CET) From: Andy Shevchenko To: Mark Brown , Andy Shevchenko , linux-kernel@vger.kernel.org, driver-core@lists.linux.dev Cc: Greg Kroah-Hartman , "Rafael J. Wysocki" , Danilo Krummrich Subject: [PATCH v2 2/5] regcache: Split regcache_count_cacheable_registers() helper Date: Wed, 25 Feb 2026 17:15:56 +0100 Message-ID: <20260225161659.3811671-3-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20260225161659.3811671-1-andriy.shevchenko@linux.intel.com> References: <20260225161659.3811671-1-andriy.shevchenko@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The introduced helper allows to check for the non-cacheable configurations earlier during initialisation. Signed-off-by: Andy Shevchenko --- drivers/base/regmap/regcache.c | 30 +++++++++++++++++++----------- 1 file changed, 19 insertions(+), 11 deletions(-) diff --git a/drivers/base/regmap/regcache.c b/drivers/base/regmap/regcache.c index d41cdb39c78f..73cfe8120669 100644 --- a/drivers/base/regmap/regcache.c +++ b/drivers/base/regmap/regcache.c @@ -42,13 +42,10 @@ void regcache_sort_defaults(struct reg_default *default= s, unsigned int ndefaults } EXPORT_SYMBOL_GPL(regcache_sort_defaults); =20 -static int regcache_hw_init(struct regmap *map) +static int regcache_count_cacheable_registers(struct regmap *map) { - int i, j; - int ret; int count; - unsigned int reg, val; - void *tmp_buf; + int i; =20 /* calculate the size of reg_defaults */ for (count =3D 0, i =3D 0; i < map->num_reg_defaults_raw; i++) @@ -57,10 +54,18 @@ static int regcache_hw_init(struct regmap *map) count++; =20 /* all registers are unreadable or volatile, so just bypass */ - if (!count) { + if (!count) map->cache_bypass =3D true; - return 0; - } + + return count; +} + +static int regcache_hw_init(struct regmap *map, int count) +{ + int i, j; + int ret; + unsigned int reg, val; + void *tmp_buf; =20 map->num_reg_defaults =3D count; map->reg_defaults =3D kmalloc_objs(struct reg_default, count); @@ -129,6 +134,7 @@ static int regcache_hw_init(struct regmap *map) =20 int regcache_init(struct regmap *map, const struct regmap_config *config) { + int count =3D 0; int ret; int i; void *tmp_buf; @@ -193,15 +199,17 @@ int regcache_init(struct regmap *map, const struct re= gmap_config *config) return -ENOMEM; map->reg_defaults =3D tmp_buf; } else if (map->num_reg_defaults_raw) { + count =3D regcache_count_cacheable_registers(map); + if (map->cache_bypass) + return 0; + /* Some devices such as PMICs don't have cache defaults, * we cope with this by reading back the HW registers and * crafting the cache defaults by hand. */ - ret =3D regcache_hw_init(map); + ret =3D regcache_hw_init(map, count); if (ret < 0) return ret; - if (map->cache_bypass) - return 0; } =20 if (!map->max_register_is_set && map->num_reg_defaults_raw) { --=20 2.50.1 From nobody Thu Apr 16 20:58:09 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.20]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1ED8823ABB9 for ; Wed, 25 Feb 2026 16:17:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.20 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772036227; cv=none; b=Uqq+TffcSG+xB2o8YXClb92sDx9RbfPgJUdX2+j5vd+etLNBW+DDRqXYW1h1Ea+z6dswnky1IqEpU+ZbJZdmVONiej3SRxAoR795rAadYkzgDnkc0ud3aIkrnmIdCEavtGTvng9wkTTdjPDw/jJW1uX0yeRCAN0iZlVr2+TL+Nk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772036227; c=relaxed/simple; bh=pSMGSYAXd7SYnY+dr0hI5UuXS3I9ARZIjw5YmikXJwY=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=hgVqSiiW6KkUjEDHWYFRqySwbMgX41xXepCZ0K2RgVWsYY60F9eLGUkJtnvzuhreTq3P/H/kGrD5D51WcEzloeRhqcKhKN+d9TY6kcTOCd/8mtdv06ivTrHamTQdIbf+3hC1RRPM/GjkbuxrboDDxCEd03z7V2MmMx6fhhwFDy8= ARC-Authentication-Results: i=1; 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X-CSE-ConnectionGUID: MkEfoUqjSjKpYYmStx2A8Q== X-CSE-MsgGUID: sxxl+p7QQ3qvmgwfZ0Cstw== X-IronPort-AV: E=McAfee;i="6800,10657,11712"; a="72783290" X-IronPort-AV: E=Sophos;i="6.21,310,1763452800"; d="scan'208";a="72783290" Received: from fmviesa003.fm.intel.com ([10.60.135.143]) by orvoesa112.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Feb 2026 08:17:03 -0800 X-CSE-ConnectionGUID: o1CG5Qo8RVKTMMihFu0oJw== X-CSE-MsgGUID: AcEMU4XWQD+sH1ZIO7TXzg== X-ExtLoop1: 1 Received: from black.igk.intel.com ([10.91.253.5]) by fmviesa003.fm.intel.com with ESMTP; 25 Feb 2026 08:17:02 -0800 Received: by black.igk.intel.com (Postfix, from userid 1003) id C12139D; Wed, 25 Feb 2026 17:17:00 +0100 (CET) From: Andy Shevchenko To: Mark Brown , Andy Shevchenko , linux-kernel@vger.kernel.org, driver-core@lists.linux.dev Cc: Greg Kroah-Hartman , "Rafael J. Wysocki" , Danilo Krummrich Subject: [PATCH v2 3/5] regcache: Move HW readback after cache initialisation Date: Wed, 25 Feb 2026 17:15:57 +0100 Message-ID: <20260225161659.3811671-4-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20260225161659.3811671-1-andriy.shevchenko@linux.intel.com> References: <20260225161659.3811671-1-andriy.shevchenko@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Make sure that cache is initialised before calling any IO using regmap, this makes sure that we won't access NULL or invalid pointers in the cache which hasn't been initialised. Signed-off-by: Andy Shevchenko --- drivers/base/regmap/regcache.c | 17 +++++++++-------- 1 file changed, 9 insertions(+), 8 deletions(-) diff --git a/drivers/base/regmap/regcache.c b/drivers/base/regmap/regcache.c index 73cfe8120669..de03b090f152 100644 --- a/drivers/base/regmap/regcache.c +++ b/drivers/base/regmap/regcache.c @@ -202,14 +202,6 @@ int regcache_init(struct regmap *map, const struct reg= map_config *config) count =3D regcache_count_cacheable_registers(map); if (map->cache_bypass) return 0; - - /* Some devices such as PMICs don't have cache defaults, - * we cope with this by reading back the HW registers and - * crafting the cache defaults by hand. - */ - ret =3D regcache_hw_init(map, count); - if (ret < 0) - return ret; } =20 if (!map->max_register_is_set && map->num_reg_defaults_raw) { @@ -227,6 +219,15 @@ int regcache_init(struct regmap *map, const struct reg= map_config *config) goto err_free; } =20 + /* + * Some devices such as PMICs don't have cache defaults, + * we cope with this by reading back the HW registers and + * crafting the cache defaults by hand. + */ + ret =3D regcache_hw_init(map, count); + if (ret) + goto err_exit; + if (map->cache_ops->populate && (map->num_reg_defaults || map->reg_default_cb)) { dev_dbg(map->dev, "Populating %s cache\n", map->cache_ops->name); --=20 2.50.1 From nobody Thu Apr 16 20:58:09 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.20]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D3EF43D5226 for ; Wed, 25 Feb 2026 16:17:07 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.20 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772036233; cv=none; b=PlaOolf+obtETGOSHcAtRSPSrKaYgBqvjRIQzezsnrXnBhdaQpnkcSMLkSIemimQ9ISdKy1r+FfgSQgtACopOaOYCUrpAyaNcQYEyCzRLC3XR9TRbpDNZRcIbxeZv0pKlhUYl+4W5QDDoKbjLRU471sAGO8zjwuBmhN82qzvHFI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772036233; c=relaxed/simple; bh=z+nHRImxLIutPaJyWKxswcxQAhknQSLI4Jt9PtjKFns=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=SRzlztQrMMOsoKNwxrn0GCzI7TF0NpbE5bXKTj4n2OJj+YmoatxfeH74NNoBTFIpf2t/1KZbVBNP3tVeXy0PnZrYRnx7icsIgqE/AafkVwI9+B9vTFSSD9pkVKs41Py7YA1dRlPEmkmyeJQuOcJvTzyPMNYk2OeJ9Z5y1FOYVBw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=pass smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=W6L5/Rtw; arc=none smtp.client-ip=198.175.65.20 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="W6L5/Rtw" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1772036227; x=1803572227; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=z+nHRImxLIutPaJyWKxswcxQAhknQSLI4Jt9PtjKFns=; b=W6L5/RtwbS0ICYqRGsoG0AXAZBv8CnWeF0xp8F+zNiXZb9+Q8hQpUNC2 7eGKB8BwRQiIZsnWuaO7f5flIDVOyFdHrwqsGopDzD/nhWw0wbfO1fzMJ D/VPoGlyl4DielYFpX1mzqK+a5VWaRwR4EY0wVJWz60XId0i+3f9Xcw6B X+lXPr6HTiDYcTtGrYCl3WPKhTVF2zB9sfWYuJBhonyjAxSHkfqowe3qP lS8oFPxZoyGUt0Pwx5o3TNZEPJpeT2UKhgEIe8Us9np3A3WCJGfD91yxt E0IDu0eRHKEcOr67aOxuRypjJ99IMueRtUBJ9xUw8wy/DkYPZRCmat4z9 g==; X-CSE-ConnectionGUID: 0Q2jsuX6TgW0Ttabc4WWCg== X-CSE-MsgGUID: PG3Z+v2PREKXY/dIxWl9iw== X-IronPort-AV: E=McAfee;i="6800,10657,11712"; a="72783303" X-IronPort-AV: E=Sophos;i="6.21,310,1763452800"; d="scan'208";a="72783303" Received: from fmviesa003.fm.intel.com ([10.60.135.143]) by orvoesa112.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Feb 2026 08:17:03 -0800 X-CSE-ConnectionGUID: oerpoDNFRUeHNJUAoYJTIQ== X-CSE-MsgGUID: VKDlY3BQRgSDOK/DGNKuhA== X-ExtLoop1: 1 Received: from black.igk.intel.com ([10.91.253.5]) by fmviesa003.fm.intel.com with ESMTP; 25 Feb 2026 08:17:02 -0800 Received: by black.igk.intel.com (Postfix, from userid 1003) id C53D39E; Wed, 25 Feb 2026 17:17:00 +0100 (CET) From: Andy Shevchenko To: Mark Brown , Andy Shevchenko , linux-kernel@vger.kernel.org, driver-core@lists.linux.dev Cc: Greg Kroah-Hartman , "Rafael J. Wysocki" , Danilo Krummrich Subject: [PATCH v2 4/5] regcache: Define iterator inside for-loop and align their types Date: Wed, 25 Feb 2026 17:15:58 +0100 Message-ID: <20260225161659.3811671-5-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20260225161659.3811671-1-andriy.shevchenko@linux.intel.com> References: <20260225161659.3811671-1-andriy.shevchenko@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Some of the iterators may be defined inside the respective for-loop reducing the scope and potential risk of their misuse. While at it, align their types based on the type of the upper or lower limits. Signed-off-by: Andy Shevchenko --- drivers/base/regmap/internal.h | 2 +- drivers/base/regmap/regcache.c | 13 ++++++------- 2 files changed, 7 insertions(+), 8 deletions(-) diff --git a/drivers/base/regmap/internal.h b/drivers/base/regmap/internal.h index 5bf993165438..c77f3a49a89e 100644 --- a/drivers/base/regmap/internal.h +++ b/drivers/base/regmap/internal.h @@ -162,7 +162,7 @@ struct regmap { bool no_sync_defaults; =20 struct reg_sequence *patch; - int patch_regs; + unsigned int patch_regs; =20 /* if set, the regmap core can sleep */ bool can_sleep; diff --git a/drivers/base/regmap/regcache.c b/drivers/base/regmap/regcache.c index de03b090f152..7ac30762c236 100644 --- a/drivers/base/regmap/regcache.c +++ b/drivers/base/regmap/regcache.c @@ -44,11 +44,11 @@ EXPORT_SYMBOL_GPL(regcache_sort_defaults); =20 static int regcache_count_cacheable_registers(struct regmap *map) { - int count; - int i; + unsigned int count; =20 /* calculate the size of reg_defaults */ - for (count =3D 0, i =3D 0; i < map->num_reg_defaults_raw; i++) + count =3D 0; + for (unsigned int i =3D 0; i < map->num_reg_defaults_raw; i++) if (regmap_readable(map, i * map->reg_stride) && !regmap_volatile(map, i * map->reg_stride)) count++; @@ -62,7 +62,6 @@ static int regcache_count_cacheable_registers(struct regm= ap *map) =20 static int regcache_hw_init(struct regmap *map, int count) { - int i, j; int ret; unsigned int reg, val; void *tmp_buf; @@ -95,7 +94,7 @@ static int regcache_hw_init(struct regmap *map, int count) } =20 /* fill the reg_defaults */ - for (i =3D 0, j =3D 0; i < map->num_reg_defaults_raw; i++) { + for (unsigned int i =3D 0, j =3D 0; i < map->num_reg_defaults_raw; i++) { reg =3D i * map->reg_stride; =20 if (!regmap_readable(map, reg)) @@ -841,13 +840,13 @@ static int regcache_sync_block_raw(struct regmap *map= , void *block, unsigned int block_base, unsigned int start, unsigned int end) { - unsigned int i, val; unsigned int regtmp =3D 0; unsigned int base =3D 0; const void *data =3D NULL; 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25 Feb 2026 08:17:04 -0800 Received: by black.igk.intel.com (Postfix, from userid 1003) id C9102A1; Wed, 25 Feb 2026 17:17:00 +0100 (CET) From: Andy Shevchenko To: Mark Brown , Andy Shevchenko , linux-kernel@vger.kernel.org, driver-core@lists.linux.dev Cc: Greg Kroah-Hartman , "Rafael J. Wysocki" , Danilo Krummrich Subject: [PATCH v2 5/5] regcache: Amend printf() specifiers when printing registers Date: Wed, 25 Feb 2026 17:15:59 +0100 Message-ID: <20260225161659.3811671-6-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20260225161659.3811671-1-andriy.shevchenko@linux.intel.com> References: <20260225161659.3811671-1-andriy.shevchenko@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" In one case the 0x is provided in the formatting string, while the rest use # for that. In a couple of more cases a decimal signed value specifier is used. Amend them to use %#x when register is printed. Note, for the case, when it's related to the read/write, use %x to be in align with the similar messages in regmap core. Signed-off-by: Andy Shevchenko --- drivers/base/regmap/regcache.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/base/regmap/regcache.c b/drivers/base/regmap/regcache.c index 7ac30762c236..1d1e252a9f7e 100644 --- a/drivers/base/regmap/regcache.c +++ b/drivers/base/regmap/regcache.c @@ -112,7 +112,7 @@ static int regcache_hw_init(struct regmap *map, int cou= nt) ret =3D regmap_read(map, reg, &val); map->cache_bypass =3D cache_bypass; if (ret !=3D 0) { - dev_err(map->dev, "Failed to read %d: %d\n", + dev_err(map->dev, "Failed to read %x: %d\n", reg, ret); goto err_free; } @@ -509,7 +509,7 @@ int regcache_sync_region(struct regmap *map, unsigned i= nt min, bypass =3D map->cache_bypass; =20 name =3D map->cache_ops->name; - dev_dbg(map->dev, "Syncing %s cache from %d-%d\n", name, min, max); + dev_dbg(map->dev, "Syncing %s cache from %#x-%#x\n", name, min, max); =20 trace_regcache_sync(map, name, "start region"); =20 @@ -818,7 +818,7 @@ static int regcache_sync_block_raw_flush(struct regmap = *map, const void **data, =20 count =3D (cur - base) / map->reg_stride; =20 - dev_dbg(map->dev, "Writing %zu bytes for %d registers from 0x%x-0x%x\n", + dev_dbg(map->dev, "Writing %zu bytes for %d registers from %#x-%#x\n", count * val_bytes, count, base, cur - map->reg_stride); =20 map->cache_bypass =3D true; --=20 2.50.1