From nobody Fri Apr 17 00:23:18 2026 Received: from mail-pf1-f169.google.com (mail-pf1-f169.google.com [209.85.210.169]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8790625A642 for ; Wed, 25 Feb 2026 01:59:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.210.169 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771984746; cv=none; b=rSE34LX/tUaMzlfYX907VzV6T00DOUksZ6bPHhBB2dg9BoFAXVhScCAVOuhYMB0rjDQwER8r1VWg7x2oi7/oqCU/mZVTOnV+UmDXDLF8jwp4L8XgjVKBucKi2eEr3ieEWc+XHqkfRC9ZsNbM9Om8tEjg5kW3+8i16fTueVTvGfI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771984746; c=relaxed/simple; bh=+BTlo82bOP/foze/gQeON8U8aTkxMyzFjbZtn96P+d4=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=RB37I7qk/56WKW1haRnRwdJ0JYpx+X99jsgm0nPu0NoGvUyzAA570y1DB1w75mZanKE2V48BW9EVNIe6nmDCL9burXIKLKB+CKt7Fsyt2Eu5Q6vwIlbrdslXi4IX9HT/TScSWxod3iM99YJhtAm242N0haK6CyMFUWJ9sOGFQGk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=nJhIegNO; arc=none smtp.client-ip=209.85.210.169 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="nJhIegNO" Received: by mail-pf1-f169.google.com with SMTP id d2e1a72fcca58-82728e5680cso3354b3a.0 for ; Tue, 24 Feb 2026 17:59:05 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1771984745; x=1772589545; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=3zvwKD7V2YKpGMLkJEO1tU3ZqnJ4SfaB+coADDuVirU=; b=nJhIegNOHpNIjkHyY0JX0Ua07WUUBuqTtv3jxZVVbhT6lH6+hUKr/qc7aDYBhI0AgW baPLhUF7PFsu9dO5bAz+nwHdC+wMjmKerqk3IdaBDM/vTN1Jwrv5DJ6CM6ugNqjA3WYc VUA0mWtwmc3nmSCZ8wzCZJp4gAbjQSYVHtr0HNT/nGPyZ2WuGTZR0f32Zg+Zjq4Lj2BZ 8KdKojVnz7uTQ6GEX9qUPXKfBln6BlaWJBfL39E03dvo5EcGsqWigUXrZc++VwPXuKGc naadoQxl3rVuxwaiXv4TuM1+B70mX8g2iXy0j8cPoVvQBq4Fmh3I8ueM4oK+n4SNmSIV woFg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1771984745; x=1772589545; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=3zvwKD7V2YKpGMLkJEO1tU3ZqnJ4SfaB+coADDuVirU=; b=KZelLcBfGPfMK1F1tWF4pLyB9TEtgHviv2o1AOYnBoymptiM1mF566/6u/kF0qgm+F f70BCeNTZUdlMJzXJYFP64ijc+m3QTrmrgR6vPCxlpnt7/YOtWwi4f1RLNI1hFRNiKSl 3XIiloxdmtauUdysbvJT5wjo35mo4F2Y44TYkXjIrK1nzC32Ib0YTboz0RahQYhzKD8N 2kjfSN/24yVEQBR2D4/+kc57Z+uGSzjYQiqKhWn1+ShX48ApiVuMWq2RCnVF2VIRqmIU hw9NO7VdD7AlcLE38JLga596souDc/gnKj5HbAHl4abRAGGQJFhMXmSxOz3Ba0lPYfDx 9ycQ== X-Forwarded-Encrypted: i=1; AJvYcCXC3r3vfZihKYd4tm6x6cWmBnteowHTFXZ3c9ItRQYmVEJCx+YknrB5IXoKVnGmibdoxqj8D3t3xDTm7sc=@vger.kernel.org X-Gm-Message-State: AOJu0YyVe0kjwKp4++njxE4X21p2AdElbfiGtHWDk1q3LSZWqEQRNhfW a1koumguiqPUKIJ8FLreDxiLbYinVUy1ImArMZQ4dhvnh1EH8uyUYEFB X-Gm-Gg: ATEYQzwt4KEScGzoChHhq3R6T8tftb9w0RGXE7jBOXOSOdiAAcN+m+iPsvou+YVSEq8 sueLgrNAODWPRvw/P5wnlXXWRCWvwza8xn+oFeXzmFMSvV/V87LbpSs2PDq+61FbE6UBOxNqT8Y EH9d7wcC38hL7EJaiqmbr5eClfjIihu8TDXaR0tZ8Yuguat1A7oGaGBKsVgUL2QZiOattuz5GDJ PE8pbQMr5B6eGvQHjMa8t+5MU+XXW5pP1Rdam7dRRvnerIjz4wWMY1ArGP2PxKw090z/sCrMKLq Osl8SaTWqjgq/YRjclO5UQliXkNccpE4RIPhYzwzBIQbVR5piz4Js104QqTRKhnl1luF1MCkijT T4G/tw935m4ZeKcnCi2RfR+b7nOERXeDhjdILT5VruC01R65VmsKbs3gZWoqLYCUkfH9OSaGQz7 GxL5EURIPyKy7S4Ti5PzClDQwzud7eLop1E+8KTF/SGVPTvA== X-Received: by 2002:a05:6a21:898b:b0:34f:ec81:bc3d with SMTP id adf61e73a8af0-39545f7a3bamr11523634637.44.1771984744888; Tue, 24 Feb 2026 17:59:04 -0800 (PST) Received: from twhmp6px (mxsmtp211.mxic.com.tw. [211.75.127.162]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-35900700e69sm1002312a91.0.2026.02.24.17.59.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 24 Feb 2026 17:59:04 -0800 (PST) Received: from hqs-appsw-a2o.mp600.macronix.com (unknown [172.17.236.67]) by twhmp6px (Postfix) with ESMTPS id 8DB204136074; Wed, 25 Feb 2026 09:59:02 +0800 (CST) From: Cheng Ming Lin To: Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Tudor Ambarus , Mikhail Kshevetskiy , Pablo Martin-Gomez , Tianling Shen , Pratyush Yadav , linux-mtd@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, alvinzhou@mxic.com.tw, Cheng Ming Lin Subject: [PATCH v7 1/3] dt-bindings: mtd: spinand: Add randomizer enable/disable properties Date: Wed, 25 Feb 2026 09:57:03 +0800 Message-Id: <20260225015705.1113199-2-linchengming884@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20260225015705.1113199-1-linchengming884@gmail.com> References: <20260225015705.1113199-1-linchengming884@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Cheng Ming Lin Add "nand-randomizer-enable" and "nand-randomizer-disable" boolean properties. These properties allow enabling or disabling the randomizer feature via the device tree. According to JEDEC standard JESD22-A117E, no single data pattern represents a universal worst-case for all NAND flash failure mechanisms. Different patterns, such as fully programmed, checkerboard, or mostly erased, can disproportionately stress specific cells (e.g., programmed, erased, or those influenced by adjacent states). Given that no fixed pattern can cover all scenarios, the use of a randomized data pattern is a practical and effective mitigation strategy. Our hardware implements a randomizer feature that scrambles user data before it is written to the flash and restores the original data upon read. This ensures the data stored on the media is more evenly distributed, thus reducing pattern-dependent degradation. This is especially crucial for preventing errors caused by unbalanced data (e.g., all zeros or all ones) in blocks with high program/erase (P/E) cycle counts. Ultimately, the randomizer improves the long-term reliability and endurance of the flash device. Please refer to the following link for randomizer feature: Link: https://www.mxic.com.tw/Lists/ApplicationNote/Attachments/2151/AN1051= V1-The%20Introduction%20of%20Randomizer%20Feature%20on%20MX30xFxG28AD_MX35x= FxG24AD. Signed-off-by: Cheng Ming Lin --- .../devicetree/bindings/mtd/nand-chip.yaml | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/Documentation/devicetree/bindings/mtd/nand-chip.yaml b/Documen= tation/devicetree/bindings/mtd/nand-chip.yaml index 609d4a4ddd80..2559cd97ccc5 100644 --- a/Documentation/devicetree/bindings/mtd/nand-chip.yaml +++ b/Documentation/devicetree/bindings/mtd/nand-chip.yaml @@ -67,6 +67,24 @@ properties: the secure regions present. $ref: /schemas/types.yaml#/definitions/uint64-matrix =20 + nand-randomizer-enable: + description: + Enable the randomizer feature. This property is mutually-exclusive + with nand-randomizer-disable. + type: boolean + + nand-randomizer-disable: + description: + Disable the randomizer feature. This property is mutually-exclusive + with nand-randomizer-enable. + type: boolean + +dependencies: + nand-randomizer-enable: + not: + required: + - nand-randomizer-disable + required: - reg =20 --=20 2.25.1 From nobody Fri Apr 17 00:23:18 2026 Received: from mail-pl1-f176.google.com (mail-pl1-f176.google.com [209.85.214.176]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4F390256C6C for ; Wed, 25 Feb 2026 01:59:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.214.176 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771984746; cv=none; b=Koh2JVE5nkm9HBMlwS8ysBsVREWlSuB8htfQ4n93O38CYa3d3uJ4RBKQOaXh145hCapo4SKOhK3p/PphCiBOKrOTNmPP1NqVl8wdYfCVvQZ8WeZWTDJN2Un0mHMof5scP4QnribwhbUTS66TKb5Q139F7ymCoQ8sWHoUj0iX/HU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771984746; c=relaxed/simple; bh=A0cKTP/NcPWurRQx3wyGtZw1VFNDkseDTGwzrhDZmHE=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=fVVcnzvgEqZ4kSKKm5NxONcfZyUvWjZCpJd3+0q1UJPcMdcfFCVY2RQTqq0QYWlVYanfqLnmLoAAlIiVdmWp7xWJIa3XzginMHkWsTeGslBPEuJPpTME9PU690UwAuhG19/hRWLCtbh89ZLL+HyZTG1yNmTA1TyR5Ys0b/Qsdek= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=bIXmu1V9; arc=none smtp.client-ip=209.85.214.176 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="bIXmu1V9" Received: by mail-pl1-f176.google.com with SMTP id d9443c01a7336-2ad3f12a496so1443855ad.1 for ; Tue, 24 Feb 2026 17:59:05 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1771984745; x=1772589545; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=nILoW48W9hqLRwmHITphjoIJRhEY+2JRSNwPbSj3wbI=; b=bIXmu1V9pHXDmG2o91ouxeCqP8HoggOp0LNnh30KSAZJOQCkvUhrjG8zChpmYZ13GE ij6Ej2DFLMjYMpVyW6HcUr+Fw2uRfH5TPVRCcpb3yU/M8bMy8sj06Q0aLfTPmRHhNXsa EADFl2GveYMcbYM/aDuC5yRV3HzKeQxZor6MQ7zjoCfGUNmXmA4MdZUR3j9kKZ0E483b 3QO6eUxY5S3Ech4W5JrSNlhtVmNhhdmwATzWu7Pdb5y+jFuZIIJFEH/0Xj8gW0O2C4B9 +PnwqWpNMAsBU6Bk015TP06odteo0F4jH6/+IPYt2REm43ZY4g+U2bUX8gAjy4YXJPIy x1zg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1771984745; x=1772589545; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=nILoW48W9hqLRwmHITphjoIJRhEY+2JRSNwPbSj3wbI=; b=KOxiQD8/bfuvZEUPzgHUbQ9uNico6Atocb53GjPIKmG/+vPRrX4eNZQOkghbF+D5Fe kd9+88mzewfIuPlcgYK6gqStN029rbQLqsgNsqXbkUFoBWXkfy163/yzVlJTQ7GAqaSF JbZ5QGvI+MPe9fgne5Z2UYVm0AmUayFLTyYdgeek3AMiTTtJl1VmoyDZkBBmD2GeLSr7 8Oh8iFizx2ZH45Mz+7Cn8lA8JYFxLifqLseeArtnFklzLUaMhEF0Pj5mBOuIfrr7SI1X HXebk5IjgDBKalOtdWMkMjs5Z21kddkUVey8ffUSLI+6UiQR2+lqM39JbbizJxbgUbhJ emUw== X-Forwarded-Encrypted: i=1; AJvYcCXtvdRrS45zOFap0NYe6KFMkh5m5axIxBr2i7+OGB/4fxUV42T/kPqcjpik5ORF7aJrCV9bS4s4c34BdwU=@vger.kernel.org X-Gm-Message-State: AOJu0Yzi9K7asOKsGlqdqbALUqwAhKZdK4oeSVUFpi+EqbyPgGCxipB1 mKa04ghxj4ooctwDXZEq6gEpgFY7ym+87H15YI8cOI1OHvwLRaZEPq+4 X-Gm-Gg: ATEYQzzbqwIWwFZOsLsQuANKZb9qkyvb5QEG6+PjcZk0L4ihp5tJArZeF5TtJ/ILGOY HCiLRRwVRmZm/xtjWA8xYXfZA/ZhAt3fOjz7I/i+V3BzFV7Yl2iQcedNo9VAFi5851grEB+vhwV sele4lWN+3rL0wJGOuPmNhAxlqE491q15Ni3tv5Alym8DkZg5sAqpPd4eoZLHF1AugrriJz2xH8 fcx3dwzchDMc388WawgCfSMNvZBjSKIQ081cB7mjuZiQDJTqzirS4O343b2Ivj/sX4x7c9X4AO+ v7EZVaMlNsviccIGwCLaQgIZraqIexM4BVv4T7ca9n6YgICLQtC58re1JLkrCbmGWZ4iz0SinlV uCfnCur56oK3Pkx03U4C8TEiyXGppHbPLKayd3Wtc6B9Rt47rtPh1bxhBrhXqOffG4F9Z/uDRnE BfvPPjuj80gAktH6fVApv20n29tjRW4tx3Sbe1UnzrCqP+mw== X-Received: by 2002:a17:903:2350:b0:2aa:e238:e20c with SMTP id d9443c01a7336-2adbdcd8822mr19122275ad.19.1771984744512; Tue, 24 Feb 2026 17:59:04 -0800 (PST) Received: from twhmp6px (mxsmtp211.mxic.com.tw. [211.75.127.162]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2ad7503fcc5sm118566325ad.76.2026.02.24.17.59.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 24 Feb 2026 17:59:04 -0800 (PST) Received: from hqs-appsw-a2o.mp600.macronix.com (unknown [172.17.236.67]) by twhmp6px (Postfix) with ESMTPS id 93A694136075; Wed, 25 Feb 2026 09:59:02 +0800 (CST) From: Cheng Ming Lin To: Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Tudor Ambarus , Mikhail Kshevetskiy , Pablo Martin-Gomez , Tianling Shen , Pratyush Yadav , linux-mtd@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, alvinzhou@mxic.com.tw, Cheng Ming Lin Subject: [PATCH v7 2/3] mtd: spi-nand: Add support for randomizer Date: Wed, 25 Feb 2026 09:57:04 +0800 Message-Id: <20260225015705.1113199-3-linchengming884@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20260225015705.1113199-1-linchengming884@gmail.com> References: <20260225015705.1113199-1-linchengming884@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Cheng Ming Lin This patch adds support for the randomizer feature. It introduces a 'set_randomizer' callback in 'struct spinand_info' and 'struct spinand_device'. If a driver implements this callback, the core will invoke it during device initialization (spinand_init) to enable or disable the randomizer feature based on the device tree configuration. Signed-off-by: Cheng Ming Lin --- drivers/mtd/nand/spi/core.c | 27 +++++++++++++++++++++++++++ include/linux/mtd/spinand.h | 9 +++++++++ 2 files changed, 36 insertions(+) diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c index 8aa3753aaaa1..77a0371010c4 100644 --- a/drivers/mtd/nand/spi/core.c +++ b/drivers/mtd/nand/spi/core.c @@ -1307,6 +1307,29 @@ static int spinand_create_dirmaps(struct spinand_dev= ice *spinand) return 0; } =20 +static int spinand_randomizer_init(struct spinand_device *spinand) +{ + struct device_node *np =3D spinand->spimem->spi->dev.of_node; + bool enable =3D false; + int ret; + + if (!spinand->set_randomizer) + return 0; + + if (of_property_read_bool(np, "nand-enable-randomizer")) + enable =3D true; + else if (of_property_read_bool(np, "nand-disable-randomizer")) + enable =3D false; + else + return 0; + + ret =3D spinand->set_randomizer(spinand, enable); + if (ret) + return ret; + + return 0; +} + static const struct nand_ops spinand_ops =3D { .erase =3D spinand_erase, .markbad =3D spinand_markbad, @@ -1594,6 +1617,7 @@ int spinand_match_and_init(struct spinand_device *spi= nand, spinand->user_otp =3D &table[i].user_otp; spinand->read_retries =3D table[i].read_retries; spinand->set_read_retry =3D table[i].set_read_retry; + spinand->set_randomizer =3D table[i].set_randomizer; =20 /* I/O variants selection with single-spi SDR commands */ =20 @@ -1881,6 +1905,9 @@ static int spinand_init(struct spinand_device *spinan= d) * ECC initialization must have happened previously. */ spinand_cont_read_init(spinand); + ret =3D spinand_randomizer_init(spinand); + if (ret) + goto err_cleanup_nanddev; =20 mtd->_read_oob =3D spinand_mtd_read; mtd->_write_oob =3D spinand_mtd_write; diff --git a/include/linux/mtd/spinand.h b/include/linux/mtd/spinand.h index 6a024cf1c53a..6a68a6c3866a 100644 --- a/include/linux/mtd/spinand.h +++ b/include/linux/mtd/spinand.h @@ -584,6 +584,7 @@ enum spinand_bus_interface { * @user_otp: SPI NAND user OTP info. * @read_retries: the number of read retry modes supported * @set_read_retry: enable/disable read retry for data recovery + * @set_randomizer: enable/disable randomizer support * * Each SPI NAND manufacturer driver should have a spinand_info table * describing all the chips supported by the driver. @@ -612,6 +613,8 @@ struct spinand_info { unsigned int read_retries; int (*set_read_retry)(struct spinand_device *spinand, unsigned int read_retry); + int (*set_randomizer)(struct spinand_device *spinand, + bool enable); }; =20 #define SPINAND_ID(__method, ...) \ @@ -668,6 +671,9 @@ struct spinand_info { .read_retries =3D __read_retries, \ .set_read_retry =3D __set_read_retry =20 +#define SPINAND_RANDOMIZER(__set_randomizer) \ + .set_randomizer =3D __set_randomizer + #define SPINAND_INFO(__model, __id, __memorg, __eccreq, __op_variants, \ __flags, ...) \ { \ @@ -753,6 +759,7 @@ struct spinand_mem_ops { * @user_otp: SPI NAND user OTP info. * @read_retries: the number of read retry modes supported * @set_read_retry: Enable/disable the read retry feature + * @set_randomizer: Enable/disable the randomizer feature */ struct spinand_device { struct nand_device base; @@ -786,6 +793,8 @@ struct spinand_device { bool cont_read_possible; int (*set_cont_read)(struct spinand_device *spinand, bool enable); + int (*set_randomizer)(struct spinand_device *spinand, + bool enable); =20 const struct spinand_fact_otp *fact_otp; const struct spinand_user_otp *user_otp; --=20 2.25.1 From nobody Fri Apr 17 00:23:18 2026 Received: from mail-pf1-f178.google.com (mail-pf1-f178.google.com [209.85.210.178]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B088B256C8B for ; Wed, 25 Feb 2026 01:59:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.210.178 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771984747; cv=none; b=H34a7DqXrbtHnL5RpK6hgetH1ia4x4NjRHkhzEuLfUDRrifO+Tm05xrdufWh9e2VaZElTY6VDqrQbkOuRS8niTaYRMMjwN9V+sj1ahVR0WlaJ/u6HzbM5U56iSC0oKjq7TICnhWRHdCrglR/dLVX8Q1TKxcAhlkgIUi5qyjeg9I= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771984747; c=relaxed/simple; bh=hIUrthxpGdu8Sf5hAwV0jX20S2+UXKjmOUXpQBCfZ6Y=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=iRkHQWNEGYjOoDNblrj8UGbT+23Mde9tM6Q1w8er6TVSme6JCXrZa8Y7HOiX8a8R6IY9jbxRk3bnKDwFDeUoFpTw//ew83JT5Mp0L5z5qUWWMBLNKf6UXgf+/ACrNKgpO/yzNJgX7G35EidN+2GvsOrH172Su+/zZKQP/mYh118= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=hm5f4H8j; arc=none smtp.client-ip=209.85.210.178 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="hm5f4H8j" Received: by mail-pf1-f178.google.com with SMTP id d2e1a72fcca58-82310b74496so3196236b3a.3 for ; Tue, 24 Feb 2026 17:59:05 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1771984745; x=1772589545; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=THJtyHC4roj3n3GL8Oa5rgmiBcterqOM3duhm0M99gM=; b=hm5f4H8jpjD4ZPaWgCdNWdCFgEaoqnz6Q/7za3MxLnHKNOg75MOMFs4IPocBZnsLIN IBX/IIc4xUrGrB+q9ck9iBQT1qqsz6KSXnWa8NDe7B6m7TnCHRbClFy7hVtGpX/qtivi bNNFr1xHykWh85gWybxs4WCp25YcWPvaoZV5YCeqrjHFtao4Vz45taEOWlYvYdZMZAty mFDOFOQtIbWw9ggaLBeJDHjgAV/wSwpEWcg3U+nbDYjlJn+b7W47NssGYTa9TUQc/k5K 8fIK7gMXnPqCAqdGYjsGQJI+hbV3EBDp1/7TbORHByncJm1q70ieXaJs6MeY1OJU071O W8Qw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1771984745; x=1772589545; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=THJtyHC4roj3n3GL8Oa5rgmiBcterqOM3duhm0M99gM=; b=nnSdL1oc+wBsjOooZaqKhljnviW1M8ml2qN42NpwBK/iAqRIO64pqP3xs8/Sj5Qd1H AhB6KaBt9lQ2buByJgXt67DqQkl/xIGdoUqGJKVQxaweAbRL/jiVqcP4/nY/LyuK5nd9 g4d6hXJPLjn/AFYIpdzlwHvkG0AkVeNT3AIlH4KIciajWY54bVpxmBHDelcTprbo7cSu F1MfPD7S6b8A/DdYtiWwUbn4AYu6rGPhn/cFQICp4dWZLf7eHagMbcGT0OqFvHgEbivs MVudqkmZEYwIQdvtK4ORMs3755ok6yz3xW7f8doBEsqgqsIBy4lOqoT+Q1wHH0mN1V7M VKgA== X-Forwarded-Encrypted: i=1; AJvYcCVD14bPMlHz8cW1mb0UOb+NjCy2hKtJiobs8GQbiGfbuAq1tiT3IgEyTfJFLbZFwJRDfuhpIoErED92S0c=@vger.kernel.org X-Gm-Message-State: AOJu0YzUeFGT/jWWLFwA5WUby3MbEMPBinIheEVkrdDoUiVv9JWjjPBZ C+U498IqSM9EY+rFV+QYwXACc45SEglX6Zi/7LK0cSlTLp9gtTnNjgje X-Gm-Gg: ATEYQzzlzporNbEPVWuswu4lcPP2PWq7uLE2wF+aqCFdM2mZCAf7wNH7ZJxotgN6irj jPhZBvuxGGO5NdnwvJidagS6cJOJdjLilJ1wf7m4pUJ8c46eTlNpldq0sQxz2ekYRm8ep/CpDDu mrW3PajBK4ZmqUwtnp2pXi9LTye/1Lc5rD7wvGO5hvr9Vps/t3J588ILttfjEfHzXnLPcOw7HCe i+q0iVNiWyAGnYTg14l1tqEujkJNjrsKjgZ5W2Jj0DG7EXMm1iTbARm/58/+Z6MesWsr/Gg0J0i p/hv2Bay/pb2YK/QtV1La7qy5oc+S086P4RXSI/IJa7WDOIEdqpDEwKohBe2JmoF7JTHGSMCzdj uJrtWjgHYg4d0nhwbv1AoHinFFXEDIr0wsDbDlUrwlvFZZTes5qCAxRUgdvWL09qjTvc/HCXBwp abnVemGbbRnqeRlEP0WRRi5hddV3uQ+c3QRGu8iQwESuQbvcixYJyTaraj X-Received: by 2002:a05:6a00:2d03:b0:81f:61d2:84a9 with SMTP id d2e1a72fcca58-826da9f05c7mr14192994b3a.35.1771984745071; Tue, 24 Feb 2026 17:59:05 -0800 (PST) Received: from twhmp6px (mxsmtp211.mxic.com.tw. [211.75.127.162]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-82726b44b47sm194077b3a.54.2026.02.24.17.59.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 24 Feb 2026 17:59:04 -0800 (PST) Received: from hqs-appsw-a2o.mp600.macronix.com (unknown [172.17.236.67]) by twhmp6px (Postfix) with ESMTPS id A2A6B4136078; Wed, 25 Feb 2026 09:59:02 +0800 (CST) From: Cheng Ming Lin To: Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Tudor Ambarus , Mikhail Kshevetskiy , Pablo Martin-Gomez , Tianling Shen , Pratyush Yadav , linux-mtd@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, alvinzhou@mxic.com.tw, Cheng Ming Lin Subject: [PATCH v7 3/3] mtd: spi-nand: macronix: Enable randomizer support Date: Wed, 25 Feb 2026 09:57:05 +0800 Message-Id: <20260225015705.1113199-4-linchengming884@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20260225015705.1113199-1-linchengming884@gmail.com> References: <20260225015705.1113199-1-linchengming884@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Cheng Ming Lin Implement the 'set_randomizer' callback for Macronix SPI NAND chips. The randomizer is enabled by setting bit 1 of the Configuration Register (address 0x10). This patch adds support for the following chips: - MX35LFxG24AD series - MX35UFxG24AD series When the randomizer is enabled, data is scrambled internally during program operations and automatically descrambled during read operations. This helps reduce bit errors caused by program disturbance. Signed-off-by: Cheng Ming Lin --- drivers/mtd/nand/spi/macronix.c | 38 ++++++++++++++++++++++++--------- 1 file changed, 28 insertions(+), 10 deletions(-) diff --git a/drivers/mtd/nand/spi/macronix.c b/drivers/mtd/nand/spi/macroni= x.c index 67cafa1bb8ef..7dfcc34e9b72 100644 --- a/drivers/mtd/nand/spi/macronix.c +++ b/drivers/mtd/nand/spi/macronix.c @@ -14,6 +14,8 @@ #define MACRONIX_ECCSR_BF_LAST_PAGE(eccsr) FIELD_GET(GENMASK(3, 0), eccsr) #define MACRONIX_ECCSR_BF_ACCUMULATED_PAGES(eccsr) FIELD_GET(GENMASK(7, 4)= , eccsr) #define MACRONIX_CFG_CONT_READ BIT(2) +#define MACRONIX_CFG_RANDOMIZER_EN BIT(1) +#define MACRONIX_FEATURE_ADDR_RANDOMIZER 0x10 #define MACRONIX_FEATURE_ADDR_READ_RETRY 0x70 #define MACRONIX_NUM_READ_RETRY_MODES 5 =20 @@ -170,6 +172,12 @@ static int macronix_set_read_retry(struct spinand_devi= ce *spinand, return spi_mem_exec_op(spinand->spimem, &op); } =20 +static int macronix_set_randomizer(struct spinand_device *spinand, bool en= able) +{ + return spinand_write_reg_op(spinand, MACRONIX_FEATURE_ADDR_RANDOMIZER, + enable ? MACRONIX_CFG_RANDOMIZER_EN : 0); +} + static const struct spinand_info macronix_spinand_table[] =3D { SPINAND_INFO("MX35LF1GE4AB", SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x12), @@ -231,7 +239,8 @@ static const struct spinand_info macronix_spinand_table= [] =3D { SPINAND_HAS_QE_BIT, SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout, NULL), SPINAND_READ_RETRY(MACRONIX_NUM_READ_RETRY_MODES, - macronix_set_read_retry)), + macronix_set_read_retry), + SPINAND_RANDOMIZER(macronix_set_randomizer)), SPINAND_INFO("MX35LF2G24AD", SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x24, 0x03), NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 2, 1, 1), @@ -243,7 +252,8 @@ static const struct spinand_info macronix_spinand_table= [] =3D { SPINAND_HAS_PROG_PLANE_SELECT_BIT, SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout, NULL), SPINAND_READ_RETRY(MACRONIX_NUM_READ_RETRY_MODES, - macronix_set_read_retry)), + macronix_set_read_retry), + SPINAND_RANDOMIZER(macronix_set_randomizer)), SPINAND_INFO("MX35LF2G24AD-Z4I8", SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x64, 0x03), NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1), @@ -254,7 +264,8 @@ static const struct spinand_info macronix_spinand_table= [] =3D { SPINAND_HAS_QE_BIT, SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout, NULL), SPINAND_READ_RETRY(MACRONIX_NUM_READ_RETRY_MODES, - macronix_set_read_retry)), + macronix_set_read_retry), + SPINAND_RANDOMIZER(macronix_set_randomizer)), SPINAND_INFO("MX35LF4G24AD", SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x35, 0x03), NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 2, 1, 1), @@ -266,7 +277,8 @@ static const struct spinand_info macronix_spinand_table= [] =3D { SPINAND_HAS_PROG_PLANE_SELECT_BIT, SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout, NULL), SPINAND_READ_RETRY(MACRONIX_NUM_READ_RETRY_MODES, - macronix_set_read_retry)), + macronix_set_read_retry), + SPINAND_RANDOMIZER(macronix_set_randomizer)), SPINAND_INFO("MX35LF4G24AD-Z4I8", SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x75, 0x03), NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 1), @@ -277,7 +289,8 @@ static const struct spinand_info macronix_spinand_table= [] =3D { SPINAND_HAS_QE_BIT, SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout, NULL), SPINAND_READ_RETRY(MACRONIX_NUM_READ_RETRY_MODES, - macronix_set_read_retry)), + macronix_set_read_retry), + SPINAND_RANDOMIZER(macronix_set_randomizer)), SPINAND_INFO("MX31LF1GE4BC", SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x1e), NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1), @@ -327,7 +340,8 @@ static const struct spinand_info macronix_spinand_table= [] =3D { SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout, macronix_ecc_get_status), SPINAND_READ_RETRY(MACRONIX_NUM_READ_RETRY_MODES, - macronix_set_read_retry)), + macronix_set_read_retry), + SPINAND_RANDOMIZER(macronix_set_randomizer)), SPINAND_INFO("MX35UF4G24AD-Z4I8", SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xf5, 0x03), NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 1), @@ -340,7 +354,8 @@ static const struct spinand_info macronix_spinand_table= [] =3D { SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout, macronix_ecc_get_status), SPINAND_READ_RETRY(MACRONIX_NUM_READ_RETRY_MODES, - macronix_set_read_retry)), + macronix_set_read_retry), + SPINAND_RANDOMIZER(macronix_set_randomizer)), SPINAND_INFO("MX35UF4GE4AD", SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xb7, 0x03), NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 1), @@ -381,7 +396,8 @@ static const struct spinand_info macronix_spinand_table= [] =3D { SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout, macronix_ecc_get_status), SPINAND_READ_RETRY(MACRONIX_NUM_READ_RETRY_MODES, - macronix_set_read_retry)), + macronix_set_read_retry), + SPINAND_RANDOMIZER(macronix_set_randomizer)), SPINAND_INFO("MX35UF2G24AD-Z4I8", SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xe4, 0x03), NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1), @@ -394,7 +410,8 @@ static const struct spinand_info macronix_spinand_table= [] =3D { SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout, macronix_ecc_get_status), SPINAND_READ_RETRY(MACRONIX_NUM_READ_RETRY_MODES, - macronix_set_read_retry)), + macronix_set_read_retry), + SPINAND_RANDOMIZER(macronix_set_randomizer)), SPINAND_INFO("MX35UF2GE4AD", SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xa6, 0x03), NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1), @@ -444,7 +461,8 @@ static const struct spinand_info macronix_spinand_table= [] =3D { SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout, macronix_ecc_get_status), SPINAND_READ_RETRY(MACRONIX_NUM_READ_RETRY_MODES, - macronix_set_read_retry)), + macronix_set_read_retry), + SPINAND_RANDOMIZER(macronix_set_randomizer)), SPINAND_INFO("MX35UF1GE4AD", SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x96, 0x03), NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1), --=20 2.25.1