From nobody Tue Apr 7 12:24:01 2026 Received: from bali.collaboradmins.com (bali.collaboradmins.com [148.251.105.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 74DE63AE70C; Wed, 25 Feb 2026 12:20:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=148.251.105.195 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772022006; cv=none; b=Ts8Na/o0MBd27dvUwYknK6q9X/yItj6YmMJpPdCGOsjlAoRodMmgd8g6Mg4tXxf8vqX2QU4Ek+sgE5P0yf03zl7EtMqjsiKebUsmyBTjcS1AJqmQnYB44TkZgbxljQAsaYUF6Oa2MvouCyquglRnV7GXbHzwhohymRD3wdlueGw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772022006; c=relaxed/simple; bh=5vb/63Vg1zh5nED3D61MNyCtaS3psPO98Y/6tkPDleU=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=hn7FJFh39DWu4Lc6ef5xssL3NqUmlu8mi7vuY4rfZANdV7jpj9l3ST4Z0S088Fi/vE2Va5HW/45gs8RJLp+psO/IEWDnOZxzbRBWA5QAHpxOSXl6yQ76RxeJjGWKfvzlK/wKctXSRP8Nl8FjF4j4lhV1ovFl44NEq3OACMSogfA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b=ikhbhifT; arc=none smtp.client-ip=148.251.105.195 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b="ikhbhifT" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1772022001; bh=5vb/63Vg1zh5nED3D61MNyCtaS3psPO98Y/6tkPDleU=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=ikhbhifTL9C/xEAfLs7iQbQPAdqG6wRoodYW1tBAHNtAoWWBL1JfXJJappgxqrsaM Q2qfANnTW+rkaTH/LYWzl0+yT8R9We9IPPEigv97tmyWLYlMsbaaaZJ6QKetXMUNee dWeWLbQsgV9BQdGZwnLXRvnYj2CVChAejRXV4/midgxe8f7v6AN1nr564flS9U63Sw 66GeMZYPFVliyqr43WN23NIe1rEY8cYiH8fwm9wTTLfUiZgdo6a8dQPyNqPpoZAlcL +CXcxBxfOFjTX/ePdfPwnLMdoc9a9acuIjj64dSnkK3//jYUZVGOw4yLZnVoMF0UmA ZmdAzOM3y/kcA== Received: from localhost (unknown [86.123.23.225]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (prime256v1) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: cristicc) by bali.collaboradmins.com (Postfix) with ESMTPSA id 7E3DD17E04C4; Wed, 25 Feb 2026 13:20:01 +0100 (CET) From: Cristian Ciocaltea Date: Wed, 25 Feb 2026 14:19:57 +0200 Subject: [PATCH v3 1/3] media: dt-bindings: rockchip,vdec: Add alternative reg-names order for RK35{76,88} Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260225-vdec-reg-order-rk3576-v3-1-5a2ebe1b11a8@collabora.com> References: <20260225-vdec-reg-order-rk3576-v3-0-5a2ebe1b11a8@collabora.com> In-Reply-To: <20260225-vdec-reg-order-rk3576-v3-0-5a2ebe1b11a8@collabora.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Detlev Casanova , Ezequiel Garcia , Mauro Carvalho Chehab , Nicolas Dufresne , Hans Verkuil Cc: kernel@collabora.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Conor Dooley , linux-media@vger.kernel.org X-Mailer: b4 0.14.3 With the introduction of the RK3588 SoC, and RK3576 afterwards, the 'link' and 'cache' register blocks have been provided for the video decoder unit in addition to the existing 'function' one, which now shows up in between them (from address-based ordering point of view). However, the binding does not properly describe this hardware layout, as the new blocks are listed after the old one. Therefore it breaks the convention expecting the unit address to indicate the first register range. Since the binding changes have been already released and a fix would bring up an ABI break, mark the current 'reg-names' listing as deprecated and introduce an alternative 'link,function,cache' one. Additionally, drop the 'reg' description items as the order is not fixed anymore, while the information they offer is not very relevant anyway. Signed-off-by: Cristian Ciocaltea Reviewed-by: Nicolas Dufresne --- .../devicetree/bindings/media/rockchip,vdec.yaml | 19 ++++++++++++---= ---- 1 file changed, 12 insertions(+), 7 deletions(-) diff --git a/Documentation/devicetree/bindings/media/rockchip,vdec.yaml b/D= ocumentation/devicetree/bindings/media/rockchip,vdec.yaml index 809fda45b3bd..3f6072e8baa5 100644 --- a/Documentation/devicetree/bindings/media/rockchip,vdec.yaml +++ b/Documentation/devicetree/bindings/media/rockchip,vdec.yaml @@ -28,16 +28,21 @@ properties: =20 reg: minItems: 1 - items: - - description: The function configuration registers base - - description: The link table configuration registers base - - description: The cache configuration registers base + maxItems: 3 =20 reg-names: - items: + oneOf: - const: function - - const: link - - const: cache + - items: + - const: link + - const: function + - const: cache + - items: + - const: function + - const: link + - const: cache + deprecated: true + description: Use link,function,cache block order instead. =20 interrupts: maxItems: 1 --=20 2.52.0 From nobody Tue Apr 7 12:24:01 2026 Received: from bali.collaboradmins.com (bali.collaboradmins.com [148.251.105.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5CDD93AE6FF; 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Wed, 25 Feb 2026 13:20:02 +0100 (CET) From: Cristian Ciocaltea Date: Wed, 25 Feb 2026 14:19:58 +0200 Subject: [PATCH v3 2/3] arm64: dts: rockchip: Fix vdec register blocks order on RK3576 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260225-vdec-reg-order-rk3576-v3-2-5a2ebe1b11a8@collabora.com> References: <20260225-vdec-reg-order-rk3576-v3-0-5a2ebe1b11a8@collabora.com> In-Reply-To: <20260225-vdec-reg-order-rk3576-v3-0-5a2ebe1b11a8@collabora.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Detlev Casanova , Ezequiel Garcia , Mauro Carvalho Chehab , Nicolas Dufresne , Hans Verkuil Cc: kernel@collabora.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Conor Dooley , linux-media@vger.kernel.org X-Mailer: b4 0.14.3 When building device trees for the RK3576 based boards, DTC shows the following complaint: rk3576.dtsi:1282.30-1304.5: Warning (simple_bus_reg): /soc/video-codec@27= b00000: simple-bus unit address format error, expected "27b00100" Provide the register blocks using the 'link,function,cache' listing, which follows the address-based ordering and, implicitly, ensures the unit address points to the first register range. Signed-off-by: Cristian Ciocaltea --- arch/arm64/boot/dts/rockchip/rk3576.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3576.dtsi b/arch/arm64/boot/dts= /rockchip/rk3576.dtsi index 49ccdf12ef7e..45eb0d053a6f 100644 --- a/arch/arm64/boot/dts/rockchip/rk3576.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3576.dtsi @@ -1281,10 +1281,10 @@ gpu: gpu@27800000 { =20 vdec: video-codec@27b00000 { compatible =3D "rockchip,rk3576-vdec"; - reg =3D <0x0 0x27b00100 0x0 0x500>, - <0x0 0x27b00000 0x0 0x100>, + reg =3D <0x0 0x27b00000 0x0 0x100>, + <0x0 0x27b00100 0x0 0x500>, <0x0 0x27b00600 0x0 0x100>; - reg-names =3D "function", "link", "cache"; + reg-names =3D "link", "function", "cache"; interrupts =3D ; clocks =3D <&cru ACLK_RKVDEC_ROOT>, <&cru HCLK_RKVDEC>, <&cru ACLK_RKVDEC_ROOT_BAK>, <&cru CLK_RKVDEC_CORE>, --=20 2.52.0 From nobody Tue Apr 7 12:24:01 2026 Received: from bali.collaboradmins.com (bali.collaboradmins.com [148.251.105.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EF97F3AE70E; Wed, 25 Feb 2026 12:20:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=148.251.105.195 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772022007; cv=none; b=O7HKpRb0/LLXt2tPb4ipyrwg2lijeuRU89X943WTFiwz8E4bR3/mF4GMkacVorE10H+kG8F9a+QqIWhEAf3gn2BsvahkvWWjLikl6NblfXFucBafU+3d5d71eWcCV5qBC0/wXQ7VKgWelXaGfFW+w/eu1zIdZf7KaLcH87J1Bn8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772022007; c=relaxed/simple; bh=fWQKaJ3KVVTMepHRQE9cVCUJU/NMZyu4U07A0PswQIs=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=IxeG6peSnQ1bivQ/AKTBB0t6mKQ7TQML8+pZdlTeIH2lyPsqQ3J02VHwksOIa3XYBudqCyEiACE7JfrSNJktHfJ2l99yE5LcfynBKeqVgdbtgkoQbOPckdL4ku6d2GiLIfqydpBjLnPYEkrcGu0wk3HO5VhD+XU5rdJ96bQ7cz4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b=fdjFDCDC; arc=none smtp.client-ip=148.251.105.195 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b="fdjFDCDC" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1772022003; bh=fWQKaJ3KVVTMepHRQE9cVCUJU/NMZyu4U07A0PswQIs=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=fdjFDCDCVQLTuObBeHpSDDrY0mNHmbBdwPFozwtkIedBw+D1aux27QHYXpCYS6c4n cU+vPjmWOdRz9Ak/F6ZiXYKIQ82z/10tUaznABe8FEYALu8sfWdIHCJmz64V2Xdxml OSMQS5k+6MzmhN3YqIiCIrKNZCRfSyd5OC47D6tSTIq70N0yFAY6U1DQDBdNUjSKXW ibrdvep6Ys44K4IKjMF80eDjpO7yhCY9yGAmm8QDzNa8T0u0v/JE6m83DXBNU3fWY3 0n48Rkr4cYGzc0PuW53bPV5fP5Sj1oAGaUhWdcXCWd9fiKW3gZMrtwwPmYpdsvrjvH fnqg7bt1a/qbA== Received: from localhost (unknown [86.123.23.225]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (prime256v1) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: cristicc) by bali.collaboradmins.com (Postfix) with ESMTPSA id 2E66617E0D8E; Wed, 25 Feb 2026 13:20:03 +0100 (CET) From: Cristian Ciocaltea Date: Wed, 25 Feb 2026 14:19:59 +0200 Subject: [PATCH v3 3/3] arm64: dts: rockchip: Update vdec register blocks order on RK3588 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260225-vdec-reg-order-rk3576-v3-3-5a2ebe1b11a8@collabora.com> References: <20260225-vdec-reg-order-rk3576-v3-0-5a2ebe1b11a8@collabora.com> In-Reply-To: <20260225-vdec-reg-order-rk3576-v3-0-5a2ebe1b11a8@collabora.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Detlev Casanova , Ezequiel Garcia , Mauro Carvalho Chehab , Nicolas Dufresne , Hans Verkuil Cc: kernel@collabora.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Conor Dooley , linux-media@vger.kernel.org X-Mailer: b4 0.14.3 Provide the register blocks for RK3588 vdec0 & vdec1 nodes using the 'link,function,cache' listing, which follows the address-based ordering and, implicitly, ensures the unit address points to the first register range. This aligns with a similar fix for RK3576 where DTC complained about the bus address format. Signed-off-by: Cristian Ciocaltea --- arch/arm64/boot/dts/rockchip/rk3588-base.dtsi | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi b/arch/arm64/boo= t/dts/rockchip/rk3588-base.dtsi index 7fe9593d8c19..b95129f85aba 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi @@ -1355,10 +1355,10 @@ vepu121_3_mmu: iommu@fdbac800 { =20 vdec0: video-codec@fdc38000 { compatible =3D "rockchip,rk3588-vdec"; - reg =3D <0x0 0xfdc38100 0x0 0x500>, - <0x0 0xfdc38000 0x0 0x100>, + reg =3D <0x0 0xfdc38000 0x0 0x100>, + <0x0 0xfdc38100 0x0 0x500>, <0x0 0xfdc38600 0x0 0x100>; - reg-names =3D "function", "link", "cache"; + reg-names =3D "link", "function", "cache"; interrupts =3D ; clocks =3D <&cru ACLK_RKVDEC0>, <&cru HCLK_RKVDEC0>, <&cru CLK_RKVDEC0_C= A>, <&cru CLK_RKVDEC0_CORE>, <&cru CLK_RKVDEC0_HEVC_CA>; @@ -1387,10 +1387,10 @@ vdec0_mmu: iommu@fdc38700 { =20 vdec1: video-codec@fdc40000 { compatible =3D "rockchip,rk3588-vdec"; - reg =3D <0x0 0xfdc40100 0x0 0x500>, - <0x0 0xfdc40000 0x0 0x100>, + reg =3D <0x0 0xfdc40000 0x0 0x100>, + <0x0 0xfdc40100 0x0 0x500>, <0x0 0xfdc40600 0x0 0x100>; - reg-names =3D "function", "link", "cache"; + reg-names =3D "link", "function", "cache"; interrupts =3D ; clocks =3D <&cru ACLK_RKVDEC1>, <&cru HCLK_RKVDEC1>, <&cru CLK_RKVDEC1_C= A>, <&cru CLK_RKVDEC1_CORE>, <&cru CLK_RKVDEC1_HEVC_CA>; --=20 2.52.0