From nobody Fri Apr 17 09:30:28 2026 Received: from mail-pl1-f172.google.com (mail-pl1-f172.google.com [209.85.214.172]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EC3AD27FB37 for ; Sat, 21 Feb 2026 07:14:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.214.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771658055; cv=none; b=c+joy2/JL/Lz9g5qU3H0drQdkPw7qnOZwu8Zg4ourxHzW6xAxo84gWgYLbwil0WjL+tshywO9XYOxWSET+NnwDUnABepS61bWfNhLaKCPeyBLi0dlipwkFjez/HzLSweVRNu08QcfO54uT0UxKU0Xod+8SUPMTtc1wxVm7HI/7Y= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771658055; c=relaxed/simple; bh=MW4GX/c88CmZf0BtDY63F/z2OyyF3rvO5grIORC4RIw=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=M/qzSx2VEfp4PE0V0XgeXel2UnHJQvLAxP2Sup4xMo/TMBpigiJp1yhusU40NVmS8ypbBRK4a7sg1yOmyqnsIwflINl3l7KIWtbEZkb2gUXw+G4gK4hBPHgs6mmkO93s3MHi3pH2hb7VRh5QJfF8/w+7pRP9mZLqGRVyJZOkaYU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=RQ2AjWDn; arc=none smtp.client-ip=209.85.214.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="RQ2AjWDn" Received: by mail-pl1-f172.google.com with SMTP id d9443c01a7336-2ad3f12a496so17340045ad.1 for ; Fri, 20 Feb 2026 23:14:13 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1771658053; x=1772262853; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=IJY8ZZY4WMcXwGgxq6y3UB/v+Z7nyRkvGlTdnxwP0hk=; b=RQ2AjWDnsRK5LYLh9Ghz93ypbOo0DqH8lBQDbfL9BQVpc8YZhfVv2Ovijfp3ODLwYA Ve+B2CtTST1dTZzn509E0qxyNuO2tZDtIeZpdhzDxFw1l15F5sn2Pv/OpM/FJz6TVq7V lTir7ie/jvtA4dE3GyCC9lPIg//UMYzZjhn/Hw2nBbrcZp7iO7LKfgn3qFEKrNi1j9lm vX0VInws/QUtHy64g3LYPq8lnfbDVyPqDAp9cGyIHioeHBByCu9cIxkDg2RgG+B3NjML MP7hed+di9nzo4HiVbp3n8v8lk8lNh5CfpraDUi0qGrqPufvjQN26KFSMIgT5ryrTjnH lBrA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1771658053; x=1772262853; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=IJY8ZZY4WMcXwGgxq6y3UB/v+Z7nyRkvGlTdnxwP0hk=; b=lD33kN7n2xgjRHU2PbOfFyug/6Q9msDBB1oCVihA0mDqw/Umt15M8YrehhVqv6ausX xL1MjP/iw19Ehj3YHDrKGqo+XSUKcYy5XOzd2+ptdkGxnXhI5ZXowf3r2P5Ut+Ub5bfS wHCrjxbTU7s9WxbpMQK7ThIw0uqqs+nUMZWOz8VOQN7szQvRm+hfPYEsMdBMxNdznoMz rq/4MvTmRsIYEno/ArwOrdSdLYIXu73cdS/K4dOwB0IcUs0K3katu2jMwfgSZMYoxJSW WPiUBtoyswCr80wr8HiLFBYi4Wt0+Vcju8ZQ8Hzfu6O87pRa+qibFnDpTNBM0EP4LYCD 60mA== X-Forwarded-Encrypted: i=1; AJvYcCWohySI5bIHku3wn/oe96yKKq4LJfstC2HFFC7hiLSyqMkIj0S/qGRASdN5ZxAZR6XwdgdmWYSplQp1Ybk=@vger.kernel.org X-Gm-Message-State: AOJu0YxZAIfRY7nWpzptP9vJ5mA6Ci5I1B3etP5ML7P67TnsLC3Jw6g2 3hUJ2plpDetCb19yYqoxPJ3FpJDHTURLnx+Z6LU4kJ1WhFnoHQRcDCb3 X-Gm-Gg: AZuq6aKFZssCMk8zDe9oen7wTGsMOHicWFHy4xRIhoiit23S5i5iqEXsTbZFwFWmTFE SqSGBuMcfA1zldPluas4dONHn+pI32Eycp91Gu1osSVRCx5ep9KY1oQbEhCtDSAFiGvuNhDd47L 2QwKhh75pVJQpUgv62s5438AdH/pMyU1fyVew00yLlA4VjPUYW4ATMDoD6wcH1DN4XV26QBhVR6 QdeWH/vijSj+y8mFV2wAnhMFa1med51Dp5skBfSMNJUGBKHR+q0UlDUe4fsj4C4d5p9OALEAjkc 9aTWAublBfAMG7HJbFkGxt4oV09+cWniZ1KYMHuk7dW2/ew2vY5wk2eGP7NB6gEgi527qrKGq7O vriAW8Bp69fkz3VyNFDKs9DbMSwWfPJ2IkF8pivPmE0ifcAoFQJeodRFyJPHJYpmOUmgnnU5v2a 7yV4P6r4k7BtlKYnYOlzVbOFx0SBN8m/sNsa0KXWCyzA== X-Received: by 2002:a17:903:2f85:b0:2aa:f43d:7c41 with SMTP id d9443c01a7336-2ad741f51admr21007435ad.10.1771658053228; Fri, 20 Feb 2026 23:14:13 -0800 (PST) Received: from debian.ari ([152.58.178.174]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2ad7500e2a7sm12657355ad.46.2026.02.20.23.14.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 20 Feb 2026 23:14:12 -0800 (PST) From: Archit Anant To: neil.armstrong@linaro.org, jesszhan0024@gmail.com, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de Cc: sebastian.reichel@collabora.com, gerald.loacker@wolfvision.net, michael.riesch@collabora.com, miquel.raynal@bootlin.com, wens@kernel.org, airlied@gmail.com, simona@ffwll.ch, architanant5@gmail.com, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org Subject: [RFC PATCH v3 1/3] drm/mipi-dbi: Provide option to invert reset GPIO logic Date: Sat, 21 Feb 2026 12:43:49 +0530 Message-Id: <20260221071351.22772-2-architanant5@gmail.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20260221071351.22772-1-architanant5@gmail.com> References: <20260221071351.22772-1-architanant5@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Chen-Yu Tsai When mipi_dbi (tinydrm) was added, the reset handling assumed that "logic high" or "active" was out of reset, while "logic low" or "inactive" was in reset. This is the opposite of how many reset bindings are written, wherein "active" means the reset is active, i.e the device is put or held in reset. Provide an option to invert the logic so that drivers for bindings with "active is in reset" using mipi_dbi can use the common reset handling. Signed-off-by: Chen-Yu Tsai --- drivers/gpu/drm/drm_mipi_dbi.c | 4 ++-- include/drm/drm_mipi_dbi.h | 9 +++++++++ 2 files changed, 11 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/drm_mipi_dbi.c b/drivers/gpu/drm/drm_mipi_dbi.c index 00482227a9cd..7fa1f73a38a4 100644 --- a/drivers/gpu/drm/drm_mipi_dbi.c +++ b/drivers/gpu/drm/drm_mipi_dbi.c @@ -713,9 +713,9 @@ void mipi_dbi_hw_reset(struct mipi_dbi *dbi) if (!dbi->reset) return; =20 - gpiod_set_value_cansleep(dbi->reset, 0); + gpiod_set_value_cansleep(dbi->reset, dbi->invert_reset ? 1 : 0); usleep_range(20, 1000); - gpiod_set_value_cansleep(dbi->reset, 1); + gpiod_set_value_cansleep(dbi->reset, dbi->invert_reset ? 0 : 1); msleep(120); } EXPORT_SYMBOL(mipi_dbi_hw_reset); diff --git a/include/drm/drm_mipi_dbi.h b/include/drm/drm_mipi_dbi.h index f45f9612c0bc..6cebf74bcecc 100644 --- a/include/drm/drm_mipi_dbi.h +++ b/include/drm/drm_mipi_dbi.h @@ -44,6 +44,15 @@ struct mipi_dbi { */ bool swap_bytes; =20 + /** + * @invert_reset: Invert reset logic level. + * + * This is needed as drm_mipi_dbi (formerly tinydrm) introduced reset + * GPIO controls with "logic high" being "out of reset", while other + * bindings typically have "logic high" as "in reset". + */ + bool invert_reset; + /** * @reset: Optional reset gpio */ --=20 2.39.5 From nobody Fri Apr 17 09:30:28 2026 Received: from mail-pg1-f173.google.com (mail-pg1-f173.google.com [209.85.215.173]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 18C193358DA for ; Sat, 21 Feb 2026 07:14:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.215.173 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771658062; cv=none; b=dkJcrJnPGR+ro7NDdB8QYCGkbrlFwI+4SuN52xp1H02jeeuH2qmbp0fiSbVlAm/D064bXnY9FsCsvnCLFlNFnjIf/Ex2UDfjJ6N4QZxl3ULjTDEkG73bhTH6Clg9IKSFi8vkw+yPX6Ez5Rt1mjo6V9qH65miEoJFBYq9+omX9Dk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771658062; c=relaxed/simple; bh=mXejZkUt6HVkhV249piZ4QMKpnB2wm3mXbJG4zbaL4M=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=FtTc9oyuoOl0jVDmmmdBuxFFFH909mqZH6ZuSBi+mTOgzAluSXqssPY1h8ZoOZCe+sXV6OfhBSCPx28cN9wd8BU6NX0phcdB4mKTIV67ITxTtdTqu+w/MTZlqvkAmIEhD0jMEojIK8sUHJSZmYTZsvuFjPfasndJTFssvgekQl4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=TF9IGEKI; arc=none smtp.client-ip=209.85.215.173 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="TF9IGEKI" Received: by mail-pg1-f173.google.com with SMTP id 41be03b00d2f7-c70bb8ffb24so32217a12.1 for ; Fri, 20 Feb 2026 23:14:20 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1771658060; x=1772262860; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=tt2cI0CFA1lSwcuoKra3VDi7wTbrr7+h0ujQ6M5Fl7A=; b=TF9IGEKI91p5eMJpYyoMh7GO2DPpqW1i8bLGRaQvrjyEDXnIojz53FanNP0w4pl5nH K6We9lv1qZB9DFYOKzFMVa7aa7u9GfSxk3mzegZadPM63D9SqxS+SjdDyqWHgpZPLbqo m9jI3fJFrmbeiuSvkhcxkogOb/g0aCSQDw8Q+vtn5XdQPY9S731cf2sXyS0hmvLJvFTR xcCcHZIjcGkljvjUsKsU6MDdSmV/gUvDgurUFoSQ8Pn98Zc8yxyFTM3FFuQvf+3/rqgZ T8v4LvqQ8vyxl9yczuwdkh31VghdcMyhVWHRZ9bwqcqTW5635bs1eCJJReaeEwjT+ylt HpwQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1771658060; x=1772262860; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=tt2cI0CFA1lSwcuoKra3VDi7wTbrr7+h0ujQ6M5Fl7A=; b=GDw2Nl+dUU4I0vmJcJzcXG1DCyaMXnXsWf+pMUYcgL9UBWaBzcOACAsQW0sEAitcVA Nn7qLY/fApWi5E5h7LqKVRa2VUaFSoDpbQza6P5kzgdNsnZjkMiIgNCVrW3o6pz0R7p0 Xf5cxZNxvNbIW5kSx5+E2LUaGNQY3hgRNT+N4ywizgVQtUOVPwY0c27j70tTCxcvwsmM Yhe0SFcJN17rolqfWIuS/GssdGCEkUyLtnHQZL84rq+TWrVRK76Y/Pzn1yOjiFq2e8wU VL2iChHvAs7GbhDJv0UZ6Y8oE0BnegAj24OvKjdWRwlEXF8NIQ1xi5IsK39P0ikUHo8y WT4A== X-Forwarded-Encrypted: i=1; AJvYcCXwgnjgsVT/Qcg6IwWRBrdIrpMYhyg1ggpGSuXiUx66acHaE7nNlislW8BaV11fgOAbzbxsF9LdlIopvbE=@vger.kernel.org X-Gm-Message-State: AOJu0Ywun2ZWy+nSIWv1PjH+F1cX6uL/BDXKucsnioL3EGdKml/0d1Hb tW3wSXmt+Pf8cBmEFuzUCNBHeCxuZz34sqiDwGCSEys0wIE6Pg2+gpz0 X-Gm-Gg: AZuq6aJpXZGsXnJDtowiEVs9OvM60MYdLmj+uUyHzA55vZl88EkkAQyc+pymFGcmTv1 3WBRTuWDHoTtB5TvEPCgwVNx79ukZGd26SQpjt+ixVcdMDMJBKh839OGZtJmH4EzoigWow9TJD/ xJX+BEe+mU79bgJwcyTK/yfyjnpSwFo30oKkjPBHIMGPEEGGDra5TrMP7XeX59joEXENrjT9siY 41qdcMqXBOlAvY1g3E47kr2I8yRrWUKIFTfS26iVvmSojTeXbNW+t7nLAs73Tbmdpp71+PXBbMP 7PBR3EH9+dWWmn/tZqsm9MhEzhnxld7uOKznHsu6sG7zf/7ywt0eEskWsAyZ8/VfvljrRzkWaRu ASiVFy+Rg0wZIJ8RRdm8lbZLmXCDk/GsC+TcOJbko6BP7DeF7n+PhY3zY2mC6m5PpInY72pIsba Cprlm9/NcqIn9POrq4LWB4J0oHOrsaaysTi2bIEfGDnw== X-Received: by 2002:a17:903:1b04:b0:2aa:d5ea:4cfb with SMTP id d9443c01a7336-2ad74455fbdmr21820875ad.9.1771658060370; Fri, 20 Feb 2026 23:14:20 -0800 (PST) Received: from debian.ari ([152.58.178.174]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2ad7500e2a7sm12657355ad.46.2026.02.20.23.14.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 20 Feb 2026 23:14:20 -0800 (PST) From: Archit Anant To: neil.armstrong@linaro.org, jesszhan0024@gmail.com, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de Cc: sebastian.reichel@collabora.com, gerald.loacker@wolfvision.net, michael.riesch@collabora.com, miquel.raynal@bootlin.com, wens@kernel.org, airlied@gmail.com, simona@ffwll.ch, architanant5@gmail.com, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org Subject: [RFC PATCH v3 2/3] drm/panel: sitronix-st7789v: Convert to mipi_dbi Date: Sat, 21 Feb 2026 12:43:50 +0530 Message-Id: <20260221071351.22772-3-architanant5@gmail.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20260221071351.22772-1-architanant5@gmail.com> References: <20260221071351.22772-1-architanant5@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Chen-Yu Tsai The wire protocol of the ST7789V is basically MIPI DBI. Switch to the mipi_dbi helpers to reduce some code. This also ends up adding support for 8-bit D/C mode. The reset logic in the mipi_dbi helpers is also used. While at it, also clean up st7789v_check_id() to use ST7789V_IDS_SIZE to declare the ids array size and sizeof(ids) where the size is needed. Signed-off-by: Chen-Yu Tsai --- drivers/gpu/drm/panel/Kconfig | 1 + .../gpu/drm/panel/panel-sitronix-st7789v.c | 306 +++++++----------- 2 files changed, 110 insertions(+), 197 deletions(-) diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig index 307152ad7759..64325874d3e2 100644 --- a/drivers/gpu/drm/panel/Kconfig +++ b/drivers/gpu/drm/panel/Kconfig @@ -1011,6 +1011,7 @@ config DRM_PANEL_SITRONIX_ST7789V tristate "Sitronix ST7789V panel" depends on OF && SPI depends on BACKLIGHT_CLASS_DEVICE + select DRM_MIPI_DBI help Say Y here if you want to enable support for the Sitronix ST7789V controller for 240x320 LCD panels diff --git a/drivers/gpu/drm/panel/panel-sitronix-st7789v.c b/drivers/gpu/d= rm/panel/panel-sitronix-st7789v.c index d5f821d6b23c..b77e616f2994 100644 --- a/drivers/gpu/drm/panel/panel-sitronix-st7789v.c +++ b/drivers/gpu/drm/panel/panel-sitronix-st7789v.c @@ -14,6 +14,7 @@ =20 #include #include +#include #include =20 #define ST7789V_RAMCTRL_CMD 0xb0 @@ -125,9 +126,9 @@ struct st7789_panel_info { =20 struct st7789v { struct drm_panel panel; + struct mipi_dbi dbi; const struct st7789_panel_info *info; struct spi_device *spi; - struct gpio_desc *reset; struct regulator *power; enum drm_panel_orientation orientation; }; @@ -142,86 +143,23 @@ static inline struct st7789v *panel_to_st7789v(struct= drm_panel *panel) return container_of(panel, struct st7789v, panel); } =20 -static int st7789v_spi_write(struct st7789v *ctx, enum st7789v_prefix pref= ix, - u8 data) -{ - struct spi_transfer xfer =3D { }; - u16 txbuf =3D ((prefix & 1) << 8) | data; - - xfer.tx_buf =3D &txbuf; - xfer.len =3D sizeof(txbuf); - - return spi_sync_transfer(ctx->spi, &xfer, 1); -} - -static int st7789v_write_command(struct st7789v *ctx, u8 cmd) -{ - return st7789v_spi_write(ctx, ST7789V_COMMAND, cmd); -} - -static int st7789v_write_data(struct st7789v *ctx, u8 cmd) -{ - return st7789v_spi_write(ctx, ST7789V_DATA, cmd); -} - -static int st7789v_read_data(struct st7789v *ctx, u8 cmd, u8 *buf, - unsigned int len) -{ - struct spi_transfer xfer[2] =3D { }; - struct spi_message msg; - u16 txbuf =3D ((ST7789V_COMMAND & 1) << 8) | cmd; - u16 rxbuf[4] =3D {}; - u8 bit9 =3D 0; - int ret, i; - - switch (len) { - case 1: - case 3: - case 4: - break; - default: - return -EOPNOTSUPP; - } - - spi_message_init(&msg); - - xfer[0].tx_buf =3D &txbuf; - xfer[0].len =3D sizeof(txbuf); - spi_message_add_tail(&xfer[0], &msg); - - xfer[1].rx_buf =3D rxbuf; - xfer[1].len =3D len * 2; - spi_message_add_tail(&xfer[1], &msg); - - ret =3D spi_sync(ctx->spi, &msg); - if (ret) - return ret; - - for (i =3D 0; i < len; i++) { - buf[i] =3D rxbuf[i] >> i | (bit9 << (9 - i)); - if (i) - bit9 =3D rxbuf[i] & GENMASK(i - 1, 0); - } - - return 0; -} - static int st7789v_check_id(struct drm_panel *panel) { const u8 st7789v_ids[ST7789V_IDS_SIZE] =3D ST7789V_IDS; struct st7789v *ctx =3D panel_to_st7789v(panel); bool invalid_ids =3D false; int ret, i; - u8 ids[3]; + u8 ids[ST7789V_IDS_SIZE]; =20 if (ctx->spi->mode & SPI_NO_RX) return 0; =20 - ret =3D st7789v_read_data(ctx, MIPI_DCS_GET_DISPLAY_ID, ids, ST7789V_IDS_= SIZE); + ret =3D mipi_dbi_command_stackbuf(&ctx->dbi, MIPI_DCS_GET_DISPLAY_ID, + ids, sizeof(ids)); if (ret) return ret; =20 - for (i =3D 0; i < ST7789V_IDS_SIZE; i++) { + for (i =3D 0; i < sizeof(ids); i++) { if (ids[i] !=3D st7789v_ids[i]) { invalid_ids =3D true; break; @@ -379,6 +317,7 @@ static enum drm_panel_orientation st7789v_get_orientati= on(struct drm_panel *p) static int st7789v_prepare(struct drm_panel *panel) { struct st7789v *ctx =3D panel_to_st7789v(panel); + struct mipi_dbi *dbi =3D &ctx->dbi; u8 mode, pixel_fmt, polarity; int ret; =20 @@ -416,10 +355,7 @@ static int st7789v_prepare(struct drm_panel *panel) if (ret) return ret; =20 - gpiod_set_value(ctx->reset, 1); - msleep(30); - gpiod_set_value(ctx->reset, 0); - msleep(120); + mipi_dbi_hw_reset(&ctx->dbi); =20 /* * Avoid failing if the IDs are invalid in case the Rx bus width @@ -429,101 +365,81 @@ static int st7789v_prepare(struct drm_panel *panel) if (ret) dev_warn(panel->dev, "Unrecognized panel IDs"); =20 - ST7789V_TEST(ret, st7789v_write_command(ctx, MIPI_DCS_EXIT_SLEEP_MODE)); + ST7789V_TEST(ret, mipi_dbi_command(dbi, MIPI_DCS_EXIT_SLEEP_MODE)); =20 /* We need to wait 120ms after a sleep out command */ msleep(120); =20 - ST7789V_TEST(ret, st7789v_write_command(ctx, - MIPI_DCS_SET_ADDRESS_MODE)); - ST7789V_TEST(ret, st7789v_write_data(ctx, 0)); - - ST7789V_TEST(ret, st7789v_write_command(ctx, - MIPI_DCS_SET_PIXEL_FORMAT)); - ST7789V_TEST(ret, st7789v_write_data(ctx, pixel_fmt)); - - ST7789V_TEST(ret, st7789v_write_command(ctx, ST7789V_PORCTRL_CMD)); - ST7789V_TEST(ret, st7789v_write_data(ctx, 0xc)); - ST7789V_TEST(ret, st7789v_write_data(ctx, 0xc)); - ST7789V_TEST(ret, st7789v_write_data(ctx, 0)); - ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_PORCTRL_IDLE_BP(3) | - ST7789V_PORCTRL_IDLE_FP(3))); - ST7789V_TEST(ret, st7789v_write_data(ctx, - ST7789V_PORCTRL_PARTIAL_BP(3) | - ST7789V_PORCTRL_PARTIAL_FP(3))); - - ST7789V_TEST(ret, st7789v_write_command(ctx, ST7789V_GCTRL_CMD)); - ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_GCTRL_VGLS(5) | - ST7789V_GCTRL_VGHS(3))); - - ST7789V_TEST(ret, st7789v_write_command(ctx, ST7789V_VCOMS_CMD)); - ST7789V_TEST(ret, st7789v_write_data(ctx, 0x2b)); - - ST7789V_TEST(ret, st7789v_write_command(ctx, ST7789V_LCMCTRL_CMD)); - ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_LCMCTRL_XMH | - ST7789V_LCMCTRL_XMX | - ST7789V_LCMCTRL_XBGR)); - - ST7789V_TEST(ret, st7789v_write_command(ctx, ST7789V_VDVVRHEN_CMD)); - ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_VDVVRHEN_CMDEN)); - - ST7789V_TEST(ret, st7789v_write_command(ctx, ST7789V_VRHS_CMD)); - ST7789V_TEST(ret, st7789v_write_data(ctx, 0xf)); - - ST7789V_TEST(ret, st7789v_write_command(ctx, ST7789V_VDVS_CMD)); - ST7789V_TEST(ret, st7789v_write_data(ctx, 0x20)); - - ST7789V_TEST(ret, st7789v_write_command(ctx, ST7789V_FRCTRL2_CMD)); - ST7789V_TEST(ret, st7789v_write_data(ctx, 0xf)); - - ST7789V_TEST(ret, st7789v_write_command(ctx, ST7789V_PWCTRL1_CMD)); - ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_PWCTRL1_MAGIC)); - ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_PWCTRL1_AVDD(2) | - ST7789V_PWCTRL1_AVCL(2) | - ST7789V_PWCTRL1_VDS(1))); - - ST7789V_TEST(ret, st7789v_write_command(ctx, ST7789V_PVGAMCTRL_CMD)); - ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_PVGAMCTRL_VP63(0xd))); - ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_PVGAMCTRL_VP1(0xca))); - ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_PVGAMCTRL_VP2(0xe))); - ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_PVGAMCTRL_VP4(8))); - ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_PVGAMCTRL_VP6(9))); - ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_PVGAMCTRL_VP13(7))); - ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_PVGAMCTRL_VP20(0x2d))); - ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_PVGAMCTRL_VP27(0xb) | - ST7789V_PVGAMCTRL_VP36(3))); - ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_PVGAMCTRL_VP43(0x3d))); - ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_PVGAMCTRL_JP1(3) | - ST7789V_PVGAMCTRL_VP50(4))); - ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_PVGAMCTRL_VP57(0xa))); - ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_PVGAMCTRL_VP59(0xa))); - ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_PVGAMCTRL_VP61(0x1b))); - ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_PVGAMCTRL_VP62(0x28))); - - ST7789V_TEST(ret, st7789v_write_command(ctx, ST7789V_NVGAMCTRL_CMD)); - ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_NVGAMCTRL_VN63(0xd))); - ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_NVGAMCTRL_VN1(0xca))); - ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_NVGAMCTRL_VN2(0xf))); - ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_NVGAMCTRL_VN4(8))); - ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_NVGAMCTRL_VN6(8))); - ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_NVGAMCTRL_VN13(7))); - ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_NVGAMCTRL_VN20(0x2e))); - ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_NVGAMCTRL_VN27(0xc) | - ST7789V_NVGAMCTRL_VN36(5))); - ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_NVGAMCTRL_VN43(0x40))); - ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_NVGAMCTRL_JN1(3) | - ST7789V_NVGAMCTRL_VN50(4))); - ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_NVGAMCTRL_VN57(9))); - ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_NVGAMCTRL_VN59(0xb))); - ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_NVGAMCTRL_VN61(0x1b))); - ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_NVGAMCTRL_VN62(0x28))); + ST7789V_TEST(ret, mipi_dbi_command(dbi, MIPI_DCS_SET_ADDRESS_MODE, 0)); + ST7789V_TEST(ret, mipi_dbi_command(dbi, MIPI_DCS_SET_PIXEL_FORMAT, pixel_= fmt)); + ST7789V_TEST(ret, mipi_dbi_command(dbi, ST7789V_PORCTRL_CMD, 0xc, 0xc, 0, + ST7789V_PORCTRL_IDLE_BP(3) | + ST7789V_PORCTRL_IDLE_FP(3), + ST7789V_PORCTRL_PARTIAL_BP(3) | + ST7789V_PORCTRL_PARTIAL_FP(3))); + + ST7789V_TEST(ret, mipi_dbi_command(dbi, ST7789V_GCTRL_CMD, + ST7789V_GCTRL_VGLS(5) | + ST7789V_GCTRL_VGHS(3))); + ST7789V_TEST(ret, mipi_dbi_command(dbi, ST7789V_VCOMS_CMD, 0x2b)); + + ST7789V_TEST(ret, mipi_dbi_command(dbi, ST7789V_LCMCTRL_CMD, + ST7789V_LCMCTRL_XMH | + ST7789V_LCMCTRL_XMX | + ST7789V_LCMCTRL_XBGR)); + + ST7789V_TEST(ret, mipi_dbi_command(dbi, ST7789V_VDVVRHEN_CMD, + ST7789V_VDVVRHEN_CMDEN)); + + ST7789V_TEST(ret, mipi_dbi_command(dbi, ST7789V_VRHS_CMD, 0xf)); + ST7789V_TEST(ret, mipi_dbi_command(dbi, ST7789V_VDVS_CMD, 0x20)); + ST7789V_TEST(ret, mipi_dbi_command(dbi, ST7789V_FRCTRL2_CMD, 0xf)); + ST7789V_TEST(ret, mipi_dbi_command(dbi, ST7789V_PWCTRL1_CMD, + ST7789V_PWCTRL1_MAGIC, + ST7789V_PWCTRL1_AVDD(2) | + ST7789V_PWCTRL1_AVCL(2) | + ST7789V_PWCTRL1_VDS(1))); + + ST7789V_TEST(ret, mipi_dbi_command(dbi, ST7789V_PVGAMCTRL_CMD, + ST7789V_PVGAMCTRL_VP63(0xd), + ST7789V_PVGAMCTRL_VP1(0xca), + ST7789V_PVGAMCTRL_VP2(0xe), + ST7789V_PVGAMCTRL_VP4(8), + ST7789V_PVGAMCTRL_VP6(9), + ST7789V_PVGAMCTRL_VP13(7), + ST7789V_PVGAMCTRL_VP20(0x2d), + ST7789V_PVGAMCTRL_VP27(0xb) | + ST7789V_PVGAMCTRL_VP36(3), + ST7789V_PVGAMCTRL_VP43(0x3d), + ST7789V_PVGAMCTRL_JP1(3) | + ST7789V_PVGAMCTRL_VP50(4), + ST7789V_PVGAMCTRL_VP57(0xa), + ST7789V_PVGAMCTRL_VP59(0xa), + ST7789V_PVGAMCTRL_VP61(0x1b), + ST7789V_PVGAMCTRL_VP62(0x28))); + + ST7789V_TEST(ret, mipi_dbi_command(dbi, ST7789V_NVGAMCTRL_CMD, + ST7789V_NVGAMCTRL_VN63(0xd), + ST7789V_NVGAMCTRL_VN1(0xca), + ST7789V_NVGAMCTRL_VN2(0xf), + ST7789V_NVGAMCTRL_VN4(8), + ST7789V_NVGAMCTRL_VN6(8), + ST7789V_NVGAMCTRL_VN13(7), + ST7789V_NVGAMCTRL_VN20(0x2e), + ST7789V_NVGAMCTRL_VN27(0xc) | + ST7789V_NVGAMCTRL_VN36(5), + ST7789V_NVGAMCTRL_VN43(0x40), + ST7789V_NVGAMCTRL_JN1(3) | + ST7789V_NVGAMCTRL_VN50(4), + ST7789V_NVGAMCTRL_VN57(9), + ST7789V_NVGAMCTRL_VN59(0xb), + ST7789V_NVGAMCTRL_VN61(0x1b), + ST7789V_NVGAMCTRL_VN62(0x28))); =20 if (ctx->info->invert_mode) { - ST7789V_TEST(ret, st7789v_write_command(ctx, - MIPI_DCS_ENTER_INVERT_MODE)); + ST7789V_TEST(ret, mipi_dbi_command(dbi, MIPI_DCS_ENTER_INVERT_MODE)); } else { - ST7789V_TEST(ret, st7789v_write_command(ctx, - MIPI_DCS_EXIT_INVERT_MODE)); + ST7789V_TEST(ret, mipi_dbi_command(dbi, MIPI_DCS_EXIT_INVERT_MODE)); } =20 if (ctx->info->partial_mode) { @@ -539,36 +455,27 @@ static int st7789v_prepare(struct drm_panel *panel) * add margins. */ =20 - ST7789V_TEST(ret, st7789v_write_command( - ctx, MIPI_DCS_ENTER_PARTIAL_MODE)); - - ST7789V_TEST(ret, st7789v_write_command( - ctx, MIPI_DCS_SET_PAGE_ADDRESS)); - ST7789V_TEST(ret, st7789v_write_data(ctx, area_data[0])); - ST7789V_TEST(ret, st7789v_write_data(ctx, area_data[1])); - ST7789V_TEST(ret, st7789v_write_data(ctx, area_data[2])); - ST7789V_TEST(ret, st7789v_write_data(ctx, area_data[3])); - - ST7789V_TEST(ret, st7789v_write_command( - ctx, MIPI_DCS_SET_PARTIAL_ROWS)); - ST7789V_TEST(ret, st7789v_write_data(ctx, area_data[0])); - ST7789V_TEST(ret, st7789v_write_data(ctx, area_data[1])); - ST7789V_TEST(ret, st7789v_write_data(ctx, area_data[2])); - ST7789V_TEST(ret, st7789v_write_data(ctx, area_data[3])); + ST7789V_TEST(ret, mipi_dbi_command(dbi, MIPI_DCS_ENTER_PARTIAL_MODE)); + + ST7789V_TEST(ret, mipi_dbi_command(dbi, MIPI_DCS_SET_PAGE_ADDRESS, + area_data[0], area_data[1], + area_data[2], area_data[3])); + + ST7789V_TEST(ret, mipi_dbi_command(dbi, MIPI_DCS_SET_PARTIAL_ROWS, + area_data[0], area_data[1], + area_data[2], area_data[3])); } =20 - ST7789V_TEST(ret, st7789v_write_command(ctx, ST7789V_RAMCTRL_CMD)); - ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_RAMCTRL_DM_RGB | - ST7789V_RAMCTRL_RM_RGB)); - ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_RAMCTRL_EPF(3) | - ST7789V_RAMCTRL_MAGIC)); + ST7789V_TEST(ret, mipi_dbi_command(dbi, ST7789V_RAMCTRL_CMD, + ST7789V_RAMCTRL_DM_RGB | + ST7789V_RAMCTRL_RM_RGB, + ST7789V_RAMCTRL_EPF(3) | + ST7789V_RAMCTRL_MAGIC)); =20 - ST7789V_TEST(ret, st7789v_write_command(ctx, ST7789V_RGBCTRL_CMD)); - ST7789V_TEST(ret, st7789v_write_data(ctx, mode | - ST7789V_RGBCTRL_RCM(2) | - polarity)); - ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_RGBCTRL_VBP(8))); - ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_RGBCTRL_HBP(20))); + ST7789V_TEST(ret, mipi_dbi_command(dbi, ST7789V_RGBCTRL_CMD, + mode | ST7789V_RGBCTRL_RCM(2) | polarity, + ST7789V_RGBCTRL_VBP(8), + ST7789V_RGBCTRL_HBP(20))); =20 return 0; } @@ -577,7 +484,7 @@ static int st7789v_enable(struct drm_panel *panel) { struct st7789v *ctx =3D panel_to_st7789v(panel); =20 - return st7789v_write_command(ctx, MIPI_DCS_SET_DISPLAY_ON); + return mipi_dbi_command(&ctx->dbi, MIPI_DCS_SET_DISPLAY_ON); } =20 static int st7789v_disable(struct drm_panel *panel) @@ -585,7 +492,7 @@ static int st7789v_disable(struct drm_panel *panel) struct st7789v *ctx =3D panel_to_st7789v(panel); int ret; =20 - ST7789V_TEST(ret, st7789v_write_command(ctx, MIPI_DCS_SET_DISPLAY_OFF)); + ST7789V_TEST(ret, mipi_dbi_command(&ctx->dbi, MIPI_DCS_SET_DISPLAY_OFF)); =20 return 0; } @@ -595,7 +502,7 @@ static int st7789v_unprepare(struct drm_panel *panel) struct st7789v *ctx =3D panel_to_st7789v(panel); int ret; =20 - ST7789V_TEST(ret, st7789v_write_command(ctx, MIPI_DCS_ENTER_SLEEP_MODE)); + ST7789V_TEST(ret, mipi_dbi_command(&ctx->dbi, MIPI_DCS_ENTER_SLEEP_MODE)); =20 regulator_disable(ctx->power); =20 @@ -615,6 +522,7 @@ static int st7789v_probe(struct spi_device *spi) { struct device *dev =3D &spi->dev; struct st7789v *ctx; + struct gpio_desc *dc; int ret; =20 ctx =3D devm_drm_panel_alloc(dev, struct st7789v, panel, @@ -625,11 +533,6 @@ static int st7789v_probe(struct spi_device *spi) spi_set_drvdata(spi, ctx); ctx->spi =3D spi; =20 - spi->bits_per_word =3D 9; - ret =3D spi_setup(spi); - if (ret < 0) - return dev_err_probe(&spi->dev, ret, "Failed to setup spi\n"); - ctx->info =3D device_get_match_data(&spi->dev); =20 ctx->power =3D devm_regulator_get(dev, "power"); @@ -637,11 +540,16 @@ static int st7789v_probe(struct spi_device *spi) if (ret) return dev_err_probe(dev, ret, "Failed to get regulator\n"); =20 - ctx->reset =3D devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW); - ret =3D PTR_ERR_OR_ZERO(ctx->reset); + ctx->dbi.reset =3D devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW); + ret =3D PTR_ERR_OR_ZERO(ctx->dbi.reset); if (ret) return dev_err_probe(dev, ret, "Failed to get reset line\n"); =20 + dc =3D devm_gpiod_get_optional(&spi->dev, "dc", GPIOD_OUT_LOW); + ret =3D PTR_ERR_OR_ZERO(dc); + if (ret) + return dev_err_probe(&spi->dev, ret, "Failed to get GPIO for D/C\n"); + ret =3D drm_panel_of_backlight(&ctx->panel); if (ret) return dev_err_probe(dev, ret, "Failed to get backlight\n"); @@ -650,6 +558,10 @@ static int st7789v_probe(struct spi_device *spi) if (ret) return dev_err_probe(&spi->dev, ret, "Failed to get orientation\n"); =20 + ret =3D mipi_dbi_spi_init(spi, &ctx->dbi, dc); + if (ret) + return dev_err_probe(&spi->dev, ret, "Failed to init MIPI DBI\n"); + drm_panel_add(&ctx->panel); =20 return 0; --=20 2.39.5 From nobody Fri Apr 17 09:30:28 2026 Received: from mail-pl1-f177.google.com (mail-pl1-f177.google.com [209.85.214.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7A9A2342CB4 for ; Sat, 21 Feb 2026 07:14:28 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.214.177 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771658069; cv=none; b=ZPbC4q1yH6oGGjzopzv4fEZy2BFFcjBTGtkG8eOc53r4z+75XMQgCRJrQ93D/Ve8DUPNyi01eA7Z4mPYjntVK+j/INDBLe9QGkMZiSBl0PT0W2EGzJLbiMnXH0zhwgwe3uBfOovY15v8b8AXsYPOzvmxOuDBvgBIRGb0fiNgZmc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771658069; c=relaxed/simple; bh=ZSIZZK/4+7y1dpsl5ByPC3UnJ9gnq0JuUO7abgZuVQ4=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=Gg3OMjpmNruvUQPr75kMohKsHQZm9VOA2AomEbLv0raslp0HG7UbKaGLm3qjCE87uds2decGEaR/lqlO91w4GbvGS9kGtK442Jgqi2gzI0/1ELH0cHAxB8enl5frVS42b7khKTu7mySVtEtYnEQye2EzRttuDl2XUutRvZF9KrM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=KqstgAJE; arc=none smtp.client-ip=209.85.214.177 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="KqstgAJE" Received: by mail-pl1-f177.google.com with SMTP id d9443c01a7336-2a7a9b8ed69so25110505ad.2 for ; Fri, 20 Feb 2026 23:14:28 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1771658068; x=1772262868; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=QKE3IFB+wicfYDcwffAaecPkvUgml/b3Mzv5tG2Eo94=; b=KqstgAJE1Cc0fqrWOYC3ReCKIsTyFtiBGpECGxKlJVCRVeUxzuh+qtOLzJVmVEHyPg iwx37uvxeJuDqGvo3h9MLKmphgB0C0cDiQsp7bdmd2MAigknVu5GB4L0O+oQoxIO9Jym I+vcCy3w/biRHPhuKaGLN0hCg6tOfFweFQqf1s0k3smKNxKCUY4TjI77cvZHqRgtHLlC m1G5Gvslvc1dxPBLDklmDlNv0jkHm3eMJgSLKsV7Ulpwg/dyhaOlCZDw23Oxvmxiclcb m6FtewABE9lvi23vEBZwJk1cJjkiYLN7+vKvdjNgeKcUrxn6WodtHQGZZF9woYWB5wz+ r1iQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1771658068; x=1772262868; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=QKE3IFB+wicfYDcwffAaecPkvUgml/b3Mzv5tG2Eo94=; b=cW7M263/BcqtnLVk5ETCjEE2iy0x8b/RZQFHPzfEPBMZ2Q+lq4upNalWCLEyZkxhmE sGuw005NMc4+pekqRPBKb+gRnUktiC1ME691Wcmff7Juu7GhjAVftkUOzwmWpjDFwAGI WL3EK2v0INAYONmNGYBSCze6AbEOPMXSokiKOBLWHmK4RVQkKyr9tzChyg8ZaQ/scG+F r79uQ3iKIajU0biOEbJZJPNajNLNafgt2iO2+iT0w75XGwfLujpo+gC66NkzgZ9+31gu x8O4eUZ0I2SmVLASgmA8YT9DHG27RstqXjFUDYC7ulFwo6B4/70dE2F5h8t5ZoOh3lAk Q3TQ== X-Forwarded-Encrypted: i=1; AJvYcCXMjNGLNykTMLVM+KmwlFnEnENBJI/3tz69bwC0zEnPESQAbRNBsoyaTr4Gv0e/9zmXiwIO9YiUCO/RSSc=@vger.kernel.org X-Gm-Message-State: AOJu0YyAgD8XYuvg9OoHUX/qHcSuYV6UfNCKc0rbOA+fflR+fUmpi8LC gQNwWoykEUkE09XTHs+I5QOJgr3pPVTzNRyNVVcr53NO+nuQIdvuwSdd X-Gm-Gg: AZuq6aINZqKfVsibt0W6VMeH+XvUCr016XoBYW0/v+YW1gBbRaLBXF957pfisRwKvtK zgJXNN52uGGexfzgB78WfN9xwumcTGoVIGRA5ASaKfNa1IoPkTwQ+DBEiRc9dlQMVqH+xAU3nXY Ze6WBmexyzDh2Rp/Vxl3wh6gsJyBwBY9gRKRnPMtGHXe27wGlq6Mubtejax5Pt2evFg3ItlTFOA u/qGBy7kd/Mc04k9kFbEITy+eiYQaeNQVUvz4agNCfUXAN8vA5MR7Wtm0gbDnKLFog2l/8Gnp4l t7HLc6eIACeByzvbJtPg8CdL7DiuO4JGfSqtzlY6e/a2yIQMVWuez3GXqfvvs4RYKq8XN9tnBLH 1mzQaphpp9ZdcIQbdjIkYlGs/8FZNPGWiraobnVLly684JjLvoQI2C5h8x1k4N2jwwIREC01wVX gE4uBFUq7KbkcA+Df8rXODz7cb911bTr+jSG+ojgGHog== X-Received: by 2002:a17:903:246:b0:2aa:d39c:d68 with SMTP id d9443c01a7336-2ad744ec56fmr21821575ad.29.1771658067641; Fri, 20 Feb 2026 23:14:27 -0800 (PST) Received: from debian.ari ([152.58.178.174]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2ad7500e2a7sm12657355ad.46.2026.02.20.23.14.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 20 Feb 2026 23:14:27 -0800 (PST) From: Archit Anant To: neil.armstrong@linaro.org, jesszhan0024@gmail.com, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de Cc: sebastian.reichel@collabora.com, gerald.loacker@wolfvision.net, michael.riesch@collabora.com, miquel.raynal@bootlin.com, wens@kernel.org, airlied@gmail.com, simona@ffwll.ch, architanant5@gmail.com, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org Subject: [RFC PATCH v3 3/3] drm/panel: sitronix-st7789v: add standalone tinydrm support Date: Sat, 21 Feb 2026 12:43:51 +0530 Message-Id: <20260221071351.22772-4-architanant5@gmail.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20260221071351.22772-1-architanant5@gmail.com> References: <20260221071351.22772-1-architanant5@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The current panel-sitronix-st7789v driver functions only as a DRM panel, requiring an external display controller to operate. However, the majority of ST7789V displays in the hobbyist ecosystem are used as standalone screens connected via 8-bit SPI. Building on the mipi_dbi conversion in the previous patches, this commit introduces drm_simple_display_pipe support. This allows the driver to register as a full-featured DRM device (tinydrm) when a master display controller is not present, effectively providing a modern replacement for the legacy staging fbtft driver. Additionally, this patch ports support for the HannStar HSD20-IPS panel from the staging driver. This is implemented via a new 'is_ips' flag in the panel info structure, which selects the optimized PORCTRL and GCTRL settings required by that specific glass panel. This hybrid architecture ensures the driver is suitable for both high-performance SoC RGB interfaces and simple SPI-based embedded systems. Signed-off-by: Archit Anant --- .../gpu/drm/panel/panel-sitronix-st7789v.c | 153 +++++++++++++++--- 1 file changed, 127 insertions(+), 26 deletions(-) diff --git a/drivers/gpu/drm/panel/panel-sitronix-st7789v.c b/drivers/gpu/d= rm/panel/panel-sitronix-st7789v.c index b77e616f2994..a07568edc701 100644 --- a/drivers/gpu/drm/panel/panel-sitronix-st7789v.c +++ b/drivers/gpu/drm/panel/panel-sitronix-st7789v.c @@ -12,9 +12,14 @@ #include