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Fri, 20 Feb 2026 11:44:07 -0800 (PST) From: Max Hsu Date: Sat, 21 Feb 2026 03:43:53 +0800 Subject: [PATCH 1/5] dmaengine: sf-pdma: add missing PDMA base offset to register calculations Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260221-pdma-v1-1-838d929c2326@sifive.com> References: <20260221-pdma-v1-0-838d929c2326@sifive.com> In-Reply-To: <20260221-pdma-v1-0-838d929c2326@sifive.com> To: Paul Walmsley , Samuel Holland , Vinod Koul , Frank Li , Green Wan , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Palmer Debbelt , Conor Dooley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti Cc: linux-riscv@lists.infradead.org, dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org, Paul Walmsley , devicetree@vger.kernel.org, Max Hsu X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=1395; i=max.hsu@sifive.com; h=from:subject:message-id; bh=AnEa53opPbOu4dRIdrxYWqC5ToC/rveEHLt+0LxZ02U=; b=owEB7QES/pANAwAKAdID/Z0HeUC9AcsmYgBpmLl7iZxRqUMek04x+o3lBeEEqeiLt2VR8OAQc Nw/cTkeEZ+JAbMEAAEKAB0WIQTqXmcbOhS2KZE9X2jSA/2dB3lAvQUCaZi5ewAKCRDSA/2dB3lA vTvEDACAZT/DJRai2ns/tv7qnjMFStLTAaaFD0WsiEnykRMhHVFY6Ll9o/QQco3XuLtDkfk8yBW Daf1E7Za0anPZFcvzU631toudhRDqKH2nydxS+UUOB/Vg/gpJvoKdAqWFR+eriNyIIjMsmbOltI nqOk9KGfetnbm/fJUmLyoDhVl1Rx4jtXV/iuVXSWzwYIvQB6V/lwpGQKY56dcvNS8xZ2FDfUrmI W5sPggxYe/khEXJWJwW/mLijfNxY5qcQKU34zgROzAmv2xl3jkKMt4bdWb9BvlRy5gvGUNB0fyM Ay7XcscVkpnwITy9xM08B3UTkwmX4DMATt3qoiOaqWymJLQnoJ9fj7U2jDSEqPeidm2SQxhRCU5 M5Okuss097crl0k3OlyjyVMuhDW2MJI5OYdotZfJIyHOU3j1uvh0vwY5tEhAMFbpJxgSqWUBQuv fkCEwPLbl+I3WeTPSpFLNwtpGPTiG45Gw1XWSs11pBChKJxiXkJIy/2c4p6XtbMIRUq2E= X-Developer-Key: i=max.hsu@sifive.com; a=openpgp; fpr=EA5E671B3A14B629913D5F68D203FD9D077940BD The PDMA control registers start at offset 0x80000 from the PDMA base address, according to the FU540-C000 v1p1 manual [1]. The current SF_PDMA_REG_BASE macro is missing this offset: Current: pdma->membase + (PDMA_CHAN_OFFSET * ch) Correct: pdma->membase + 0x80000 + (PDMA_CHAN_OFFSET * ch) Fix by adding PDMA_BASE_OFFSET (0x80000) to the register address calculation. Link: https://www.sifive.com/document-file/freedom-u540-c000-manual [1] Fixes: 6973886ad58e ("dmaengine: sf-pdma: add platform DMA support for HiFi= ve Unleashed A00") Signed-off-by: Max Hsu --- drivers/dma/sf-pdma/sf-pdma.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/dma/sf-pdma/sf-pdma.h b/drivers/dma/sf-pdma/sf-pdma.h index 215e07183d7e..d33551eb2ee8 100644 --- a/drivers/dma/sf-pdma/sf-pdma.h +++ b/drivers/dma/sf-pdma/sf-pdma.h @@ -24,7 +24,7 @@ =20 #define PDMA_MAX_NR_CH 4 =20 -#define PDMA_BASE_ADDR 0x3000000 +#define PDMA_BASE_OFFSET 0x80000 #define PDMA_CHAN_OFFSET 0x1000 =20 /* Register Offset */ @@ -54,7 +54,7 @@ /* Error Recovery */ #define MAX_RETRY 1 =20 -#define SF_PDMA_REG_BASE(ch) (pdma->membase + (PDMA_CHAN_OFFSET * (ch))) +#define SF_PDMA_REG_BASE(ch) (pdma->membase + PDMA_BASE_OFFSET + (PDMA_CHA= N_OFFSET * (ch))) =20 struct pdma_regs { /* read-write regs */ --=20 2.43.0