From nobody Fri Apr 3 11:10:11 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 17C2F320A22; Fri, 20 Feb 2026 09:27:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771579678; cv=none; b=CnxY4DQYfpaOGFO8+Xo7nUaQN75pfkMzyJjctLuqFhE/IlglMXHswrSV8/KPi26pmix0duXrggNGHRoi694FNGw10Fb8W3aiMoTT2ayDF9X+cTr4BvO7alenP7nw02KAHpc+800Qq2bW1Tis1Y+E3Gg6giVSNYYGA6qTT+0GA6w= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771579678; c=relaxed/simple; bh=FpYf/Yzczcf4tEFC1kjBsEmpa/YzVd1pXhcZ6yjPTiE=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=nBhMtRhlErlos5yR3sNFkty2lvwjZunGNCEfaODvCQTGSIn3Sqex7BJP6igw2+85ventJkF3dXVgrrqic8m7yqVVUVkBOaqZ5VrloAT9zwBbtfJIszEGQkzA6lywhaRprdUDSvGdqSWpHbSOFTMI/uTiyP3py+NLLlYac+oOk6k= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=B/pnUe2C; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="B/pnUe2C" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 70999C4AF0D; Fri, 20 Feb 2026 09:27:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1771579677; bh=FpYf/Yzczcf4tEFC1kjBsEmpa/YzVd1pXhcZ6yjPTiE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=B/pnUe2Csc8sf4nePbeD8HOLkbhporccdV2gXzpFBwFl8bIIkz59+hExV3Lf6wc7n 5jwRljJiVEzlgRuxSNCkmMB/S8QZ8E0o9cY2PN/tNv8tgW6MSxiRM02W732ECLr/hT dx3Pm5WYwBSz0u2GEl5tTcIwZGZNO1nQxdjTsl3akqYfZYrYIi4Ifvn0epsmPF9NXJ UNc13112JN8SQQx5pX6EYq+qDsEXtyURVXTESGlrSc8PJg5/JLTVqbl5W4yPab30xY ZTbv+qSqn1z9a3CyfUKfbDvFsizqh7JH/CRHquLzJXI1+AIBqnpA4/IwRPSCkTdLWG TRfVEQ1zmVeWA== From: Jisheng Zhang To: Catalin Marinas , Will Deacon , Arnd Bergmann , Thomas Gleixner , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Guo Ren Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arch@vger.kernel.org, linux-riscv@lists.infradead.org, linux-csky@vger.kernel.org Subject: [PATCH 1/3] vmlinux.lds.h: add _handle_arch_irq RUNTIME_CONST section Date: Fri, 20 Feb 2026 17:09:20 +0800 Message-ID: <20260220090922.1506-2-jszhang@kernel.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260220090922.1506-1-jszhang@kernel.org> References: <20260220090922.1506-1-jszhang@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" We will use the runtime constant to optimize the handle_arch_irq accessing. This is preparation patch. Signed-off-by: Jisheng Zhang --- include/asm-generic/vmlinux.lds.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/include/asm-generic/vmlinux.lds.h b/include/asm-generic/vmlinu= x.lds.h index eeb070f330bd..c4af2c7d0eed 100644 --- a/include/asm-generic/vmlinux.lds.h +++ b/include/asm-generic/vmlinux.lds.h @@ -973,7 +973,8 @@ RUNTIME_CONST(shift, d_hash_shift) \ RUNTIME_CONST(ptr, dentry_hashtable) \ RUNTIME_CONST(ptr, __dentry_cache) \ - RUNTIME_CONST(ptr, __names_cache) + RUNTIME_CONST(ptr, __names_cache) \ + RUNTIME_CONST(ptr, _handle_arch_irq) =20 /* Alignment must be consistent with (kunit_suite *) in include/kunit/test= .h */ #define KUNIT_TABLE() \ --=20 2.51.0 From nobody Fri Apr 3 11:10:11 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 84BC8320A22; Fri, 20 Feb 2026 09:28:01 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771579681; cv=none; b=PsTNAgMZKBGOOQrjzq+D+fUnbvg/5CR+1YHTIqxKkA9gwtneUi9pjhI48+Jpef/9B+jNb7rKLK/S6woa2lOhwK4cdjc8W2RvbVfWVNUF9p1rZ3MKGOANuYQ4GSrz1zVBUmXQcfZIRG42Nkv4UZ1K5//NEaKgZG8uIzi/xBhrsJw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771579681; c=relaxed/simple; bh=nmlph+5TWjJa0sHPU1ah7ms/7375H0UUdoBhmRt0/vM=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=A2Ndp6ZWL/1AitHbby7WC285FXVfRMZk8LHMCVXWidbC27reNsTN4al/whYW/yrxF65LI3xIKj1ZJHL5V8TzZb1awbqnMcNK8dGF2KJQ7j1CgQvYxM0/70KoTgmnKN0G1UCYNyMTcXUzRvyyAn7VoOGzVHKjPpJG4CUHwGkaDGk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=EQEDWYJM; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="EQEDWYJM" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 29E53C116D0; Fri, 20 Feb 2026 09:27:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1771579681; bh=nmlph+5TWjJa0sHPU1ah7ms/7375H0UUdoBhmRt0/vM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=EQEDWYJM8jermjpwnybPt56VLRR5jNeGmSaE8MsYD5T8dczHcIXHts+owh9fueUGX f6YMIT/Y4v1LoPI6Hmgy10ShyHpfEtFND57kJPWdK4NXBdODdqn2l2hLv1Akm0H6mY lKTeOZSKQSI1gkacgnbRuduE58kevHFi+W2SNmDZq/VyGAhCmx4cvuK0EuVbPUr/ry zIkuHWHmpbGvZDVaLGlbc+fo8+CbBxBLYg95xOTO4V0lraWNlaUXyJgSln7NAj36me iBR48SFhwvwXd7VqSKX7HzHKkiF0/WmUQRTrskur/tnb8awG0Bgn/fY3WlvMrchY20 eWwHB6qqRMDXA== From: Jisheng Zhang To: Catalin Marinas , Will Deacon , Arnd Bergmann , Thomas Gleixner , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Guo Ren Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arch@vger.kernel.org, linux-riscv@lists.infradead.org, linux-csky@vger.kernel.org Subject: [PATCH 2/3] genirq: use runtime constant to optimize handle_arch_irq access Date: Fri, 20 Feb 2026 17:09:21 +0800 Message-ID: <20260220090922.1506-3-jszhang@kernel.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260220090922.1506-1-jszhang@kernel.org> References: <20260220090922.1506-1-jszhang@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Currently, on GENERIC_IRQ_MULTI_HANDLER platforms, the handle_arch_irq is a pointer which is set during booting, and every irq processing needs to access it, so it sits in hot code path. We can use the runtime constant mechanism which was introduced by Linus to speed up its accessing. Tested on Sipeed Lichee Pi 4A (riscv64) board, the perf sched benchmark is improved by ~5.8% Signed-off-by: Jisheng Zhang Reviewed-by: Guo Ren (Alibaba Damo Academy) --- include/linux/irq.h | 4 +++- kernel/irq/handle.c | 8 +++++--- 2 files changed, 8 insertions(+), 4 deletions(-) diff --git a/include/linux/irq.h b/include/linux/irq.h index 951acbdb9f84..2ba4a8afb71e 100644 --- a/include/linux/irq.h +++ b/include/linux/irq.h @@ -1274,6 +1274,7 @@ void ipi_mux_process(void); int ipi_mux_create(unsigned int nr_ipi, void (*mux_send)(unsigned int cpu)= ); =20 #ifdef CONFIG_GENERIC_IRQ_MULTI_HANDLER +#include /* * Registers a generic IRQ handling function as the top-level IRQ handler = in * the system, which is generally the first C code called from an assembly @@ -1288,7 +1289,8 @@ int __init set_handle_irq(void (*handle_irq)(struct p= t_regs *)); * Allows interrupt handlers to find the irqchip that's been registered as= the * top-level IRQ handler. */ -extern void (*handle_arch_irq)(struct pt_regs *) __ro_after_init; +extern void (*_handle_arch_irq)(struct pt_regs *) __ro_after_init; +#define handle_arch_irq runtime_const_ptr(_handle_arch_irq) asmlinkage void generic_handle_arch_irq(struct pt_regs *regs); #else #ifndef set_handle_irq diff --git a/kernel/irq/handle.c b/kernel/irq/handle.c index b7d52821837b..aac9e7b1301e 100644 --- a/kernel/irq/handle.c +++ b/kernel/irq/handle.c @@ -15,13 +15,14 @@ #include =20 #include +#include =20 #include =20 #include "internals.h" =20 #ifdef CONFIG_GENERIC_IRQ_MULTI_HANDLER -void (*handle_arch_irq)(struct pt_regs *) __ro_after_init; +void (*_handle_arch_irq)(struct pt_regs *) __ro_after_init; #endif =20 /** @@ -270,10 +271,11 @@ irqreturn_t handle_irq_event(struct irq_desc *desc) #ifdef CONFIG_GENERIC_IRQ_MULTI_HANDLER int __init set_handle_irq(void (*handle_irq)(struct pt_regs *)) { - if (handle_arch_irq) + if (_handle_arch_irq) return -EBUSY; =20 - handle_arch_irq =3D handle_irq; + _handle_arch_irq =3D handle_irq; + runtime_const_init(ptr, _handle_arch_irq); return 0; } =20 --=20 2.51.0 From nobody Fri Apr 3 11:10:11 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6CC77320CCF; Fri, 20 Feb 2026 09:28:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771579685; cv=none; b=p355v7iV25JSs0MOWx+xiE0OmtT8xWRkt6lMdHlFMxV4sPsyAgX2Y+E2dPT8ZL+TTHFt+KtlPQF5i0D2JPWv4mhPNGGor0f1piRYBbYSvrqvGXDHCo+i79tWDZqzw5AHLaziO6UubD21a9k3q7KkAt3+kKoRA4Co+eEBlJBXfM0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771579685; c=relaxed/simple; bh=htfspmM2c2lNeKPl/xvf7/POAscvMhM4d53l5UdNqHY=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=EmfF3TbPm+KaM8NgjiyFKxCbhH8n/3otxkENOtKbE7cwQBWy4sUqL1N3UM9t9apZfU9RlaGmAiXdU4i5OObYiWuV1YF6k3sjZAROrNsUA/okxlKpp7U6XEWNiyFAyZBGrll2dAnFtMQIqcWbvUXc0QPcRfRWy9cIHW5M00uYpFA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=uYglDSix; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="uYglDSix" Received: by smtp.kernel.org (Postfix) with ESMTPSA id D62EEC2BC86; Fri, 20 Feb 2026 09:28:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1771579685; bh=htfspmM2c2lNeKPl/xvf7/POAscvMhM4d53l5UdNqHY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=uYglDSixsNUrAmuwCgveh4mBOgWjV3rCGsvEgcAo2JG6cWg5ST0cMdR+Y5OpzFpRr Xzk4bBmQjUML2gaVx8vx8YaRUHecU26WL5il+lNeN2Hh6b2GYZ+nu6RX1qM691GZx5 8U9i9oRaZIhogxn0kbVZAVm3ds+Rpd0EAlL5RaaGjszPlKzu+CHMfrgyT2WrtawJp1 806WlvtV4K8r2u3cEReoDaJnSonYmwOB5grfTr8tq16mIhno4jKefmRAhaASEYp8eh U0EuzBHBSFF//URpHX8b1V0N0wBs3FbN3Ie0kGXHF55yVCzS7TmgQtSADxYhpY/aPY noCuvd/dn+UXA== From: Jisheng Zhang To: Catalin Marinas , Will Deacon , Arnd Bergmann , Thomas Gleixner , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Guo Ren Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arch@vger.kernel.org, linux-riscv@lists.infradead.org, linux-csky@vger.kernel.org Subject: [PATCH 3/3] arm64: use runtime constant to optimize handle_arch_irq access Date: Fri, 20 Feb 2026 17:09:22 +0800 Message-ID: <20260220090922.1506-4-jszhang@kernel.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260220090922.1506-1-jszhang@kernel.org> References: <20260220090922.1506-1-jszhang@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Currently, on arm64 platforms, the handle_arch_irq is a pointer which is set during booting, and every irq processing needs to access it, so it sits in hot code path. We can use the runtime constant mechanism which was introduced by Linus to speed up its accessing. Tested on Quad CA55 platform, the perf sched benchmark is improved by ~6.5% Signed-off-by: Jisheng Zhang --- arch/arm64/kernel/entry-common.c | 4 +++- arch/arm64/kernel/irq.c | 9 ++++++--- 2 files changed, 9 insertions(+), 4 deletions(-) diff --git a/arch/arm64/kernel/entry-common.c b/arch/arm64/kernel/entry-com= mon.c index 3625797e9ee8..46a4c012e15f 100644 --- a/arch/arm64/kernel/entry-common.c +++ b/arch/arm64/kernel/entry-common.c @@ -25,6 +25,7 @@ #include #include #include +#include #include #include #include @@ -139,7 +140,8 @@ static void do_interrupt_handler(struct pt_regs *regs, set_irq_regs(old_regs); } =20 -extern void (*handle_arch_irq)(struct pt_regs *); +extern void (*_handle_arch_irq)(struct pt_regs *); +#define handle_arch_irq runtime_const_ptr(_handle_arch_irq) extern void (*handle_arch_fiq)(struct pt_regs *); =20 static void noinstr __panic_unhandled(struct pt_regs *regs, const char *ve= ctor, diff --git a/arch/arm64/kernel/irq.c b/arch/arm64/kernel/irq.c index 15dedb385b9e..30629c183606 100644 --- a/arch/arm64/kernel/irq.c +++ b/arch/arm64/kernel/irq.c @@ -23,6 +23,7 @@ #include #include #include +#include #include #include #include @@ -84,15 +85,17 @@ static void default_handle_fiq(struct pt_regs *regs) panic("FIQ taken without a root FIQ handler\n"); } =20 -void (*handle_arch_irq)(struct pt_regs *) __ro_after_init =3D default_hand= le_irq; +void (*_handle_arch_irq)(struct pt_regs *) __ro_after_init =3D default_han= dle_irq; +#define handle_arch_irq runtime_const_ptr(_handle_arch_irq) void (*handle_arch_fiq)(struct pt_regs *) __ro_after_init =3D default_hand= le_fiq; =20 int __init set_handle_irq(void (*handle_irq)(struct pt_regs *)) { - if (handle_arch_irq !=3D default_handle_irq) + if (_handle_arch_irq !=3D default_handle_irq) return -EBUSY; =20 - handle_arch_irq =3D handle_irq; + _handle_arch_irq =3D handle_irq; + runtime_const_init(ptr, _handle_arch_irq); pr_info("Root IRQ handler: %ps\n", handle_irq); return 0; } --=20 2.51.0