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charset="utf-8" The 'irq_disabled' variable indicates the current state of the RX IRQ and is used by the RX NAPI handler to determine whether the IRQ should be enabled. Currently, 'irq_disabled' is set before actually disabling the IRQ by invoking disable_irq_nosync(). In an SMP environment, this leads to a race condition wherein the processor taking the interrupt sets 'irq_disabled' while another processor executing a previous instance of the RX NAPI handler sees 'irq_disabled' set and invokes enable_irq() before the RX IRQ is actually disabled by disable_irq_nosync(). This results in the following warning: Unbalanced enable for IRQ ... Fix this by disabling the RX IRQ using disable_irq_nosync() before setting 'irq_disabled'. Fixes: da70d184a8c3 ("net: ethernet: ti: am65-cpsw: Introduce multi queue R= x") Fixes: 47bfc4d128de ("net: ti: am65-cpsw-nuss: fix RX IRQ state after .ndo_= stop()") Cc: Signed-off-by: Siddharth Vadapalli Reviewed-by: Meghana Malladi Reviewed-by: Simon Horman --- drivers/net/ethernet/ti/am65-cpsw-nuss.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/ethernet/ti/am65-cpsw-nuss.c b/drivers/net/etherne= t/ti/am65-cpsw-nuss.c index 5924db6be3fe..8785ab40f157 100644 --- a/drivers/net/ethernet/ti/am65-cpsw-nuss.c +++ b/drivers/net/ethernet/ti/am65-cpsw-nuss.c @@ -1570,8 +1570,8 @@ static irqreturn_t am65_cpsw_nuss_rx_irq(int irq, voi= d *dev_id) { struct am65_cpsw_rx_flow *flow =3D dev_id; =20 - flow->irq_disabled =3D true; disable_irq_nosync(irq); + flow->irq_disabled =3D true; napi_schedule(&flow->napi_rx); =20 return IRQ_HANDLED; --=20 2.51.1 From nobody Fri Apr 17 10:36:01 2026 Received: from DM1PR04CU001.outbound.protection.outlook.com (mail-centralusazon11010053.outbound.protection.outlook.com [52.101.61.53]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 88F5B2F60B2; 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charset="utf-8" The 'irq_disabled' variable indicates the current state of the TX IRQ and is used by the TX NAPI handler to determine whether the IRQ should be enabled. Currently, 'irq_disabled' is set before actually disabling the IRQ by invoking disable_irq_nosync(). In an SMP environment, this leads to a race condition wherein the processor taking the interrupt sets 'irq_disabled' while another processor executing a previous instance of the TX NAPI handler sees 'irq_disabled' set and invokes enable_irq() before the TX IRQ is actually disabled by disable_irq_nosync(). This results in the following warning: Unbalanced enable for IRQ ... Fix this by disabling the TX IRQ using disable_irq_nosync() before setting 'irq_disabled'. Fixes: 8756ef2eb078 ("net: ti: icssg-prueth: Add AF_XDP zero copy for TX") Cc: Signed-off-by: Siddharth Vadapalli Reviewed-by: Meghana Malladi Reviewed-by: Simon Horman --- drivers/net/ethernet/ti/icssg/icssg_common.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/ethernet/ti/icssg/icssg_common.c b/drivers/net/eth= ernet/ti/icssg/icssg_common.c index 0cf9dfe0fa36..24716c8d7f75 100644 --- a/drivers/net/ethernet/ti/icssg/icssg_common.c +++ b/drivers/net/ethernet/ti/icssg/icssg_common.c @@ -348,8 +348,8 @@ static irqreturn_t prueth_tx_irq(int irq, void *dev_id) { struct prueth_tx_chn *tx_chn =3D dev_id; =20 - tx_chn->irq_disabled =3D true; disable_irq_nosync(irq); + tx_chn->irq_disabled =3D true; napi_schedule(&tx_chn->napi_tx); =20 return IRQ_HANDLED; --=20 2.51.1 From nobody Fri Apr 17 10:36:01 2026 Received: from CH5PR02CU005.outbound.protection.outlook.com (mail-northcentralusazon11012068.outbound.protection.outlook.com [40.107.200.68]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 402932F2910; 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charset="utf-8" The 'irq_disabled' variable indicates the current state of the RX IRQ and is used by the RX NAPI handler to determine whether the IRQ should be enabled. Currently, 'irq_disabled' is set before actually disabling the IRQ by invoking disable_irq_nosync(). In an SMP environment, this leads to a race condition wherein the processor taking the interrupt sets 'irq_disabled' while another processor executing a previous instance of the RX NAPI handler sees 'irq_disabled' set and invokes enable_irq() before the RX IRQ is actually disabled by disable_irq_nosync(). This results in the following warning: Unbalanced enable for IRQ ... Fix this by disabling the RX IRQ using disable_irq_nosync() before setting 'irq_disabled'. Fixes: 7a64bb388df3 ("net: ti: icssg-prueth: Add AF_XDP zero copy for RX") Cc: Signed-off-by: Siddharth Vadapalli Reviewed-by: Meghana Malladi Reviewed-by: Simon Horman --- drivers/net/ethernet/ti/icssg/icssg_common.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/ethernet/ti/icssg/icssg_common.c b/drivers/net/eth= ernet/ti/icssg/icssg_common.c index 24716c8d7f75..a512a1317c59 100644 --- a/drivers/net/ethernet/ti/icssg/icssg_common.c +++ b/drivers/net/ethernet/ti/icssg/icssg_common.c @@ -1385,8 +1385,8 @@ irqreturn_t prueth_rx_irq(int irq, void *dev_id) { struct prueth_emac *emac =3D dev_id; =20 - emac->rx_chns.irq_disabled =3D true; disable_irq_nosync(irq); + emac->rx_chns.irq_disabled =3D true; napi_schedule(&emac->napi_rx); =20 return IRQ_HANDLED; --=20 2.51.1