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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Paul Walmsley , Samuel Holland , Nicolas Ferre , Claudiu Beznea , Thomas Gleixner , Palmer Dabbelt , Conor Dooley , Albert Ou , Alexandre Ghiti Cc: netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, Paul Walmsley , Max Hsu X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=1052; i=max.hsu@sifive.com; h=from:subject:message-id; bh=4GANKwuw4Gmvjt4yzo6mJduIJtLD4oH0IHu2XPGqRsA=; b=owEB7QES/pANAwAKAdID/Z0HeUC9AcsmYgBpmBr8A5x0AN6WLq/BdWL/ZvvVR001n1rPKS373 hQAgd5vgOmJAbMEAAEKAB0WIQTqXmcbOhS2KZE9X2jSA/2dB3lAvQUCaZga/AAKCRDSA/2dB3lA vUkOC/0emc5DX/XLv6NvlYCRNIsC14BaTvJqWzTvJMubMPLS86hHgd3FKQ7Uyb58051WiOLwAsz cZ5AXNu8PWhFfZ+5aMcENxul9NU7y/aIYoD/m7oTozg+qnQ/Auiuw+sA68uBPKrR+nloV55s2/4 y4L0wfIX9asSx+Wx1H9rVEWCSt0F7vyAJw2ZPxe63ySqy5Xo94rukEpaYDcUb2eCyNT7bpjyiv4 BWMESgWKFLD4SERy6CSScQ8HgNkc9cuYdPLH/28EmfXvLqeiZtlAfcCmFbdRQdUQcXCnTiw8IyU bHvBM5KnFqNqVI4WlO2dSppzOYM+1fUoyYNHls4yC0x3v7XZpkZUvvniJ+wfD2ySZ9SmdhwOSx9 nlEe39EPyWVPTjorh6pmsmrTHzcdAhma1I3FuhiD4+WjzpcJYmH5mhmY4jIifqvSgffVzDRpohV 99j6p2JFWXqHmVfIA9TtlV+Uai6/eMHYdklOUmBQQKzTSc1q0dMYAPOUoVbPxQ7Nurf7A= X-Developer-Key: i=max.hsu@sifive.com; a=openpgp; fpr=EA5E671B3A14B629913D5F68D203FD9D077940BD Update the PLIC compatible string from "sifive,fu540-c000-plic" to "sifive,fu740-c000-plic" to comply with the SiFive IP versioning scheme documented in sifive-blocks-ip-versioning.txt. The versioning scheme requires SoC-specific compatible strings for proper hardware identification. Signed-off-by: Max Hsu --- arch/riscv/boot/dts/sifive/fu740-c000.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/riscv/boot/dts/sifive/fu740-c000.dtsi b/arch/riscv/boot/d= ts/sifive/fu740-c000.dtsi index 15e11a03582a..a44ccbf4822b 100644 --- a/arch/riscv/boot/dts/sifive/fu740-c000.dtsi +++ b/arch/riscv/boot/dts/sifive/fu740-c000.dtsi @@ -182,7 +182,7 @@ soc { plic0: interrupt-controller@c000000 { #interrupt-cells =3D <1>; #address-cells =3D <0>; - compatible =3D "sifive,fu540-c000-plic", "sifive,plic-1.0.0"; + compatible =3D "sifive,fu740-c000-plic", "sifive,plic-1.0.0"; reg =3D <0x0 0xc000000 0x0 0x4000000>; riscv,ndev =3D <69>; interrupt-controller; --=20 2.43.0