From nobody Fri Apr 3 11:00:30 2026 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3249E274FDF for ; Thu, 19 Feb 2026 09:39:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771493974; cv=none; b=FNJRd92zSMvSuoqaQVBGcYl68ASq/mCd5T89Rl9eOoC3hXh61gBMF0YWu3Ql6UmZ2SvjiN6JVgNykw2vdgb2GERw40SgPkXFcNSi99dhnb56X5ykzm98ohCUDpWkck3jA6KW2YliZvDCIQSUKYFl7EnKssSpX20y6P7jK7+nWI8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771493974; c=relaxed/simple; bh=kDMzpbJp7/rLqYwKGMaZIVc8pzd6JwXhACdjFivVaJ8=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=RmnR+/AFHDqKP5ZUzbiU2JdET2t9os3FlIJ7GXwfxKqLxsiK1xZaIUPs8DmUBcDI9wWgW8Biw082nMUzWPO4ixIS5oQFBlFYAW2nX7d//w/i7T4m3PrB2+Oe4azcKhngtuExrC5TvflvfVVsakfyhoObaAxB3ldlYlWfFlmY+6g= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=mL0glHvV; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=E5+TjTuE; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="mL0glHvV"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="E5+TjTuE" Received: from pps.filterd (m0279866.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 61INlYUW1924573 for ; Thu, 19 Feb 2026 09:39:32 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= eJ7q7P1YKR2cir05Q7NmQQK/JszGCthoOd76hIYXMrc=; b=mL0glHvV0k0mRFIw r0v9z3tV6hXob4Q0TdXzmSjOxpg0/4T4q9YgbSd+Zl2EAtmzuUHL712h2KKEQVfA YZxuf+j2hogkvtJ8lnEdgLeCFSXy4C4tH4jfjz71Zt9hmtJ0+9nCjd+XB/5r2kTv cmNYu2NtdycRMpQLXtxHqA7bLLHXB08dplb6sqUwC5ukhaat15JYdMEI2tFSGzxw bZH1H0g9XH3advhmjvOzABlNjhbfdnW03pzN8tE8+GLMVe+i9x4qpU57JuNqbAi5 d53SjF5RBmgcvh59+odb6gCRTjERXrH2rUiH9Ber/IJCjrUKAg3/zoPvqKeX3xSX oz55ZQ== Received: from mail-pg1-f198.google.com (mail-pg1-f198.google.com [209.85.215.198]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4cdqdg94q9-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Thu, 19 Feb 2026 09:39:32 +0000 (GMT) Received: by mail-pg1-f198.google.com with SMTP id 41be03b00d2f7-c6e1e748213so488195a12.2 for ; Thu, 19 Feb 2026 01:39:32 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1771493972; x=1772098772; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=eJ7q7P1YKR2cir05Q7NmQQK/JszGCthoOd76hIYXMrc=; b=E5+TjTuESiuqvHMULuI05yCNM5N53u60NLdB3W82KIctcRd4IFWFUalg+jS+IJGpqq t4K0bTWstqkdFZRt9qlHyb3687SQ7ENbWEhPbPLXTJyQYwgbNsvQKikMGI5Uq+EhfuCv hSOSBvdVb4rbU5wHKCxcJqL/63TOBjxubqyPNBtaQOH/k4MG79QwfSwu0c9cn3kjJyUJ qTXY8TzUaBPjlbCCndzlk4vkA2U8UpousiWjaj3BiJFZJdVMnS2DdLO2JKnTcjZjT9F2 WzMh0AtJLOE8cF9dyrS/cJShk/Q1lp7UvrZXMCUoY6RtZoKRXQyhMUOU4d+xY3SfkThB RkLQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1771493972; x=1772098772; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=eJ7q7P1YKR2cir05Q7NmQQK/JszGCthoOd76hIYXMrc=; b=Dcl6Z2X2bc0WkIGutQwvj2+1O3fbl0lu+NEUsrUCN/ZdFNAHyt60jjAEJq74T8ZhuJ T/C5vDnIxnyofvvglDkSv7eVlgxPjupykD8d1nlVHcVydH5x1ufCSsn3ZwICtAiZpX3M lsw80y1h+TAJdhzy0o38J4QpLzytmU0MhM4crLMwCM1hw5WCTvyX44PDJcjB5xAjLGDw IF/JCqKAuDKDsWfW83NWkVF8V5h8uLWsq4lsILCxN5WiIZalJMpDv3+pbAGuP9yiaAu8 GehDvaWUEKnQRGYWeY3blbpZk5JwWC061ysytR+KCX6XHB1n5s39tlCVEcwcSBrzyJ/C EGmw== X-Forwarded-Encrypted: i=1; AJvYcCVPwmcYpT9b51XyifmGPczd8ja6YCDsF9J4OOSg0/IOYHPu/6drPisXaFUnFEoX/d3z9Xe6Yl8rClpgBak=@vger.kernel.org X-Gm-Message-State: AOJu0YyIMshv+tpSKHYJ9Iyfc/3YIA8yXJjN40KSkdfLlBCTIzopGE/v xkdHGsz/tifw5cjrSbth+yKGTpZDA7Z1ej3SKZBOw7WAfBYVlTRYkQiTXN+SdhF8iJj7829K+38 JOZUnc2Cvql1qgVMNlvHwCIE3v/sOXCWiMDJzOooLTWuSieP6Augmg4YRDaT0o+AQf4I= X-Gm-Gg: AZuq6aK3MdsJI9OlHZnAkkNRJgUgusolyAI/B6IC9DqExDgkGkC/f8ZtlRZ/5idfMM8 dhgKRXlmG+T41JzXGt87hWMoWeFtrkouJtenRMdolnKKx2R2NoTdjx1t4j5UCGKaQsjvNryMRkA 6/8kmc7BosIJ9/FV8EuXt6ndfYh71TatOxYFKjb4+ck1gYcp1uko5xN0EeUZoTN92yhSJAm2Iac /LZUHsHJg+YyON5WDfpFKdRvIlWisTMc0PElMCmaRgI9iG3dPdgLyev7Y9xzRI6LvZ8chbfxRZE T9K5mkFCCG+itf6d48B2gNU79BNs4HMkYb3y1qGeLZm76jMjqGO7kL3TBEDLG3rSh7iH2wKSPa9 wwLPO9HGiUVkYio76HvAfoRXQWPlHmKGTB0DsU/ATXt4nuc4OheXzTnL5tCs= X-Received: by 2002:a05:6a00:14cd:b0:81f:4294:6080 with SMTP id d2e1a72fcca58-825274bb7eamr5025432b3a.20.1771493971766; Thu, 19 Feb 2026 01:39:31 -0800 (PST) X-Received: by 2002:a05:6a00:14cd:b0:81f:4294:6080 with SMTP id d2e1a72fcca58-825274bb7eamr5025404b3a.20.1771493971216; Thu, 19 Feb 2026 01:39:31 -0800 (PST) Received: from hu-arakshit-hyd.qualcomm.com ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-824c6a2ac83sm17710250b3a.12.2026.02.19.01.39.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 19 Feb 2026 01:39:30 -0800 (PST) From: Abhinaba Rakshit Date: Thu, 19 Feb 2026 15:09:14 +0530 Subject: [PATCH v6 2/4] soc: qcom: ice: Add OPP-based clock scaling support for ICE Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260219-enable-ufs-ice-clock-scaling-v6-2-0c5245117d45@oss.qualcomm.com> References: <20260219-enable-ufs-ice-clock-scaling-v6-0-0c5245117d45@oss.qualcomm.com> In-Reply-To: <20260219-enable-ufs-ice-clock-scaling-v6-0-0c5245117d45@oss.qualcomm.com> To: Herbert Xu , "David S. Miller" , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio , Manivannan Sadhasivam , "James E.J. Bottomley" , "Martin K. Petersen" , Neeraj Soni Cc: linux-arm-msm@vger.kernel.org, linux-crypto@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-scsi@vger.kernel.org, Abhinaba Rakshit X-Mailer: b4 0.14.2 X-Proofpoint-ORIG-GUID: gVlR4MAd5CiWyU4uxHPmBNBNLLZpH_G- X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMjE5MDA4NyBTYWx0ZWRfX+O3fkSENdI7C eO/JempgwBBrrSCOKSRHCgp37HNFob3uEbOCd0rZo9X3wFkINSsSlS5V3jvDat9WBHkq1E03/dX q9kXNLQpT2/vbc7urJPt9k3MJPai1UreZGsA/+No9iiAMxcTtaejqJebPJb1G1ldflt72GAwEG7 eP6LI4P8F8xfPIUEpbgiVrQSkv/hS3unlpsJp31ES5DN8eOm6uCin0cAChYY3jyjbU/uQKwgMuq AEuOO2prfk834t0J42jozOqODpLEaZgmR0rcMKAOqQdY2S6oSud+t6xqjCyKFZBsDISCskpTUOD hRdaYt+iarYScYLplt+pMc6A/cmX4+fC/kNM0NMJKDV2qIRJhlbT8U7CZHEn/V5BrPuTOs7zd2V bXkGvQGJKuQzN0t+eA33WQINhVCvfQQZqLnQs2EL0m/jjSfkcu0pZnkQ0RNEQXk4vzKEP4k8ivM PS9jz43c1IFvJtNtJ2g== X-Proofpoint-GUID: gVlR4MAd5CiWyU4uxHPmBNBNLLZpH_G- X-Authority-Analysis: v=2.4 cv=W/M1lBWk c=1 sm=1 tr=0 ts=6996da54 cx=c_pps a=Qgeoaf8Lrialg5Z894R3/Q==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=HzLeVaNsDn8A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=Mpw57Om8IfrbqaoTuvik:22 a=GgsMoib0sEa3-_RKJdDe:22 a=EUspDBNiAAAA:8 a=mjMY47ajJ_YgJ0Xw87EA:9 a=QEXdDO2ut3YA:10 a=x9snwWr2DeNwDh03kgHS:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-02-19_03,2026-02-18_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 priorityscore=1501 adultscore=0 malwarescore=0 clxscore=1015 suspectscore=0 impostorscore=0 lowpriorityscore=0 phishscore=0 spamscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2601150000 definitions=main-2602190087 Register optional operation-points-v2 table for ICE device during device probe. Introduce clock scaling API qcom_ice_scale_clk which scale ICE core clock based on the target frequency provided and if a valid OPP-table is registered. Use flags (if provided) to decide on the rounding of the clock freq against OPP-table. Disable clock scaling if OPP-table is not registered. When an ICE-device specific OPP table is available, use the PM OPP framework to manage frequency scaling and maintain proper power-domain constraints. Also, ensure to drop the votes in suspend to prevent power/thermal retention. Subsequently restore the frequency in resume from core_clk_freq which stores the last ICE core clock operating frequency. Signed-off-by: Abhinaba Rakshit --- drivers/soc/qcom/ice.c | 88 ++++++++++++++++++++++++++++++++++++++++++++++= ++-- include/soc/qcom/ice.h | 5 +++ 2 files changed, 90 insertions(+), 3 deletions(-) diff --git a/drivers/soc/qcom/ice.c b/drivers/soc/qcom/ice.c index b203bc685cadd21d6f96eb1799963a13db4b2b72..1372dc4a4a4d0df982ea3a174df= 8779a37ce07c6 100644 --- a/drivers/soc/qcom/ice.c +++ b/drivers/soc/qcom/ice.c @@ -16,6 +16,7 @@ #include #include #include +#include =20 #include =20 @@ -111,6 +112,8 @@ struct qcom_ice { bool use_hwkm; bool hwkm_init_complete; u8 hwkm_version; + unsigned long core_clk_freq; + bool has_opp; }; =20 static bool qcom_ice_check_supported(struct qcom_ice *ice) @@ -310,12 +313,17 @@ int qcom_ice_resume(struct qcom_ice *ice) struct device *dev =3D ice->dev; int err; =20 + /* Restore the ICE core clk freq */ + if (ice->has_opp && ice->core_clk_freq) + dev_pm_opp_set_rate(ice->dev, ice->core_clk_freq); + err =3D clk_prepare_enable(ice->core_clk); if (err) { dev_err(dev, "failed to enable core clock (%d)\n", err); return err; } + qcom_ice_hwkm_init(ice); return qcom_ice_wait_bist_status(ice); } @@ -324,6 +332,11 @@ EXPORT_SYMBOL_GPL(qcom_ice_resume); int qcom_ice_suspend(struct qcom_ice *ice) { clk_disable_unprepare(ice->core_clk); + + /* Drop the clock votes while suspend */ + if (ice->has_opp) + dev_pm_opp_set_rate(ice->dev, 0); + ice->hwkm_init_complete =3D false; =20 return 0; @@ -549,10 +562,59 @@ int qcom_ice_import_key(struct qcom_ice *ice, } EXPORT_SYMBOL_GPL(qcom_ice_import_key); =20 +/** + * qcom_ice_scale_clk() - Scale ICE clock for DVFS-aware operations + * @ice: ICE driver data + * @target_freq: requested frequency in Hz + * @flags: Rounding policy (ICE_CLOCK_ROUND_*) + * + * Selects an OPP frequency based on @target_freq and the rounding mode in + * @flags, then programs it using dev_pm_opp_set_rate(), including any + * voltage or power-domain transitions handled by the OPP framework. + * Updates ice->core_clk_freq on success. + * + * Return: 0 on success; -EOPNOTSUPP if no OPP table; -EINVAL in-case of + * incorrect flags; or error from dev_pm_opp_set_rate()/OPP lookup. + */ +int qcom_ice_scale_clk(struct qcom_ice *ice, unsigned long target_freq, + unsigned int flags) +{ + unsigned long ice_freq =3D target_freq; + struct dev_pm_opp *opp; + int ret; + + if (!ice->has_opp) + return -EOPNOTSUPP; + + switch (flags) { + case ICE_CLOCK_ROUND_CEIL: + opp =3D dev_pm_opp_find_freq_ceil(ice->dev, &ice_freq); + break; + case ICE_CLOCK_ROUND_FLOOR: + opp =3D dev_pm_opp_find_freq_floor(ice->dev, &ice_freq); + break; + default: + return -EINVAL; + } + + if (IS_ERR(opp)) + return PTR_ERR(opp); + dev_pm_opp_put(opp); + + ret =3D dev_pm_opp_set_rate(ice->dev, ice_freq); + if (!ret) + ice->core_clk_freq =3D ice_freq; + + return ret; +} +EXPORT_SYMBOL_GPL(qcom_ice_scale_clk); + static struct qcom_ice *qcom_ice_create(struct device *dev, - void __iomem *base) + void __iomem *base, + bool is_legacy_binding) { struct qcom_ice *engine; + int err; =20 if (!qcom_scm_is_available()) return ERR_PTR(-EPROBE_DEFER); @@ -584,6 +646,26 @@ static struct qcom_ice *qcom_ice_create(struct device = *dev, if (IS_ERR(engine->core_clk)) return ERR_CAST(engine->core_clk); =20 + /* + * Register the OPP table only when ICE is described as a standalone + * device node. Older platforms place ICE inside the storage controller + * node, so they don't need an OPP table here, as they are handled in + * storage controller. + */ + if (!is_legacy_binding) { + /* OPP table is optional */ + err =3D devm_pm_opp_of_add_table(dev); + if (err && err !=3D -ENODEV) { + dev_err(dev, "Invalid OPP table in Device tree\n"); + return ERR_PTR(err); + } + engine->has_opp =3D (err =3D=3D 0); + + if (!engine->has_opp) + dev_info(dev, "ICE OPP table is not registered\n"); + } + + engine->core_clk_freq =3D clk_get_rate(engine->core_clk); if (!qcom_ice_check_supported(engine)) return ERR_PTR(-EOPNOTSUPP); =20 @@ -628,7 +710,7 @@ static struct qcom_ice *of_qcom_ice_get(struct device *= dev) return ERR_CAST(base); =20 /* create ICE instance using consumer dev */ - return qcom_ice_create(&pdev->dev, base); + return qcom_ice_create(&pdev->dev, base, true); } =20 /* @@ -725,7 +807,7 @@ static int qcom_ice_probe(struct platform_device *pdev) return PTR_ERR(base); } =20 - engine =3D qcom_ice_create(&pdev->dev, base); + engine =3D qcom_ice_create(&pdev->dev, base, false); if (IS_ERR(engine)) return PTR_ERR(engine); =20 diff --git a/include/soc/qcom/ice.h b/include/soc/qcom/ice.h index 4bee553f0a59d86ec6ce20f7c7b4bce28a706415..962454b85ccd994aeeb373729d4= b39a2e0b40069 100644 --- a/include/soc/qcom/ice.h +++ b/include/soc/qcom/ice.h @@ -9,6 +9,9 @@ #include #include =20 +#define ICE_CLOCK_ROUND_CEIL BIT(1) +#define ICE_CLOCK_ROUND_FLOOR BIT(2) + struct qcom_ice; =20 int qcom_ice_enable(struct qcom_ice *ice); @@ -30,5 +33,7 @@ int qcom_ice_import_key(struct qcom_ice *ice, const u8 *raw_key, size_t raw_key_size, u8 lt_key[BLK_CRYPTO_MAX_HW_WRAPPED_KEY_SIZE]); struct qcom_ice *devm_of_qcom_ice_get(struct device *dev); +int qcom_ice_scale_clk(struct qcom_ice *ice, unsigned long target_freq, + unsigned int flags); =20 #endif /* __QCOM_ICE_H__ */ --=20 2.34.1