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charset="utf-8" Update glue layer to support PKTDMA V2 for non DMAengine users. The updates include - Handling absence of TISCI - Direct IRQs - Autopair: Lack of PSIL pair. Signed-off-by: Sai Sree Kartheek Adivi --- drivers/dma/ti/Kconfig | 2 +- drivers/dma/ti/k3-udma-glue.c | 91 ++++++++++++++++++++++---------- drivers/dma/ti/k3-udma-private.c | 35 ++++++++++++ drivers/dma/ti/k3-udma.h | 2 + 4 files changed, 101 insertions(+), 29 deletions(-) diff --git a/drivers/dma/ti/Kconfig b/drivers/dma/ti/Kconfig index 40713bd1e8e9b..ada2ea8aca4b0 100644 --- a/drivers/dma/ti/Kconfig +++ b/drivers/dma/ti/Kconfig @@ -68,7 +68,7 @@ config TI_K3_UDMA_COMMON config TI_K3_UDMA_GLUE_LAYER tristate "Texas Instruments UDMA Glue layer for non DMAengine users" depends on ARCH_K3 || COMPILE_TEST - depends on TI_K3_UDMA + depends on TI_K3_UDMA || TI_K3_UDMA_V2 help Say y here to support the K3 NAVSS DMA glue interface If unsure, say N. diff --git a/drivers/dma/ti/k3-udma-glue.c b/drivers/dma/ti/k3-udma-glue.c index f87d244cc2d67..c6b012c698071 100644 --- a/drivers/dma/ti/k3-udma-glue.c +++ b/drivers/dma/ti/k3-udma-glue.c @@ -244,6 +244,9 @@ static int k3_udma_glue_cfg_tx_chn(struct k3_udma_glue_= tx_channel *tx_chn) const struct udma_tisci_rm *tisci_rm =3D tx_chn->common.tisci_rm; struct ti_sci_msg_rm_udmap_tx_ch_cfg req; =20 + if (!tisci_rm->tisci) + return 0; + memset(&req, 0, sizeof(req)); =20 req.valid_params =3D TI_SCI_MSG_VALUE_RM_UDMAP_CH_PAUSE_ON_ERR_VALID | @@ -502,21 +505,26 @@ int k3_udma_glue_enable_tx_chn(struct k3_udma_glue_tx= _channel *tx_chn) { int ret; =20 - ret =3D xudma_navss_psil_pair(tx_chn->common.udmax, - tx_chn->common.src_thread, - tx_chn->common.dst_thread); - if (ret) { - dev_err(tx_chn->common.dev, "PSI-L request err %d\n", ret); - return ret; - } + if (tx_chn->common.udmax->match_data->version =3D=3D K3_UDMA_V2) { + xudma_tchanrt_write(tx_chn->udma_tchanx, UDMA_CHAN_RT_CTL_REG, + UDMA_CHAN_RT_CTL_AUTOPAIR | UDMA_CHAN_RT_CTL_EN); + } else { + ret =3D xudma_navss_psil_pair(tx_chn->common.udmax, + tx_chn->common.src_thread, + tx_chn->common.dst_thread); + if (ret) { + dev_err(tx_chn->common.dev, "PSI-L request err %d\n", ret); + return ret; + } =20 - tx_chn->psil_paired =3D true; + tx_chn->psil_paired =3D true; =20 - xudma_tchanrt_write(tx_chn->udma_tchanx, UDMA_CHAN_RT_PEER_RT_EN_REG, - UDMA_PEER_RT_EN_ENABLE); + xudma_tchanrt_write(tx_chn->udma_tchanx, UDMA_CHAN_RT_PEER_RT_EN_REG, + UDMA_PEER_RT_EN_ENABLE); =20 - xudma_tchanrt_write(tx_chn->udma_tchanx, UDMA_CHAN_RT_CTL_REG, - UDMA_CHAN_RT_CTL_EN); + xudma_tchanrt_write(tx_chn->udma_tchanx, UDMA_CHAN_RT_CTL_REG, + UDMA_CHAN_RT_CTL_EN); + } =20 k3_udma_glue_dump_tx_rt_chn(tx_chn, "txchn en"); return 0; @@ -682,7 +690,6 @@ static int k3_udma_glue_cfg_rx_chn(struct k3_udma_glue_= rx_channel *rx_chn) TI_SCI_MSG_VALUE_RM_UDMAP_CH_CHAN_TYPE_VALID | TI_SCI_MSG_VALUE_RM_UDMAP_CH_ATYPE_VALID; =20 - req.nav_id =3D tisci_rm->tisci_dev_id; req.index =3D rx_chn->udma_rchan_id; req.rx_fetch_size =3D rx_chn->common.hdesc_size >> 2; /* @@ -702,11 +709,18 @@ static int k3_udma_glue_cfg_rx_chn(struct k3_udma_glu= e_rx_channel *rx_chn) req.rx_chan_type =3D TI_SCI_RM_UDMAP_CHAN_TYPE_PKT_PBRR; req.rx_atype =3D rx_chn->common.atype_asel; =20 + if (!tisci_rm->tisci) { + // TODO: look at the chan settings + xudma_rchanrt_write(rx_chn->udma_rchanx, UDMA_CHAN_RT_CFG_REG, + UDMA_CHAN_RT_CTL_TDOWN | UDMA_CHAN_RT_CTL_PAUSE); + return 0; + } + + req.nav_id =3D tisci_rm->tisci_dev_id; ret =3D tisci_rm->tisci_udmap_ops->rx_ch_cfg(tisci_rm->tisci, &req); if (ret) dev_err(rx_chn->common.dev, "rchan%d cfg failed %d\n", - rx_chn->udma_rchan_id, ret); - + rx_chn->udma_rchan_id, ret); return ret; } =20 @@ -755,8 +769,11 @@ static int k3_udma_glue_cfg_rx_flow(struct k3_udma_glu= e_rx_channel *rx_chn, } =20 if (xudma_is_pktdma(rx_chn->common.udmax)) { - rx_ringfdq_id =3D flow->udma_rflow_id + + if (tisci_rm->tisci) + rx_ringfdq_id =3D flow->udma_rflow_id + xudma_get_rflow_ring_offset(rx_chn->common.udmax); + else + rx_ringfdq_id =3D flow->udma_rflow_id; rx_ring_id =3D 0; } else { rx_ring_id =3D flow_cfg->ring_rxq_id; @@ -803,6 +820,13 @@ static int k3_udma_glue_cfg_rx_flow(struct k3_udma_glu= e_rx_channel *rx_chn, rx_ringfdq_id =3D k3_ringacc_get_ring_id(flow->ringrxfdq); } =20 + if (!tisci_rm->tisci) { + xudma_rflowrt_write(flow->udma_rflow, UDMA_RX_FLOWRT_RFA, + UDMA_CHAN_RT_CTL_TDOWN | UDMA_CHAN_RT_CTL_PAUSE); + rx_chn->flows_ready++; + return 0; + } + memset(&req, 0, sizeof(req)); =20 req.valid_params =3D @@ -1307,6 +1331,9 @@ int k3_udma_glue_rx_flow_enable(struct k3_udma_glue_r= x_channel *rx_chn, if (!rx_chn->remote) return -EINVAL; =20 + if (!tisci_rm->tisci) + return 0; + rx_ring_id =3D k3_ringacc_get_ring_id(flow->ringrx); rx_ringfdq_id =3D k3_ringacc_get_ring_id(flow->ringrxfdq); =20 @@ -1348,6 +1375,9 @@ int k3_udma_glue_rx_flow_disable(struct k3_udma_glue_= rx_channel *rx_chn, if (!rx_chn->remote) return -EINVAL; =20 + if (!tisci_rm->tisci) + return 0; + memset(&req, 0, sizeof(req)); req.valid_params =3D TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_DEST_QNUM_VALID | @@ -1383,21 +1413,26 @@ int k3_udma_glue_enable_rx_chn(struct k3_udma_glue_= rx_channel *rx_chn) if (rx_chn->flows_ready < rx_chn->flow_num) return -EINVAL; =20 - ret =3D xudma_navss_psil_pair(rx_chn->common.udmax, - rx_chn->common.src_thread, - rx_chn->common.dst_thread); - if (ret) { - dev_err(rx_chn->common.dev, "PSI-L request err %d\n", ret); - return ret; - } + if (rx_chn->common.udmax->match_data->version =3D=3D K3_UDMA_V2) { + xudma_rchanrt_write(rx_chn->udma_rchanx, UDMA_CHAN_RT_CTL_REG, + UDMA_CHAN_RT_CTL_AUTOPAIR | UDMA_CHAN_RT_CTL_EN); + } else { + ret =3D xudma_navss_psil_pair(rx_chn->common.udmax, + rx_chn->common.src_thread, + rx_chn->common.dst_thread); + if (ret) { + dev_err(rx_chn->common.dev, "PSI-L request err %d\n", ret); + return ret; + } =20 - rx_chn->psil_paired =3D true; + rx_chn->psil_paired =3D true; =20 - xudma_rchanrt_write(rx_chn->udma_rchanx, UDMA_CHAN_RT_CTL_REG, - UDMA_CHAN_RT_CTL_EN); + xudma_rchanrt_write(rx_chn->udma_rchanx, UDMA_CHAN_RT_CTL_REG, + UDMA_CHAN_RT_CTL_EN); =20 - xudma_rchanrt_write(rx_chn->udma_rchanx, UDMA_CHAN_RT_PEER_RT_EN_REG, - UDMA_PEER_RT_EN_ENABLE); + xudma_rchanrt_write(rx_chn->udma_rchanx, UDMA_CHAN_RT_PEER_RT_EN_REG, + UDMA_PEER_RT_EN_ENABLE); + } =20 k3_udma_glue_dump_rx_rt_chn(rx_chn, "rxrt en"); return 0; diff --git a/drivers/dma/ti/k3-udma-private.c b/drivers/dma/ti/k3-udma-priv= ate.c index 44c097fff5ee6..45a71f87c54ff 100644 --- a/drivers/dma/ti/k3-udma-private.c +++ b/drivers/dma/ti/k3-udma-private.c @@ -3,6 +3,10 @@ * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com * Author: Peter Ujfalusi */ +#include +#include +#include +#include #include #include =20 @@ -165,6 +169,7 @@ void xudma_##res##rt_write(struct udma_##res *p, int re= g, u32 val) \ EXPORT_SYMBOL(xudma_##res##rt_write) XUDMA_RT_IO_FUNCTIONS(tchan); XUDMA_RT_IO_FUNCTIONS(rchan); +XUDMA_RT_IO_FUNCTIONS(rflow); =20 int xudma_is_pktdma(struct udma_dev *ud) { @@ -174,6 +179,21 @@ EXPORT_SYMBOL(xudma_is_pktdma); =20 int xudma_pktdma_tflow_get_irq(struct udma_dev *ud, int udma_tflow_id) { + if (ud->match_data->version =3D=3D K3_UDMA_V2) { + __be32 addr[2] =3D {0, 0}; + struct of_phandle_args out_irq; + int ret; + + out_irq.np =3D dev_of_node(ud->dev); + out_irq.args_count =3D 1; + out_irq.args[0] =3D udma_tflow_id; + ret =3D of_irq_parse_raw(addr, &out_irq); + if (ret) + return ret; + + return irq_create_of_mapping(&out_irq); + } + const struct udma_oes_offsets *oes =3D &ud->soc_data->oes; =20 return msi_get_virq(ud->dev, udma_tflow_id + oes->pktdma_tchan_flow); @@ -182,6 +202,21 @@ EXPORT_SYMBOL(xudma_pktdma_tflow_get_irq); =20 int xudma_pktdma_rflow_get_irq(struct udma_dev *ud, int udma_rflow_id) { + if (ud->match_data->version =3D=3D K3_UDMA_V2) { + __be32 addr[2] =3D {0, 0}; + struct of_phandle_args out_irq; + int ret; + + out_irq.np =3D dev_of_node(ud->dev); + out_irq.args_count =3D 1; + out_irq.args[0] =3D udma_rflow_id; + ret =3D of_irq_parse_raw(addr, &out_irq); + if (ret) + return ret; + + return irq_create_of_mapping(&out_irq); + } + const struct udma_oes_offsets *oes =3D &ud->soc_data->oes; =20 return msi_get_virq(ud->dev, udma_rflow_id + oes->pktdma_rchan_flow); diff --git a/drivers/dma/ti/k3-udma.h b/drivers/dma/ti/k3-udma.h index 642d8fc8f3175..8afcd69bc0d76 100644 --- a/drivers/dma/ti/k3-udma.h +++ b/drivers/dma/ti/k3-udma.h @@ -743,6 +743,8 @@ u32 xudma_rchanrt_read(struct udma_rchan *rchan, int re= g); void xudma_rchanrt_write(struct udma_rchan *rchan, int reg, u32 val); bool xudma_rflow_is_gp(struct udma_dev *ud, int id); int xudma_get_rflow_ring_offset(struct udma_dev *ud); +u32 xudma_rflowrt_read(struct udma_rflow *rflow, int reg); +void xudma_rflowrt_write(struct udma_rflow *rflow, int reg, u32 val); =20 int xudma_is_pktdma(struct udma_dev *ud); =20 --=20 2.34.1