From nobody Sun Apr 5 13:12:55 2026 Received: from smtp-out1.suse.de (smtp-out1.suse.de [195.135.223.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0B05D3191AF for ; Wed, 18 Feb 2026 08:22:23 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=195.135.223.130 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771402945; cv=none; b=L7Lb9G3R4NpYmna7Ia6pB9fHrLT4ppqsN6Dc3y/ZWuiWQEx46rqNTz3MwC+/DIrBKI2EzU05ZUT05QyiJlrUDv2HMHduwNN1wXHpUi1KRWgRItcjQVzIh/hXSJCjyPsCbYpVIRBeVa48zSi0E/4bD/GPT8WZrpSg9Qq12QD2Ru0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771402945; c=relaxed/simple; bh=GJRDvL5ZcaaT3htRvyuODkHoHQTKD2Yz/ZKJaL4cYbk=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=BPB6SBUMyM7XjWbHwIRWRiZ28bTFbtr4UmveP1eYG6ttd3uGsvdK1PfX6SjO4zeaRolOSZR5FHbstFPpWIEoh9AN0c1KLvvwwvJHnbR2uc8cUIFqSWuUoHvBH0FDLcpG7MpNp2onwFEXfzSJrSaMZN3Zyb+4tDfhSsgOUgfOi8c= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=suse.com; spf=pass smtp.mailfrom=suse.com; arc=none smtp.client-ip=195.135.223.130 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=suse.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=suse.com Received: from imap1.dmz-prg2.suse.org (imap1.dmz-prg2.suse.org [IPv6:2a07:de40:b281:104:10:150:64:97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by smtp-out1.suse.de (Postfix) with ESMTPS id 16F013E6E9; Wed, 18 Feb 2026 08:22:21 +0000 (UTC) Authentication-Results: smtp-out1.suse.de; none Received: from imap1.dmz-prg2.suse.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by imap1.dmz-prg2.suse.org (Postfix) with ESMTPS id BC54D3EA65; Wed, 18 Feb 2026 08:22:20 +0000 (UTC) Received: from dovecot-director2.suse.de ([2a07:de40:b281:106:10:150:64:167]) by imap1.dmz-prg2.suse.org with ESMTPSA id KEHeLLx2lWl7HgAAD6G6ig (envelope-from ); Wed, 18 Feb 2026 08:22:20 +0000 From: Juergen Gross To: linux-kernel@vger.kernel.org, x86@kernel.org Cc: Juergen Gross , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Thomas Gleixner , Ingo Molnar , Borislav Petkov , "H. Peter Anvin" , "Xin Li (Intel)" Subject: [PATCH v3 08/16] x86/extable: Add support for immediate form MSR instructions Date: Wed, 18 Feb 2026 09:21:25 +0100 Message-ID: <20260218082133.400602-9-jgross@suse.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260218082133.400602-1-jgross@suse.com> References: <20260218082133.400602-1-jgross@suse.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Rspamd-Pre-Result: action=no action; module=replies; Message is reply to one we originated X-Rspamd-Queue-Id: 16F013E6E9 X-Rspamd-Pre-Result: action=no action; module=replies; Message is reply to one we originated X-Rspamd-Action: no action X-Spam-Score: -4.00 X-Spam-Level: X-Spam-Flag: NO X-Spamd-Result: default: False [-4.00 / 50.00]; REPLY(-4.00)[] X-Rspamd-Server: rspamd1.dmz-prg2.suse.org Content-Type: text/plain; charset="utf-8" Signed-off-by: Xin Li (Intel) Signed-off-by: Juergen Gross --- V2: - new patch, taken from the RFC v2 MSR refactor series by Xin Li V3: - use instruction decoder (Peter Zijlstra) --- arch/x86/mm/extable.c | 35 ++++++++++++++++++++++++++++++----- 1 file changed, 30 insertions(+), 5 deletions(-) diff --git a/arch/x86/mm/extable.c b/arch/x86/mm/extable.c index 2fdc1f1f5adb..22e14ff2d3e9 100644 --- a/arch/x86/mm/extable.c +++ b/arch/x86/mm/extable.c @@ -166,23 +166,48 @@ static bool ex_handler_uaccess(const struct exception= _table_entry *fixup, static bool ex_handler_msr(const struct exception_table_entry *fixup, struct pt_regs *regs, bool wrmsr, bool safe, int reg) { + struct insn insn; + bool imm_insn; + u32 msr; + + imm_insn =3D insn_decode_kernel(&insn, (void *)regs->ip) && + insn.vex_prefix.nbytes; + msr =3D imm_insn ? insn.immediate.value : (u32)regs->cx; + if (__ONCE_LITE_IF(!safe && wrmsr)) { - pr_warn("unchecked MSR access error: WRMSR to 0x%x (tried to write 0x%08= x%08x) at rIP: 0x%lx (%pS)\n", - (unsigned int)regs->cx, (unsigned int)regs->dx, - (unsigned int)regs->ax, regs->ip, (void *)regs->ip); + /* + * To maintain consistency with existing RDMSR and WRMSR(NS) instruction= s, + * the register operand for immediate form MSR instructions is ALWAYS + * encoded as RAX in for reading or writing the MSR value. + */ + u64 msr_val =3D regs->ax; + + if (!imm_insn) { + /* + * On processors that support the Intel 64 architecture, the + * high-order 32 bits of each of RAX and RDX are ignored. + */ + msr_val &=3D 0xffffffff; + msr_val |=3D (u64)regs->dx << 32; + } + + pr_warn("unchecked MSR access error: WRMSR to 0x%x (tried to write 0x%01= 6llx) at rIP: 0x%lx (%pS)\n", + msr, msr_val, regs->ip, (void *)regs->ip); show_stack_regs(regs); } =20 if (__ONCE_LITE_IF(!safe && !wrmsr)) { pr_warn("unchecked MSR access error: RDMSR from 0x%x at rIP: 0x%lx (%pS)= \n", - (unsigned int)regs->cx, regs->ip, (void *)regs->ip); + msr, regs->ip, (void *)regs->ip); show_stack_regs(regs); } =20 if (!wrmsr) { /* Pretend that the read succeeded and returned 0. */ regs->ax =3D 0; - regs->dx =3D 0; + + if (!imm_insn) + regs->dx =3D 0; } =20 if (safe) --=20 2.53.0