From nobody Fri Apr 3 06:29:31 2026 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id ECE251C3C1F for ; Wed, 18 Feb 2026 11:45:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771415160; cv=none; b=Vk6vG9fmYBy7VQ0dii/C8KkvDPE/QTS3opf+ZzOpbUo8VgRUNw3BEDlaSXpefpzeeSOToNkWD03ALqh/+BW6fxzQ9E+vaP7MpL5CZL76kdM+WBVGj6ft7RegR96Q2u4f0/tKH6dChjd61fhBsTTWsWyDqLB8FYvVpc5rrLxLfJg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771415160; c=relaxed/simple; bh=5xgpYKeSbTkKum6QiWr+dBpeUgvpekjkn61g3UnMG1c=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:To:Cc; b=gxj5uL8EZZaVtfICPMv7zFBrAflHqCP2Ysj1X2e+O2HagLvKidNPGaCzxAS38MG+ByIzdZbG2mJ+nHdkNv5+H5D7L2KCQO2GeP0uxsFzTd4qO/wiRBRxqBOU1nCOUapzWejteHBA3yntCVF4KNBy24Le5AK7A5kCfZYY0Iw8uLk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de; spf=pass smtp.mailfrom=linutronix.de; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=NW7ArAuO; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=cC8AGcvq; arc=none smtp.client-ip=193.142.43.55 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linutronix.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="NW7ArAuO"; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="cC8AGcvq" From: =?utf-8?q?Thomas_Wei=C3=9Fschuh?= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1771415155; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=ZC3g1seJs+EgEwpFhDhmUalmLcYRm8A0dJYWDCWZ49U=; b=NW7ArAuOgOZWqj5hCZq1DzrteQnKFTTaMwwCbVTkCzH67op2iegLGkRkQ4iwfWsxwYHNbr O9WqpCMnKb4Zy6Tlu38RpX554iAj4AI8n7rRUkeelk0pHMFj7dty6Y3ba9w1OSrkYNy9Nq nt4hIRA9faaNxdvSnHNGZl6GT4kHUyr2n9/kSSeyNPmcZUHRHcwdMXWq7utjUIm+N3wKVl KsvSEkyY70gr8PEn01DNYekaUaErJu8ngIteLlDjTsR9DuJi2OvpdTGgG7n4rJ6uw44YV1 TRH95V7Io3fsBnqOfIOtvmUtxdgpdFIlAWNzoJOldmdtzm4HCcQq2sPpABJxqg== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1771415155; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=ZC3g1seJs+EgEwpFhDhmUalmLcYRm8A0dJYWDCWZ49U=; b=cC8AGcvqEz97T1aXB1xPLldqw/b11c1gNuF3oes/DbBX6o3U4/+0OQ7HyoCTehEib0UuJy bv6hUz5n1qKEuLDw== Date: Wed, 18 Feb 2026 12:45:48 +0100 Subject: [PATCH] tools/nolibc: MIPS: fix clobbers of 'lo' and 'hi' registers on different ISAs Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260218-nolibc-mips-clobber-v1-1-f71009a00c90@linutronix.de> X-B4-Tracking: v=1; b=H4sIAAAAAAAC/x3MQQqAIBBA0avErBswqciuEi0aG2ugNBQikO6et HyL/zMkjsIJxipD5FuSBF/Q1BXYffEbo6zFoJXulW4G9OEQsnjKldAegYgjtsawcbRSRw5KeUV 28vzXaX7fD2YMF25lAAAA X-Change-ID: 20260218-nolibc-mips-clobber-499e9fbdb5bf To: Willy Tarreau , =?utf-8?q?Thomas_Wei=C3=9Fschuh?= Cc: linux-kernel@vger.kernel.org, =?utf-8?q?Thomas_Wei=C3=9Fschuh?= X-Developer-Signature: v=1; a=ed25519-sha256; t=1771415153; l=2668; i=thomas.weissschuh@linutronix.de; s=20240209; h=from:subject:message-id; bh=5xgpYKeSbTkKum6QiWr+dBpeUgvpekjkn61g3UnMG1c=; b=R7pQ6+7eSwuK3yiqsh8gDwA3GJ984xcTrM1ab4zm2wKgiHu4efC6jqRzi2G0kCPhUXYmQtnz9 7JORVX5VNcKDu58wo99UDKLBaWwyBye626FLUSyL063UcjsJFkZ+sBd X-Developer-Key: i=thomas.weissschuh@linutronix.de; a=ed25519; pk=pfvxvpFUDJV2h2nY0FidLUml22uGLSjByFbM6aqQQws= Earlier MIPS64 ISAs still provide the 'lo' and 'hi' special registers. These are clobbered by system calls and need to be marked as such to avoid miscompilations. Also 32-bit ISAs from r6 on do not define the 'lo' and 'hi' registers. Handle all different combinations of ABI and ISAs. Fixes: a6a2a8a42972 ("tools/nolibc: MIPS: add support for N64 and N32 ABIs") Fixes: 66b6f755ad45 ("rcutorture: Import a copy of nolibc") Signed-off-by: Thomas Wei=C3=9Fschuh Acked-by: Willy Tarreau --- tools/include/nolibc/arch-mips.h | 33 +++++++++++++++++++++++++++------ 1 file changed, 27 insertions(+), 6 deletions(-) diff --git a/tools/include/nolibc/arch-mips.h b/tools/include/nolibc/arch-m= ips.h index a72506ceec6b..210bd907b51f 100644 --- a/tools/include/nolibc/arch-mips.h +++ b/tools/include/nolibc/arch-mips.h @@ -41,23 +41,44 @@ =20 #if defined(_ABIO32) =20 -#define _NOLIBC_SYSCALL_CLOBBERLIST \ - "memory", "cc", "at", "v1", "hi", "lo", \ - "t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7", "t8", "t9" #define _NOLIBC_SYSCALL_STACK_RESERVE "addiu $sp, $sp, -32\n" #define _NOLIBC_SYSCALL_STACK_UNRESERVE "addiu $sp, $sp, 32\n" =20 #else /* _ABIN32 || _ABI64 */ =20 +#define _NOLIBC_SYSCALL_STACK_RESERVE +#define _NOLIBC_SYSCALL_STACK_UNRESERVE + +#endif /* _ABIO32 */ + + +#if defined(_ABIO32) && __mips_isa_rev >=3D 6 + +#define _NOLIBC_SYSCALL_CLOBBERLIST \ + "memory", "cc", "at", "v1", \ + "t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7", "t8", "t9" + +#elif defined(_ABIO32) && __mips_isa_rev < 6 + +#define _NOLIBC_SYSCALL_CLOBBERLIST \ + "memory", "cc", "at", "v1", "hi", "lo", \ + "t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7", "t8", "t9" + +#elif __mips_isa_rev >=3D 6 /* _ABIN32 || _ABI64 */ + /* binutils, GCC and clang disagree about register aliases, use numbers in= stead. */ #define _NOLIBC_SYSCALL_CLOBBERLIST \ "memory", "cc", "at", "v1", \ "10", "11", "12", "13", "14", "15", "24", "25" =20 -#define _NOLIBC_SYSCALL_STACK_RESERVE -#define _NOLIBC_SYSCALL_STACK_UNRESERVE +#else /* __mips_is_rev < 6 && (_ABIN32 || _ABI64) */ + +#define _NOLIBC_SYSCALL_CLOBBERLIST \ + "memory", "cc", "at", "v1", "hi", "lo", \ + "10", "11", "12", "13", "14", "15", "24", "25" + +#endif /* __mips_isa_rev and ABI */ =20 -#endif /* _ABIO32 */ =20 #define my_syscall0(num) = \ ({ = \ --- base-commit: 2961f841b025fb234860bac26dfb7fa7cb0fb122 change-id: 20260218-nolibc-mips-clobber-499e9fbdb5bf Best regards, --=20 Thomas Wei=C3=9Fschuh