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Tue, 17 Feb 2026 05:39:06 -0800 (PST) X-Received: by 2002:a05:6a00:1c96:b0:81d:dd3a:b8f5 with SMTP id d2e1a72fcca58-824c963f32dmr11294291b3a.38.1771335545559; Tue, 17 Feb 2026 05:39:05 -0800 (PST) Received: from hu-kshaikkh-hyd.qualcomm.com ([202.46.23.25]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-824c6b935c6sm14633207b3a.47.2026.02.17.05.39.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 17 Feb 2026 05:39:05 -0800 (PST) From: Khaja Hussain Shaik Khaji To: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org, mark.rutland@arm.com, catalin.marinas@arm.com, will@kernel.org, mhiramat@kernel.org, yang@os.amperecomputing.com, dev.jain@arm.com, ada.coupriediaz@arm.com, linux-arm-msm@vger.kernel.org Subject: [PATCH v2 1/2] arm64: kprobes: disable preemption across XOL single-step Date: Tue, 17 Feb 2026 19:08:54 +0530 Message-Id: <20260217133855.3142192-2-khaja.khaji@oss.qualcomm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260217133855.3142192-1-khaja.khaji@oss.qualcomm.com> References: <20251106104955.2089268-1-khaja.khaji@oss.qualcomm.com> <20260217133855.3142192-1-khaja.khaji@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-GUID: gpilHIuW6_peoTg62yB8Bid2udvPZtRg X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMjE3MDExMCBTYWx0ZWRfX1yS5QS5D0dg1 ntdjwtEBDwt9kNjr8WaRI/CaEnyl8jE+acYlsq83O+CmU0Jw/V5SQ1Gm15XpMktKLIDD8eJLuqE AbbRS1QnGldHW7swpNRSpGMMCIWlJxLJSyp9wfm0lAlWg7WuA4aO4MU8xTPE9GCO19p4Ine/rdl Z02Y52qdsUwzwD6ifZF3LJZ5GAScTuJQF2VrRW5vmwlf0t64gGQ3CzgsPsf4SQEMzDeT4eLHO9A 526Wg7L421+tgfSv3Cxe2laTOXNhpxYKHrcmMfZMrFHcpILhmtgbT0MdZIJrEhQFufW3ns4CrPR Z8mCEwFcSFL46Ost1l/OVwhpI5IetzkuNWxUCV2W5xeFE7kGCvnpBQeiubc9DxnE864ImbjQ0GT gabYngXh2HvYa+IeuuUMXlx4c5TLjRfloPugu+hXRljVzSs0dW3lvSyA5KHla5vnebIm2sQRrb2 f4TAD9VFe20ryeCzaGA== X-Proofpoint-ORIG-GUID: gpilHIuW6_peoTg62yB8Bid2udvPZtRg X-Authority-Analysis: v=2.4 cv=IOoPywvG c=1 sm=1 tr=0 ts=69946f7b cx=c_pps a=Oh5Dbbf/trHjhBongsHeRQ==:117 a=ZePRamnt/+rB5gQjfz0u9A==:17 a=HzLeVaNsDn8A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=Mpw57Om8IfrbqaoTuvik:22 a=GgsMoib0sEa3-_RKJdDe:22 a=EUspDBNiAAAA:8 a=lireVsuIo57cRQcYBF4A:9 a=_Vgx9l1VpLgwpw_dHYaR:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-02-17_01,2026-02-16_04,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 spamscore=0 lowpriorityscore=0 adultscore=0 clxscore=1015 suspectscore=0 malwarescore=0 bulkscore=0 phishscore=0 impostorscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2601150000 definitions=main-2602170110 Content-Type: text/plain; charset="utf-8" On arm64, non-emulatable kprobes instructions execute out-of-line (XOL) after returning from the initial debug exception. The XOL instruction runs in normal kernel context, while kprobe state is maintained per-CPU. If the task is preempted or migrates during the XOL window, the subsequent SS-BRK exception may be handled on a different CPU, corrupting per-CPU kprobe state and preventing correct recovery. Disable preemption across the XOL instruction and re-enable it in the SS-BRK handler to prevent migration until control returns to the kprobe handler. Signed-off-by: Khaja Hussain Shaik Khaji --- arch/arm64/kernel/probes/kprobes.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/arm64/kernel/probes/kprobes.c b/arch/arm64/kernel/probes/= kprobes.c index 43a0361a8bf0..d8a70c456543 100644 --- a/arch/arm64/kernel/probes/kprobes.c +++ b/arch/arm64/kernel/probes/kprobes.c @@ -227,6 +227,14 @@ static void __kprobes setup_singlestep(struct kprobe *= p, =20 kprobes_save_local_irqflag(kcb, regs); instruction_pointer_set(regs, slot); + + /* + * Disable preemption across the out-of-line (XOL) instruction. + * The XOL instruction executes in normal kernel context and + * kprobe state is per-CPU. + */ + preempt_disable(); + } else { /* insn simulation */ arch_simulate_insn(p, regs); @@ -363,6 +371,11 @@ kprobe_ss_brk_handler(struct pt_regs *regs, unsigned l= ong esr) kprobes_restore_local_irqflag(kcb, regs); post_kprobe_handler(cur, kcb, regs); =20 + /* + * Re-enable preemption after completing the XOL instruction. + */ + preempt_enable_no_resched(); + return DBG_HOOK_HANDLED; } =20 --=20 2.34.1