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([103.218.174.23]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2ad1a6fa21dsm94337205ad.12.2026.02.17.02.37.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 17 Feb 2026 02:38:02 -0800 (PST) From: Sudarshan Shetty To: andersson@kernel.org, konradybcio@kernel.org Cc: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Sudarshan Shetty , Krzysztof Kozlowski Subject: [PATCH v14 1/3] dt-bindings: arm: qcom: talos-evk: Add QCS615 Talos EVK SMARC platform Date: Tue, 17 Feb 2026 16:07:47 +0530 Message-Id: <20260217103749.1249718-2-tessolveupstream@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260217103749.1249718-1-tessolveupstream@gmail.com> References: <20260217103749.1249718-1-tessolveupstream@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add binding support for the Qualcomm Technologies, Inc. Talos EVK SMARC platform based on the QCS615 SoC. Acked-by: Krzysztof Kozlowski Signed-off-by: Sudarshan Shetty --- Documentation/devicetree/bindings/arm/qcom.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentatio= n/devicetree/bindings/arm/qcom.yaml index 4eb0a7a9ee4a..c081746636d1 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -876,6 +876,7 @@ properties: - items: - enum: - qcom,qcs615-ride + - qcom,talos-evk - const: qcom,qcs615 - const: qcom,sm6150 =20 --=20 2.34.1 From nobody Fri Apr 3 02:56:58 2026 Received: from mail-pl1-f182.google.com (mail-pl1-f182.google.com [209.85.214.182]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EEAAD1FC7C5 for ; Tue, 17 Feb 2026 10:38:08 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.214.182 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771324690; cv=none; b=WEAaZdRlJk6Hi8bsELOrXA9OC1mR8+tIBL5cKuXfN9Cm7ptcJ0Gxi+3k4GOUaPo37GYfpAjQ7Y7fiI1xAeOr87IjBXY66zYm1C8wQestUugpJ8g2xNl+T0zoxoQzUd/UFpVU7g1c+crgzpvFJPH9SKwvSKQDboFTjN0jeSv3DQo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771324690; c=relaxed/simple; bh=Tpg7zSRy62+j7kpS0ZdgFhzUVtTCoi/LUR1IuhM9Pos=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=QtAKA+6XtYqOyotQBEJ2XzmoJdeF7796f4Kh4GtDl+oXTqOH1VVoBRWj55XN5OJJ8zQwdzN8qPmhQb802lAgq6+FLpZ7O7owbm1yrw0rEMJYD7ULQTP4q+WqriE2I4avz6eT3cYyuPC9wgFuoNZ8RfCs+BHZz4EpTk6xhHTlH40= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=Yquk+dV9; arc=none smtp.client-ip=209.85.214.182 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="Yquk+dV9" Received: by mail-pl1-f182.google.com with SMTP id d9443c01a7336-2aaecf9c325so28872195ad.1 for ; Tue, 17 Feb 2026 02:38:08 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1771324688; x=1771929488; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=seDpjvldkVh4x8HmY2iZCQm4/m99ewrE6bkyICaW74A=; b=Yquk+dV9Z7UDH9D00u0iDNqogbqC3uL10N5bBMNSYpeNWvlgUBnUhme08wM/c4+NmK rG7AQPLmmvJ09KysG4kPCYxAjEVVwfgF8zjFYzTsOSdBqqm37zH4a116XJy6rzG4OK2i JtUWP7JTOECxFNkl3KP5cAD5wms8JySE4pxHZp87NhQHvL8YwvrpOrF5PxDcDxexY1jD g9bWpmfBWGrKgAG7ycaIpXkTa1wSZ3Qh7LvCTJD4eS75D3/Ji119X93JQ/DLXb0Zqrl4 U7kGQqgRYBP/aeo+gyHrlOYK6w64B5J1/blwInBlGHGlcRMxh+zAXHT3QKf2NSc4F5sS iXFA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1771324688; x=1771929488; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=seDpjvldkVh4x8HmY2iZCQm4/m99ewrE6bkyICaW74A=; b=sBapkx8UOmYI4X+3f0La2Pcz2HvkSB1NFaF9orQptUJirm9SMMS5+qCOFA+ALcIfoG LIIOXHE0Xs2ozME4+eXvkSIAN4UKHhy9E7sns6v1Q/fqRvYwqSJZaATDrStzfUYoEVnn GDP6vZuocpQtbNKG8MEEHG6c/PVCsOpDQCJoQmPLj4xL/2xT7LU0g4DwCmk+I3k3hUzO svxJGp2ttizpRjQjjqkHL/bo0jt/cxyg6/TeN1z0qVXU4ns5uF/V6P+EDMZrhEeSarGx uVkW9qa2FWnJNgksC7nLfdTDDlzqt3SP5KW46FoU9UDsYNH4STtW0EdBUOJjDpW4WHCE LUJg== X-Forwarded-Encrypted: i=1; AJvYcCXwZBO3m8gEby6c/xO6A+o9OtMnqFnog9ILNyDmugXTkIwiS9tYY5n81RhE4rI23ZFd/jjaRpVopqYc1F0=@vger.kernel.org X-Gm-Message-State: AOJu0Yz8WdObLi9NwXGL6MsN01vZNBp2f+Zsy+DY6HWRvzYqfCVSSRDA RHocVABxuoCOdL9xN8MYne6fGBl2Tf6lbHiLhaPTjpyGusLKRu9BtBlG X-Gm-Gg: AZuq6aKRe5pd6ATiD+XBP/3SsTVooLFnqYkKDNW+VQgIjiwwR7qrBGL1gmg9SO/B13G elez6y1vL1p8DaG5oJX2C8COZt6x+dWLamIo0Vpq7vHhiNqMQuquCqifQOpa6sXZ2sxYq3NLnAZ FMJwBmUNeqmD6/2bydmGJTvINLUjHr9BDw4avRXzGCZ8g2C2Ukb5hG09bKzD+pQsTtDG+amlriz 7xrDjyokB+k91hocoJJIEC/s6o4m7OZ2vBfll1tIPOByr+ySuIEnLEVQ4hLO/6mcd3sm/PnLqgU MVZA6Kp5eQXfB50kmFIZaxgDWRQ+1t9hC27IobV1qtzAPK+fN0+VZ80tBpRqfxNWN0Lg0QmMl4N hFjC87/QYn74ekC40ez2LAUuvbtajLnMKpHDyJJ0hzL3WAvzu17wx9FbHda8SfUix7xF7bT04Kb nlAQScQnr9m+wH1o4t4CETa4x8PWofKUXngJR2RuTL85Cu6Jhd X-Received: by 2002:a17:902:e84d:b0:2a9:616c:1716 with SMTP id d9443c01a7336-2acba48df66mr115760535ad.26.1771324688214; Tue, 17 Feb 2026 02:38:08 -0800 (PST) Received: from test-HP-Desktop-Pro-G3.. ([103.218.174.23]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2ad1a6fa21dsm94337205ad.12.2026.02.17.02.38.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 17 Feb 2026 02:38:07 -0800 (PST) From: Sudarshan Shetty To: andersson@kernel.org, konradybcio@kernel.org Cc: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Sudarshan Shetty , Dmitry Baryshkov Subject: [PATCH v14 2/3] arm64: dts: qcom: talos/qcs615-ride: Fix inconsistent USB PHY node naming Date: Tue, 17 Feb 2026 16:07:48 +0530 Message-Id: <20260217103749.1249718-3-tessolveupstream@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260217103749.1249718-1-tessolveupstream@gmail.com> References: <20260217103749.1249718-1-tessolveupstream@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The USB PHY nodes has inconsistent labels as 'usb_1_hsphy' and 'usb_hsphy_2' across talos.dtsi and qcs615-ride.dts. This patch renames them to follow a consistent naming scheme. No functional changes, only label renaming. Reviewed-by: Dmitry Baryshkov Signed-off-by: Sudarshan Shetty --- arch/arm64/boot/dts/qcom/qcs615-ride.dts | 2 +- arch/arm64/boot/dts/qcom/talos.dtsi | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/qcs615-ride.dts b/arch/arm64/boot/dts= /qcom/qcs615-ride.dts index be67eb173046..a5f763cf1a55 100644 --- a/arch/arm64/boot/dts/qcom/qcs615-ride.dts +++ b/arch/arm64/boot/dts/qcom/qcs615-ride.dts @@ -632,7 +632,7 @@ &usb_1_dwc3 { dr_mode =3D "peripheral"; }; =20 -&usb_hsphy_2 { +&usb_2_hsphy { vdd-supply =3D <&vreg_l5a>; vdda-pll-supply =3D <&vreg_l12a>; vdda-phy-dpdm-supply =3D <&vreg_l13a>; diff --git a/arch/arm64/boot/dts/qcom/talos.dtsi b/arch/arm64/boot/dts/qcom= /talos.dtsi index 95d26e313622..cb32bfe732fb 100644 --- a/arch/arm64/boot/dts/qcom/talos.dtsi +++ b/arch/arm64/boot/dts/qcom/talos.dtsi @@ -4319,7 +4319,7 @@ usb_1_hsphy: phy@88e2000 { status =3D "disabled"; }; =20 - usb_hsphy_2: phy@88e3000 { + usb_2_hsphy: phy@88e3000 { compatible =3D "qcom,qcs615-qusb2-phy"; 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([103.218.174.23]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2ad1a6fa21dsm94337205ad.12.2026.02.17.02.38.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 17 Feb 2026 02:38:13 -0800 (PST) From: Sudarshan Shetty To: andersson@kernel.org, konradybcio@kernel.org Cc: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Sudarshan Shetty , Dmitry Baryshkov , Konrad Dybcio Subject: [PATCH v14 3/3] arm64: dts: qcom: talos-evk: Add support for QCS615 talos evk board Date: Tue, 17 Feb 2026 16:07:49 +0530 Message-Id: <20260217103749.1249718-4-tessolveupstream@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260217103749.1249718-1-tessolveupstream@gmail.com> References: <20260217103749.1249718-1-tessolveupstream@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Add the device tree for the QCS615-based Talos EVK platform. The platform is composed of a System-on-Module following the SMARC standard, and a Carrier Board. The Carrier Board supports several display configurations, HDMI and LVDS. Both configurations use the same base hardware, with the display selection controlled by a DIP switch. Use a DTBO file, talos-evk-lvds-auo,g133han01.dtso, which defines an overlay that disables HDMI and adds LVDS. The DTs file talos-evk can describe the HDMI display configurations. According to the hardware design and vendor guidance, the WiFi PA supplies VDD_PA_A and VDD_PA_B only need to be enabled at the same time as asserting WLAN_EN. On this platform, WiFi enablement is controlled via the WLAN_EN GPIO (GPIO84), which also drives the VDD_PA_A and VDD_PA_B power enables. Remove the VDD_PA_A and VDD_PA_B regulator nodes from the device tree and rely on WLAN_EN to enable WiFi functionality. Add talos-evk-usb1-peripheral.dtso overlay to enable USB0 peripheral (EDL) mode. The base DTS will keep USB0 host-only due to hardware routing through the EDL DIP switch, and the overlay switches the configuration for device-mode operation. The initial device tree includes support for: - CPU and memory - UART - GPIOs - Regulators - PMIC - Early console - AT24MAC602 EEPROM - MCP2515 SPI to CAN - ADV7535 DSI-to-HDMI bridge - DisplayPort interface - SN65DSI84ZXHR DSI-to-LVDS bridge - Wi-Fi/BT Reviewed-by: Dmitry Baryshkov Reviewed-by: Konrad Dybcio Signed-off-by: Sudarshan Shetty --- arch/arm64/boot/dts/qcom/Makefile | 6 + .../qcom/talos-evk-lvds-auo,g133han01.dtso | 131 ++++ arch/arm64/boot/dts/qcom/talos-evk-som.dtsi | 614 ++++++++++++++++++ .../dts/qcom/talos-evk-usb1-peripheral.dtso | 10 + arch/arm64/boot/dts/qcom/talos-evk.dts | 139 ++++ 5 files changed, 900 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/talos-evk-lvds-auo,g133han01.d= tso create mode 100644 arch/arm64/boot/dts/qcom/talos-evk-som.dtsi create mode 100644 arch/arm64/boot/dts/qcom/talos-evk-usb1-peripheral.dtso create mode 100644 arch/arm64/boot/dts/qcom/talos-evk.dts diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/M= akefile index 76cf0115a00a..9b18ec342eae 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -324,6 +324,12 @@ dtb-$(CONFIG_ARCH_QCOM) +=3D sm8650-mtp.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D sm8650-qrd.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D sm8750-mtp.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D sm8750-qrd.dtb +dtb-$(CONFIG_ARCH_QCOM) +=3D talos-evk.dtb +talos-evk-usb1-peripheral-dtbs :=3D talos-evk.dtb talos-evk-usb1-periphera= l.dtbo +dtb-$(CONFIG_ARCH_QCOM) +=3D talos-evk-usb1-peripheral.dtb +talos-evk-lvds-auo,g133han01-dtbs :=3D \ + talos-evk.dtb talos-evk-lvds-auo,g133han01.dtbo +dtb-$(CONFIG_ARCH_QCOM) +=3D talos-evk-lvds-auo,g133han01.dtb x1e001de-devkit-el2-dtbs :=3D x1e001de-devkit.dtb x1-el2.dtbo dtb-$(CONFIG_ARCH_QCOM) +=3D x1e001de-devkit.dtb x1e001de-devkit-el2.dtb x1e78100-lenovo-thinkpad-t14s-el2-dtbs :=3D x1e78100-lenovo-thinkpad-t14s.= dtb x1-el2.dtbo diff --git a/arch/arm64/boot/dts/qcom/talos-evk-lvds-auo,g133han01.dtso b/a= rch/arm64/boot/dts/qcom/talos-evk-lvds-auo,g133han01.dtso new file mode 100644 index 000000000000..884df2d4f4e1 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/talos-evk-lvds-auo,g133han01.dtso @@ -0,0 +1,131 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ +/dts-v1/; +/plugin/; + +#include + +&{/} { + backlight: backlight { + compatible =3D "gpio-backlight"; + gpios =3D <&tlmm 59 GPIO_ACTIVE_HIGH>, + <&tlmm 115 GPIO_ACTIVE_HIGH>; + default-on; + }; + + panel-lvds { + compatible =3D "auo,g133han01"; + power-supply =3D <&vreg_v3p3>; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + /* LVDS A (Odd pixels) */ + port@0 { + reg =3D <0>; + dual-lvds-odd-pixels; + + lvds_panel_out_a: endpoint { + remote-endpoint =3D <&sn65dsi84_out_a>; + }; + }; + + /* LVDS B (Even pixels) */ + port@1 { + reg =3D <1>; + dual-lvds-even-pixels; + + lvds_panel_out_b: endpoint { + remote-endpoint =3D <&sn65dsi84_out_b>; + }; + }; + }; + }; + + vreg_v3p3: regulator-v3p3 { + compatible =3D "regulator-fixed"; + regulator-name =3D "vdd-3v3"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + }; +}; + +&hdmi_connector { + status =3D "disabled"; +}; + +&i2c1 { + clock-frequency =3D <400000>; + + status =3D "okay"; + + hdmi_bridge: bridge@3d { + status =3D "disabled"; + }; + + lvds_bridge: bridge@2c { + compatible =3D "ti,sn65dsi84"; + reg =3D <0x2c>; + enable-gpios =3D <&tlmm 42 GPIO_ACTIVE_HIGH>; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + + sn65dsi84_in: endpoint { + data-lanes =3D <1 2 3 4>; + remote-endpoint =3D <&mdss_dsi0_out>; + }; + }; + + port@2 { + reg =3D <2>; + + sn65dsi84_out_a: endpoint { + data-lanes =3D <1 2 3 4>; + remote-endpoint =3D <&lvds_panel_out_a>; + }; + }; + + port@3 { + reg =3D <3>; + + sn65dsi84_out_b: endpoint { + data-lanes =3D <1 2 3 4>; + remote-endpoint =3D <&lvds_panel_out_b>; + }; + }; + }; + }; +}; + +&mdss_dsi0 { + vdda-supply =3D <&vreg_l11a>; + + status =3D "okay"; +}; + +&mdss_dsi0_out { + remote-endpoint =3D <&sn65dsi84_in>; + data-lanes =3D <0 1 2 3>; +}; + +&tlmm { + lcd_bklt_en: lcd-bklt-en-state { + pins =3D "gpio115"; + function =3D "gpio"; + bias-disable; + }; + + lcd_bklt_pwm: lcd-bklt-pwm-state { + pins =3D "gpio59"; + function =3D "gpio"; + bias-disable; + }; +}; diff --git a/arch/arm64/boot/dts/qcom/talos-evk-som.dtsi b/arch/arm64/boot/= dts/qcom/talos-evk-som.dtsi new file mode 100644 index 000000000000..e57dc370c4e4 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/talos-evk-som.dtsi @@ -0,0 +1,614 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ +/dts-v1/; + +#include +#include +#include "talos.dtsi" +#include "pm8150.dtsi" +/ { + aliases { + i2c1 =3D &i2c1; + i2c5 =3D &i2c5; + mmc0 =3D &sdhc_1; + serial0 =3D &uart0; + serial1 =3D &uart7; + spi6 =3D &spi6; + }; + + chosen { + stdout-path =3D "serial0:115200n8"; + }; + + clocks { + can_osc: can-oscillator { + compatible =3D "fixed-clock"; + clock-frequency =3D <20000000>; + #clock-cells =3D <0>; + }; + + sleep_clk: sleep-clk { + compatible =3D "fixed-clock"; + clock-frequency =3D <32764>; + #clock-cells =3D <0>; + }; + + xo_board_clk: xo-board-clk { + compatible =3D "fixed-clock"; + clock-frequency =3D <38400000>; + #clock-cells =3D <0>; + }; + }; + + regulator-usb2-vbus { + compatible =3D "regulator-fixed"; + regulator-name =3D "USB2_VBUS"; + gpio =3D <&pm8150_gpios 10 GPIO_ACTIVE_HIGH>; + pinctrl-0 =3D <&usb2_en>; + pinctrl-names =3D "default"; + enable-active-high; + regulator-always-on; + }; + + vreg_conn_1p8: regulator-conn-1p8 { + compatible =3D "regulator-fixed"; + regulator-name =3D "vreg_conn_1p8"; + startup-delay-us =3D <4000>; + enable-active-high; + gpio =3D <&pm8150_gpios 1 GPIO_ACTIVE_HIGH>; + }; + + vreg_conn_pa: regulator-conn-pa { + compatible =3D "regulator-fixed"; + regulator-name =3D "vreg_conn_pa"; + startup-delay-us =3D <4000>; + enable-active-high; + gpio =3D <&pm8150_gpios 6 GPIO_ACTIVE_HIGH>; + }; + + vreg_v3p3_can: regulator-v3p3-can { + compatible =3D "regulator-fixed"; + regulator-name =3D "vreg-v3p3-can"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + regulator-boot-on; + regulator-always-on; + }; + + vreg_v5p0_can: regulator-v5p0-can { + compatible =3D "regulator-fixed"; + regulator-name =3D "vreg-v5p0-can"; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + regulator-boot-on; + regulator-always-on; + }; + + wcn6855-pmu { + compatible =3D "qcom,wcn6855-pmu"; + + pinctrl-0 =3D <&bt_en_state>, <&wlan_en_state>; + pinctrl-names =3D "default"; + + bt-enable-gpios =3D <&tlmm 85 GPIO_ACTIVE_HIGH>; + wlan-enable-gpios =3D <&tlmm 84 GPIO_ACTIVE_HIGH>; + + vddio-supply =3D <&vreg_conn_pa>; + vddaon-supply =3D <&vreg_s5a>; + vddpmu-supply =3D <&vreg_conn_1p8>; + vddpmumx-supply =3D <&vreg_conn_1p8>; + vddpmucx-supply =3D <&vreg_conn_pa>; + vddrfa0p95-supply =3D <&vreg_s5a>; + vddrfa1p3-supply =3D <&vreg_s6a>; + vddrfa1p9-supply =3D <&vreg_l15a>; + vddpcie1p3-supply =3D <&vreg_s6a>; + vddpcie1p9-supply =3D <&vreg_l15a>; + + regulators { + vreg_pmu_rfa_cmn: ldo0 { + regulator-name =3D "vreg_pmu_rfa_cmn"; + }; + + vreg_pmu_aon_0p59: ldo1 { + regulator-name =3D "vreg_pmu_aon_0p59"; + }; + + vreg_pmu_wlcx_0p8: ldo2 { + regulator-name =3D "vreg_pmu_wlcx_0p8"; + }; + + vreg_pmu_wlmx_0p85: ldo3 { + regulator-name =3D "vreg_pmu_wlmx_0p85"; + }; + + vreg_pmu_btcmx_0p85: ldo4 { + regulator-name =3D "vreg_pmu_btcmx_0p85"; + }; + + vreg_pmu_rfa_0p8: ldo5 { + regulator-name =3D "vreg_pmu_rfa_0p8"; + }; + + vreg_pmu_rfa_1p2: ldo6 { + regulator-name =3D "vreg_pmu_rfa_1p2"; + }; + + vreg_pmu_rfa_1p7: ldo7 { + regulator-name =3D "vreg_pmu_rfa_1p7"; + }; + + vreg_pmu_pcie_0p9: ldo8 { + regulator-name =3D "vreg_pmu_pcie_0p9"; + }; + + vreg_pmu_pcie_1p8: ldo9 { + regulator-name =3D "vreg_pmu_pcie_1p8"; + }; + }; + }; +}; + +&apps_rsc { + regulators-0 { + compatible =3D "qcom,pm8150-rpmh-regulators"; + qcom,pmic-id =3D "a"; + + vreg_s3a: smps3 { + regulator-name =3D "vreg_s3a"; + regulator-min-microvolt =3D <600000>; + regulator-max-microvolt =3D <650000>; + regulator-initial-mode =3D ; + }; + + vreg_s4a: smps4 { + regulator-name =3D "vreg_s4a"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1829000>; + regulator-initial-mode =3D ; + }; + + vreg_s5a: smps5 { + regulator-name =3D "vreg_s5a"; + regulator-min-microvolt =3D <1896000>; + regulator-max-microvolt =3D <2040000>; + regulator-initial-mode =3D ; + }; + + vreg_s6a: smps6 { + regulator-name =3D "vreg_s6a"; + regulator-min-microvolt =3D <1304000>; + regulator-max-microvolt =3D <1404000>; + regulator-initial-mode =3D ; + }; + + vreg_l1a: ldo1 { + regulator-name =3D "vreg_l1a"; + regulator-min-microvolt =3D <488000>; + regulator-max-microvolt =3D <852000>; + regulator-initial-mode =3D ; + regulator-allow-set-load; + regulator-allowed-modes =3D ; + }; + + vreg_l2a: ldo2 { + regulator-name =3D "vreg_l2a"; + regulator-min-microvolt =3D <1650000>; + regulator-max-microvolt =3D <3100000>; + regulator-initial-mode =3D ; + regulator-allow-set-load; + regulator-allowed-modes =3D ; + }; + + vreg_l3a: ldo3 { + regulator-name =3D "vreg_l3a"; + regulator-min-microvolt =3D <1000000>; + regulator-max-microvolt =3D <1248000>; + regulator-initial-mode =3D ; + regulator-allow-set-load; + regulator-allowed-modes =3D ; + }; + + vreg_l5a: ldo5 { + regulator-name =3D "vreg_l5a"; + regulator-min-microvolt =3D <875000>; + regulator-max-microvolt =3D <975000>; + regulator-initial-mode =3D ; + regulator-allow-set-load; + regulator-allowed-modes =3D ; + }; + + vreg_l7a: ldo7 { + regulator-name =3D "vreg_l7a"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1900000>; + regulator-initial-mode =3D ; + regulator-allow-set-load; + regulator-allowed-modes =3D ; + }; + + vreg_l8a: ldo8 { + regulator-name =3D "vreg_l8a"; + regulator-min-microvolt =3D <1150000>; + regulator-max-microvolt =3D <1350000>; + regulator-initial-mode =3D ; + regulator-allow-set-load; + regulator-allowed-modes =3D ; + }; + + vreg_l10a: ldo10 { + regulator-name =3D "vreg_l10a"; + regulator-min-microvolt =3D <2950000>; + regulator-max-microvolt =3D <3312000>; + regulator-initial-mode =3D ; + regulator-allow-set-load; + regulator-allowed-modes =3D ; + }; + + vreg_l11a: ldo11 { + regulator-name =3D "vreg_l11a"; + regulator-min-microvolt =3D <1232000>; + regulator-max-microvolt =3D <1260000>; + regulator-initial-mode =3D ; + regulator-allow-set-load; + regulator-allowed-modes =3D ; + }; + + vreg_l12a: ldo12 { + regulator-name =3D "vreg_l12a"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1890000>; + regulator-initial-mode =3D ; + }; + + vreg_l13a: ldo13 { + regulator-name =3D "vreg_l13a"; + regulator-min-microvolt =3D <3000000>; + regulator-max-microvolt =3D <3230000>; + regulator-initial-mode =3D ; + regulator-allow-set-load; + regulator-allowed-modes =3D ; + }; + + vreg_l15a: ldo15 { + regulator-name =3D "vreg_l15a"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1904000>; + regulator-initial-mode =3D ; + regulator-allow-set-load; + regulator-allowed-modes =3D ; + }; + + vreg_l16a: ldo16 { + regulator-name =3D "vreg_l16a"; + regulator-min-microvolt =3D <3000000>; + regulator-max-microvolt =3D <3312000>; + regulator-initial-mode =3D ; + regulator-allow-set-load; + regulator-allowed-modes =3D ; + }; + + vreg_l17a: ldo17 { + regulator-name =3D "vreg_l17a"; + regulator-min-microvolt =3D <2950000>; + regulator-max-microvolt =3D <3312000>; + regulator-initial-mode =3D ; + }; + }; +}; + +&gpi_dma0 { + status =3D "okay"; +}; + +&gpi_dma1 { + status =3D "okay"; +}; + +&i2c5 { + clock-frequency =3D <400000>; + status =3D "okay"; + + eeprom@57 { + compatible =3D "atmel,24c02"; + reg =3D <0x57>; + pagesize =3D <16>; + }; + + eeprom@5f { + compatible =3D "atmel,24mac602"; + reg =3D <0x5f>; + pagesize =3D <16>; + }; +}; + +&mdss { + status =3D "okay"; +}; + +&mdss_dp0 { + status =3D "okay"; +}; + +&mdss_dp0_out { + link-frequencies =3D /bits/ 64 <1620000000 2700000000 5400000000>; + remote-endpoint =3D <&dp0_connector_in>; +}; + +&mdss_dsi0 { + vdda-supply =3D <&vreg_l11a>; + status =3D "okay"; +}; + +&mdss_dsi0_phy { + vcca-supply =3D <&vreg_l5a>; + status =3D "okay"; +}; + +&pcie { + perst-gpios =3D <&tlmm 89 GPIO_ACTIVE_LOW>; + wake-gpios =3D <&tlmm 100 GPIO_ACTIVE_HIGH>; + + pinctrl-0 =3D <&pcie_default_state>; + pinctrl-names =3D "default"; + + status =3D "okay"; +}; + +&pcie_phy { + vdda-phy-supply =3D <&vreg_l5a>; + vdda-pll-supply =3D <&vreg_l12a>; + + status =3D "okay"; +}; + +&pcie_port0 { + wifi@0 { + compatible =3D "pci17cb,1103"; + reg =3D <0x10000 0x0 0x0 0x0 0x0>; + + qcom,calibration-variant =3D "QC_QCS615_Ride"; + + vddrfacmn-supply =3D <&vreg_pmu_rfa_cmn>; + vddaon-supply =3D <&vreg_pmu_aon_0p59>; + vddwlcx-supply =3D <&vreg_pmu_wlcx_0p8>; + vddwlmx-supply =3D <&vreg_pmu_wlmx_0p85>; + vddrfa0p8-supply =3D <&vreg_pmu_rfa_0p8>; + vddrfa1p2-supply =3D <&vreg_pmu_rfa_1p2>; + vddrfa1p8-supply =3D <&vreg_pmu_rfa_1p7>; + vddpcie0p9-supply =3D <&vreg_pmu_pcie_0p9>; + vddpcie1p8-supply =3D <&vreg_pmu_pcie_1p8>; + }; +}; + +&pm8150_gpios { + usb2_en: usb2-en-state { + pins =3D "gpio10"; + function =3D "normal"; + output-enable; + power-source =3D <0>; + }; +}; + +&qupv3_id_0 { + status =3D "okay"; +}; + +&qupv3_id_1 { + status =3D "okay"; +}; + +&remoteproc_adsp { + firmware-name =3D "qcom/qcs615/adsp.mbn"; + + status =3D "okay"; +}; + +&remoteproc_cdsp { + firmware-name =3D "qcom/qcs615/cdsp.mbn"; + + status =3D "okay"; +}; + +&sdhc_1 { + pinctrl-0 =3D <&sdc1_state_on>; + pinctrl-1 =3D <&sdc1_state_off>; + pinctrl-names =3D "default", "sleep"; + + bus-width =3D <8>; + mmc-ddr-1_8v; + mmc-hs200-1_8v; + mmc-hs400-1_8v; + mmc-hs400-enhanced-strobe; + vmmc-supply =3D <&vreg_l17a>; + vqmmc-supply =3D <&vreg_s4a>; + + non-removable; + no-sd; + no-sdio; + + status =3D "okay"; +}; + +&spi6 { + status =3D "okay"; + + can@0 { + compatible =3D "microchip,mcp2515"; + reg =3D <0>; + clocks =3D <&can_osc>; + interrupts-extended =3D <&tlmm 87 IRQ_TYPE_LEVEL_LOW>; + spi-max-frequency =3D <10000000>; + vdd-supply =3D <&vreg_v3p3_can>; + xceiver-supply =3D <&vreg_v5p0_can>; + }; +}; + +&tlmm { + bt_en_state: bt-en-state { + pins =3D "gpio85"; + function =3D "gpio"; + bias-pull-down; + }; + + pcie_default_state: pcie-default-state { + clkreq-pins { + pins =3D "gpio90"; + function =3D "pcie_clk_req"; + drive-strength =3D <2>; + bias-pull-up; + }; + + perst-pins { + pins =3D "gpio89"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-pull-down; + }; + + wake-pins { + pins =3D "gpio100"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-pull-up; + }; + }; + + wifi_reg_en_pins_state: wifi-reg-en-pins-state { + pins =3D "gpio91"; + function =3D "gpio"; + drive-strength =3D <8>; + output-high; + bias-pull-up; + }; + + wlan_en_state: wlan-en-state { + pins =3D "gpio84"; + function =3D "gpio"; + drive-strength =3D <16>; + bias-pull-up; + }; +}; + +&uart0 { + status =3D "okay"; +}; + +&uart7 { + status =3D "okay"; + + bluetooth { + compatible =3D "qcom,wcn6855-bt"; + firmware-name =3D "QCA6698/hpnv21", "QCA6698/hpbtfw21.tlv"; + + vddrfacmn-supply =3D <&vreg_pmu_rfa_cmn>; + vddaon-supply =3D <&vreg_pmu_aon_0p59>; + vddwlcx-supply =3D <&vreg_pmu_wlcx_0p8>; + vddwlmx-supply =3D <&vreg_pmu_wlmx_0p85>; + vddbtcmx-supply =3D <&vreg_pmu_btcmx_0p85>; + vddrfa0p8-supply =3D <&vreg_pmu_rfa_0p8>; + vddrfa1p2-supply =3D <&vreg_pmu_rfa_1p2>; + vddrfa1p8-supply =3D <&vreg_pmu_rfa_1p7>; + }; +}; + +/* + * USB0 routing and EDL mode: + * + * The USB0 controller=E2=80=99s HS differential pair is switched (manuall= y) + * between the Micro-USB port for EDL/ADB and the on-board USB 3.0 hub. + * + * During EDL (Emergency Download) mode, the HS lines are explicitly + * routed to the Micro-USB port to allow the SoC to enter device mode + * for flashing. + * + * After EDL the switch is normally toggled so the HS lines stay + * connected to the hub=E2=80=99s Type-A downstream ports, leaving no elec= trical + * path to the Micro-USB connector =E2=80=94 therefore USB0 runs host-only= in + * normal runtime and device mode must not be advertised. + * + * USB0 is configured host-only in the base device tree; a separate + * device-tree overlay enables the Micro-USB peripheral configuration for + * ADB. For ADB to work during normal runtime the DIP switch SW1 must be + * manually toggled to the off position (reconnecting the HS pair to the + * Micro-USB port). + */ + +&usb_1 { + status =3D "okay"; +}; + +&usb_1_dwc3 { + dr_mode =3D "host"; +}; + +&usb_1_hsphy { + vdd-supply =3D <&vreg_l5a>; + vdda-pll-supply =3D <&vreg_l12a>; + vdda-phy-dpdm-supply =3D <&vreg_l13a>; + + status =3D "okay"; +}; + +&usb_2 { + status =3D "okay"; +}; + +&usb_2_dwc3 { + dr_mode =3D "host"; +}; + +&usb_2_hsphy { + vdd-supply =3D <&vreg_l5a>; + vdda-pll-supply =3D <&vreg_l12a>; + vdda-phy-dpdm-supply =3D <&vreg_l13a>; + + status =3D "okay"; +}; + +&usb_qmpphy { + vdda-phy-supply =3D <&vreg_l5a>; + vdda-pll-supply =3D <&vreg_l12a>; + + status =3D "okay"; +}; + +&usb_qmpphy_2 { + vdda-phy-supply =3D <&vreg_l11a>; + vdda-pll-supply =3D <&vreg_l5a>; + + status =3D "okay"; +}; + +&ufs_mem_hc { + reset-gpios =3D <&tlmm 123 GPIO_ACTIVE_LOW>; + vcc-supply =3D <&vreg_l17a>; + vcc-max-microamp =3D <600000>; + vccq2-supply =3D <&vreg_s4a>; + vccq2-max-microamp =3D <600000>; + + status =3D "okay"; +}; + +&ufs_mem_phy { + vdda-phy-supply =3D <&vreg_l5a>; + vdda-pll-supply =3D <&vreg_l12a>; + + status =3D "okay"; +}; + +&venus { + status =3D "okay"; +}; diff --git a/arch/arm64/boot/dts/qcom/talos-evk-usb1-peripheral.dtso b/arch= /arm64/boot/dts/qcom/talos-evk-usb1-peripheral.dtso new file mode 100644 index 000000000000..2f4630a6ba66 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/talos-evk-usb1-peripheral.dtso @@ -0,0 +1,10 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ +/dts-v1/; +/plugin/; + +&usb_1_dwc3 { + dr_mode =3D "peripheral"; +}; diff --git a/arch/arm64/boot/dts/qcom/talos-evk.dts b/arch/arm64/boot/dts/q= com/talos-evk.dts new file mode 100644 index 000000000000..af100e22beee --- /dev/null +++ b/arch/arm64/boot/dts/qcom/talos-evk.dts @@ -0,0 +1,139 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ +/dts-v1/; + +#include "talos-evk-som.dtsi" + +/ { + model =3D "Qualcomm QCS615 IQ 615 EVK"; + compatible =3D "qcom,talos-evk", "qcom,qcs615", "qcom,sm6150"; + chassis-type =3D "embedded"; + + aliases { + mmc1 =3D &sdhc_2; + }; + + dp0-connector { + compatible =3D "dp-connector"; + label =3D "DP0"; + type =3D "full-size"; + + hpd-gpios =3D <&tlmm 104 GPIO_ACTIVE_HIGH>; + + port { + dp0_connector_in: endpoint { + remote-endpoint =3D <&mdss_dp0_out>; + }; + }; + }; + + hdmi_connector: hdmi-out { + compatible =3D "hdmi-connector"; + type =3D "d"; + + port { + hdmi_con_out: endpoint { + remote-endpoint =3D <&adv7535_out>; + }; + }; + }; + + vreg_v1p8_out: regulator-v1p8-out { + compatible =3D "regulator-fixed"; + regulator-name =3D "vreg-v1p8-out"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + vin-supply =3D <&vreg_v5p0_out>; + regulator-boot-on; + regulator-always-on; + }; + + vreg_v3p3_out: regulator-v3p3-out { + compatible =3D "regulator-fixed"; + regulator-name =3D "vreg-v3p3-out"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + vin-supply =3D <&vreg_v5p0_out>; + regulator-boot-on; + regulator-always-on; + }; + + vreg_v5p0_out: regulator-v5p0-out { + compatible =3D "regulator-fixed"; + regulator-name =3D "vreg-v5p0-out"; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + regulator-boot-on; + regulator-always-on; + /* Powered by system 20V rail (USBC_VBUS_IN) */ + }; +}; + +&i2c1 { + clock-frequency =3D <400000>; + status =3D "okay"; + + hdmi_bridge: bridge@3d { + compatible =3D "adi,adv7535"; + reg =3D <0x3d>; + avdd-supply =3D <&vreg_v1p8_out>; + dvdd-supply =3D <&vreg_v1p8_out>; + pvdd-supply =3D <&vreg_v1p8_out>; + a2vdd-supply =3D <&vreg_v1p8_out>; + v3p3-supply =3D <&vreg_v3p3_out>; + interrupts-extended =3D <&tlmm 26 IRQ_TYPE_LEVEL_LOW>; + adi,dsi-lanes =3D <4>; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + + adv7535_in: endpoint { + remote-endpoint =3D <&mdss_dsi0_out>; + }; + }; + + port@1 { + reg =3D <1>; + + adv7535_out: endpoint { + remote-endpoint =3D <&hdmi_con_out>; + }; + }; + }; + }; +}; + +&mdss_dsi0_out { + remote-endpoint =3D <&adv7535_in>; + data-lanes =3D <0 1 2 3>; +}; + +&pon_pwrkey { + status =3D "okay"; +}; + +&pon_resin { + linux,code =3D ; + + status =3D "okay"; +}; + +&sdhc_2 { + pinctrl-0 =3D <&sdc2_state_on>; + pinctrl-1 =3D <&sdc2_state_off>; + pinctrl-names =3D "default", "sleep"; + + bus-width =3D <4>; + cd-gpios =3D <&tlmm 99 GPIO_ACTIVE_LOW>; + + vmmc-supply =3D <&vreg_l10a>; + vqmmc-supply =3D <&vreg_s4a>; + + status =3D "okay"; +}; --=20 2.34.1