From nobody Fri Apr 3 03:11:42 2026 Received: from out-183.mta1.migadu.com (out-183.mta1.migadu.com [95.215.58.183]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F2E3D1E1C11 for ; Tue, 17 Feb 2026 07:02:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=95.215.58.183 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771311736; cv=none; b=hZnHAaShkCmW2xSwHmkkSq+H5Nitb2C21TopFLH9IRoDFccuTF8auIE5aKw/YZLF3Ozd/I4lGoD7ZD3n343TMq7/GJeeE8T1eIduPc3iHVFbS8w9BCHr+KLGRzPIS1f5xp330mG0rjnhSIJvmzMds849flu1CMJdE3bZ9jVMcS8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771311736; c=relaxed/simple; bh=xERRjN4CaWjCqydJf2I9zpsZdided5B48f9+OvM3XY0=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=sDtzqcnpyo60/9v7i089tbnICFRAivynWBbGtSD0nfZ9iKF2wXD41cHFin+EMcHH91H6KZDKEeQNBQlYEgmwsow2iY/j1xFMlPFlimkysaiFHN8Uflw80q9vBAL+FTfycKr4q2TxkHVrZi7S5ZcNTz0z306ks7/Ff9I5GX+KUY0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=packett.cool; spf=pass smtp.mailfrom=packett.cool; dkim=pass (2048-bit key) header.d=packett.cool header.i=@packett.cool header.b=Bkls8GvO; arc=none smtp.client-ip=95.215.58.183 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=packett.cool Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=packett.cool Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=packett.cool header.i=@packett.cool header.b="Bkls8GvO" X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=packett.cool; s=key1; t=1771311732; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=nz+v6k1MMJh7TTRZHrET7LiKV1Oz+A66VZ9xkY/CTCg=; b=Bkls8GvO1a2CqbEYmMAhN05WZvdPO/XecHv6giG+yz+RgzNsmV9esbg6SGe0yXVtJU9xoJ 7/mkMLWjXFCs+4GUHCD6TfCkkcowJFcXj/yHbBVHti187XBq6wMsNjdpW++lI09aBmo+3x anTz7c3cXe9PZO2ojepqMmvM633d9X9rteOkfaCHsoJszz28dgyBr9HSPoA6S4DZ4orcnr VqgVACC1Gz4Vxt9m8gvZ1HSN/5tl1bSYdWhTEsEEHjNt47g7xcSyFcfoL2jW5KqwmpX2xL D8MrF9y8p8mLU2OQCZ+9yj5HdJ8KqTUOgJC4QmrKbHGjCbaI4kI9hlYj1ie6vw== From: Val Packett To: Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: dri-devel@lists.freedesktop.org, phone-devel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, linux-kernel@vger.kernel.org, Val Packett , devicetree@vger.kernel.org Subject: [PATCH 1/4] dt-bindings: vendor-prefixes: Add Holitech Date: Tue, 17 Feb 2026 04:00:09 -0300 Message-ID: <20260217070121.190108-2-val@packett.cool> In-Reply-To: <20260217070121.190108-1-val@packett.cool> References: <20260217070121.190108-1-val@packett.cool> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Migadu-Flow: FLOW_OUT Content-Type: text/plain; charset="utf-8" Jiangxi Holitech Technology Co., Ltd. is a manufacturer of display panels. Signed-off-by: Val Packett Acked-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Docum= entation/devicetree/bindings/vendor-prefixes.yaml index 46d0287b2cd6..646e18985a9d 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -711,6 +711,8 @@ patternProperties: description: Hitex Development Tools "^hitron,.*": description: HiTRON Electronics Corporation + "^holitech,.*": + description: Jiangxi Holitech Technology Co., Ltd. "^holt,.*": description: Holt Integrated Circuits, Inc. "^holtek,.*": --=20 2.52.0 From nobody Fri Apr 3 03:11:42 2026 Received: from out-183.mta1.migadu.com (out-183.mta1.migadu.com [95.215.58.183]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 610912327A3 for ; Tue, 17 Feb 2026 07:02:19 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=95.215.58.183 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771311741; cv=none; b=u2Rb9I8HCKHh/hgb7VdDkAt+OZgAAlMr+dIdsGn/cVbcOeSa4knKMsddzVIBfipRKNdSl5Cn3bti+quNkFbD+y+sPIlMssKZ6c1qhD6vqNgcnXl2S2x1tk3iCmcboiOPzNjI7hAKugMLGgio2tglOX3gBbGRE773/diyG4Gsw/U= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771311741; c=relaxed/simple; bh=V8h9ZYIphVmKrXI3LnFoYg8gfobz/Rfo1Y2e1pt4HLI=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=umZ90WEGCI2NwPP8/px5jMj2vgGvxnODMs1BA6TRZw9g3cJYt30PzjH5m5XBXIL0xvsOhRkRz5PKJbvWkgJHhzX11pEErVBLPbMOLZhss27JTyigd3uN9NR8Sa8w6ZX2j+FN/IuHOfT3HsXhs8Hz2YG2sNkn8X4dnhv6kuIwQ8U= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=packett.cool; spf=pass smtp.mailfrom=packett.cool; dkim=pass (2048-bit key) header.d=packett.cool header.i=@packett.cool header.b=w1L7UxZa; arc=none smtp.client-ip=95.215.58.183 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=packett.cool Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=packett.cool Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=packett.cool header.i=@packett.cool header.b="w1L7UxZa" X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=packett.cool; s=key1; t=1771311737; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=JmUvKLhNQi7xkDVEqgiTsgyG8WDxxFWnZAgXXNJS7pw=; b=w1L7UxZafmePtp2ioz5o5Rx9nX8ZkFWSxvGCVVX4dn0v8h7Mhx6gLH2yxGIdNDVIhY9xaZ CZn74iKcG457AuoELjGZ+YyBqepwJgYgpt3WroSNzgOENlYpF9cU97IH2sHe6yKNzVLE/+ Azo5YcZwnYGqqG9IrO/qZcg4PFoHHcZ4vlo9sWuR8eu8OixZaRcuUdA1w7rrpz3v2hXDtC B/zRxU38wjY6Qu2YjVcEShVbVnCoIY+de5khbraqzVYpeY9Ykms58TaZqG/LNJ7mxqY713 quXKpUN+PXDA7uFPtqfqXxab5+O+wZjPrnaMozgwbpLAiebViGkAgjpixH4VXg== From: Val Packett To: Neil Armstrong , Jessica Zhang , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Cong Yang Cc: dri-devel@lists.freedesktop.org, phone-devel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, linux-kernel@vger.kernel.org, Val Packett , devicetree@vger.kernel.org Subject: [PATCH 2/4] dt-bindings: display: panel: Add compatible for Holitech HTF065H045 Date: Tue, 17 Feb 2026 04:00:10 -0300 Message-ID: <20260217070121.190108-3-val@packett.cool> In-Reply-To: <20260217070121.190108-1-val@packett.cool> References: <20260217070121.190108-1-val@packett.cool> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Migadu-Flow: FLOW_OUT Content-Type: text/plain; charset="utf-8" Add a new compatible for the Holitech HTF065H045 panel that uses the Himax HX83102 controller IC. Signed-off-by: Val Packett Acked-by: Krzysztof Kozlowski --- .../devicetree/bindings/display/panel/himax,hx83102.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/display/panel/himax,hx83102.= yaml b/Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml index e4c1aa5deab9..66404b425af3 100644 --- a/Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml +++ b/Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml @@ -20,6 +20,8 @@ properties: - boe,nv110wum-l60 # CSOT pna957qt1-1 10.95" WUXGA TFT LCD panel - csot,pna957qt1-1 + # Holitech HTF065H045 6.517" 720x1600 TFT LCD panel + - holitech,htf065h045 # IVO t109nw41 11.0" WUXGA TFT LCD panel - ivo,t109nw41 # KINGDISPLAY KD110N11-51IE 10.95" WUXGA TFT LCD panel --=20 2.52.0 From nobody Fri Apr 3 03:11:42 2026 Received: from out-187.mta1.migadu.com (out-187.mta1.migadu.com [95.215.58.187]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D759F145348 for ; Tue, 17 Feb 2026 07:02:24 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=95.215.58.187 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771311746; cv=none; b=e6E1bEuG/XoEo9zRvPRayDmM64IDVmJo8eBDv+7fafCqcvkPO9Jum8GTDN6Dn3PyrMq6MqdthxEWxkNgHFY//t6gLUUABh09C2rOWE2xtPcaPf+1JfWUxLElbx+81oDKMhjw3gNjFUkyOZgS/QvlamQ7Dxx2gMxE72tuWeouE4k= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771311746; c=relaxed/simple; bh=dYwkhdkE1W6S4zelRNE7KHUipC43PLafhWLvqAczjuo=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=MFS8gSfKAIApOn8sCZeWOXFw/UE+/fW02H3mTnrkh5ovnQTzjBkl9mBGDLYMiYpNLE4enIMRTQb1ALy03IXK3PrjYXAzokEw6VOMzjMCFInGLDokoANJI3XYroAm5MdAK/kDjU9/s6CIKRM1KrUfDYo/ida+4CUWz+Ma0sgcDmk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=packett.cool; spf=pass smtp.mailfrom=packett.cool; dkim=pass (2048-bit key) header.d=packett.cool header.i=@packett.cool header.b=UF2/6JUt; arc=none smtp.client-ip=95.215.58.187 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=packett.cool Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=packett.cool Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=packett.cool header.i=@packett.cool header.b="UF2/6JUt" X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=packett.cool; s=key1; t=1771311742; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=QrJL52H3P+sZw3D88DjO+0Dvn3Xt8fjuAIAZXJfqjlQ=; b=UF2/6JUtQCxjTjQrY0QVkbwMgVrmbiwJNhqfvZqyK+Uj92p+neG1hqb8EK+U7CGhqRlSL5 sSbt+Jf3m7VVk8Ih6ElF8d9bnz8Gasrf46lCsizmipOXJhl7H/3zaXPZvUC5ibEl5mIA3G zZAUWrjDaNJ3fyWEfAI336Jkhkqk2CHB+snVaa7edhu++/QLfO1oCHhNV/2VC+VKb9d1KY BvPBxcnz0/HQ+OyaVCs2rCz3hQzKzQ0o2Qz61ECd8H+ZroAH9PVu7Bzk+DlmWY4YD6Sa4t QIRfSiBCuVxXAVQiAjqjwe2cgRzJEIUuKgaxDhGmUByENs1Jm26foCBWeQf3iQ== From: Val Packett To: Neil Armstrong , Jessica Zhang , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter Cc: dri-devel@lists.freedesktop.org, phone-devel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, linux-kernel@vger.kernel.org, Val Packett Subject: [PATCH 3/4] drm/panel: himax-hx83102: Add support for Holitech HTF065H045 Date: Tue, 17 Feb 2026 04:00:11 -0300 Message-ID: <20260217070121.190108-4-val@packett.cool> In-Reply-To: <20260217070121.190108-1-val@packett.cool> References: <20260217070121.190108-1-val@packett.cool> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Migadu-Flow: FLOW_OUT Content-Type: text/plain; charset="utf-8" This 720x1600 panel is found in several Motorola/Lenovo smartphones like the Moto G9 Play (guamp). The initialization sequence is based on the datasheet. Add it to the existing HX83102 panel driver. Signed-off-by: Val Packett Reviewed-by: Neil Armstrong --- drivers/gpu/drm/panel/panel-himax-hx83102.c | 86 +++++++++++++++++++++ 1 file changed, 86 insertions(+) diff --git a/drivers/gpu/drm/panel/panel-himax-hx83102.c b/drivers/gpu/drm/= panel/panel-himax-hx83102.c index 1d3bb5dca559..34e0e956db48 100644 --- a/drivers/gpu/drm/panel/panel-himax-hx83102.c +++ b/drivers/gpu/drm/panel/panel-himax-hx83102.c @@ -701,6 +701,67 @@ static int starry_2082109qfh040022_50e_init(struct hx8= 3102 *ctx) return dsi_ctx.accum_err; } =20 +static int holitech_htf065h045_init(struct hx83102 *ctx) +{ + struct mipi_dsi_multi_context dsi_ctx =3D { .dsi =3D ctx->dsi }; + + msleep(50); + + hx83102_enable_extended_cmds(&dsi_ctx, true); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETPOWER, 0x22, 0x44, 0x27= , 0x27, 0x32, + 0x52, 0x57, 0x39, 0x08, 0x08, 0x08); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETDISP, 0x00, 0x00, 0x06,= 0x40, 0x00, + 0x0e, 0xae, 0x38, 0x00, 0x00, 0x00, 0x00, 0xf4, 0xa0); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETCYC, 0x01, 0x58, 0x01, = 0x58, 0x01, + 0x58, 0x03, 0x58, 0x03, 0xff, 0x01, 0x20, 0x00, 0xff); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETPANEL, 0x02); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETGIP0, 0x00, 0x00, 0x00,= 0x00, 0x00, + 0x10, 0x00, 0x17, 0x00, 0x63, 0x37, 0x0e, 0x0e, 0x00, 0x00, + 0x32, 0x10, 0x08, 0x00, 0x08, 0x32, 0x16, 0x4e, 0x06, 0x4e); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETPWM, 0x04, 0x0c, 0xb2, = 0x01); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETGIP1, 0x24, 0x25, 0x18,= 0x18, 0x19, + 0x19, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, + 0x18, 0x18, 0x18, 0x06, 0x07, 0x04, 0x05, 0x18, 0x18, 0x18, + 0x18, 0x02, 0x03, 0x00, 0x01, 0x20, 0x21, 0x18, 0x18, 0x18, + 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETGIP2, 0x00, 0x09, 0x16,= 0x1f, 0x28, + 0x4b, 0x65, 0x6d, 0x74, 0x70, 0x89, 0x8d, 0x91, 0xa0, 0x9e, + 0xa8, 0xb2, 0xc8, 0xc9, 0x65, 0x6d, 0x78, 0x7f, 0x00, 0x09, + 0x16, 0x1f, 0x28, 0x4b, 0x65, 0x6d, 0x74, 0x70, 0x89, 0x8d, + 0x91, 0xa0, 0x9e, 0xa8, 0xb2, 0xc8, 0xc9, 0x65, 0x6d, 0x78, + 0x7f); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETTP1, 0xff, 0x14, 0x00, = 0x00); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETBANK, 0x01); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETTP1, 0x01); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETBANK, 0x02); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETGIP3, 0xff, 0xff, 0xff,= 0xff, 0xff, + 0xf0, 0xff, 0xff, 0xff, 0xff, 0xff, 0xf0); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETBANK, 0x03); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETGIP3, 0xaa, 0xaa, 0xaa,= 0xaa, 0xaa, + 0xa0, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xa0, 0xaa, 0xaa, 0xaa, + 0xaa, 0xaa, 0xa0, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xa0); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETBANK, 0x00); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETMIPI, 0x70, 0x23, 0xa8,= 0x93, 0xb2, + 0xc0, 0xc0, 0x01, 0x10, 0x00, 0x00, 0x00, 0x0d, 0x3d, 0x82, + 0x77, 0x04, 0x01, 0x04); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETBANK, 0x01); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETCLOCK, 0x01); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETBANK, 0x00); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETCLOCK, 0x00, 0x53, 0x00= , 0x02, 0x59); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETPTBA, 0xfc, 0x00, 0x04,= 0x9e, 0xf6, + 0x00, 0x5d); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETBANK, 0x02); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETCYC, 0x42, 0x00, 0x33, = 0x00, 0x33, + 0x88, 0xb3, 0x00); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETBANK, 0x00); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETPCTRL, 0x20, 0x01); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETBANK, 0x02); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETPOWER, 0x7f, 0x03, 0xf5= ); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETBANK, 0x00); + + return dsi_ctx.accum_err; +} + static const struct drm_display_mode starry_mode =3D { .clock =3D 162680, .hdisplay =3D 1200, @@ -833,6 +894,28 @@ static const struct hx83102_panel_desc starry_2082109q= fh040022_50e_desc =3D { .init =3D starry_2082109qfh040022_50e_init, }; =20 +static const struct drm_display_mode holitech_htf065h045_default_mode =3D { + .clock =3D 90720, + .hdisplay =3D 720, + .hsync_start =3D 720 + 40, + .hsync_end =3D 720 + 40 + 40, + .htotal =3D 720 + 40 + 40 + 40, + .vdisplay =3D 1600, + .vsync_start =3D 1600 + 186, + .vsync_end =3D 1600 + 186 + 2, + .vtotal =3D 1600 + 186 + 2 + 12, + .type =3D DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED, +}; + +static const struct hx83102_panel_desc holitech_htf065h045_desc =3D { + .modes =3D &holitech_htf065h045_default_mode, + .size =3D { + .width_mm =3D 68, + .height_mm =3D 151, + }, + .init =3D holitech_htf065h045_init, +}; + static int hx83102_enable(struct drm_panel *panel) { msleep(130); @@ -1069,6 +1152,9 @@ static const struct of_device_id hx83102_of_match[] = =3D { { .compatible =3D "starry,himax83102-j02", .data =3D &starry_desc }, + { .compatible =3D "holitech,htf065h045", + .data =3D &holitech_htf065h045_desc + }, { /* sentinel */ } }; MODULE_DEVICE_TABLE(of, hx83102_of_match); --=20 2.52.0 From nobody Fri Apr 3 03:11:42 2026 Received: from out-170.mta1.migadu.com (out-170.mta1.migadu.com [95.215.58.170]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EA8412C3277 for ; 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DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=packett.cool; s=key1; t=1771311747; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=CurkBCDBoSHvQL72S8wPE7bvhT/px5KQEHYARnZIZ/w=; b=iuQ5293A51Bq2wdelf03oW4hhk1/p5JYKFKoOCKDuVeAhwzi4RqrmB9KVmlk21QluJ4qMG dUilg6zZ02Kpv7K0iHoY+xPTfP4C3dk14sLn7/pYA5XJtKoB/n0KXMpIiBU7WU/FZRdYUH djt6rY2KA0Xf8bLRJg6gugTN7An/iH6Ta1kJnOb4o5IVcsqPZRKX7MDC7d9Dejo0lVOad6 4LmBhb6zfawy7SkiBtssn+YBVptjQOaafvbzFQCwNAui8Xpc67BA0j7cyHitvjtY1JPA/b QGgXmzxKS+E+k1CW1CJALL5OvzSBswD/l+YIJ9UQHJGH3p6j/ZSW9hba8HJ41A== From: Val Packett To: Neil Armstrong , Jessica Zhang , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter Cc: dri-devel@lists.freedesktop.org, phone-devel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, linux-kernel@vger.kernel.org, Val Packett Subject: [PATCH 4/4] drm/panel: himax-hx83102: Add support for DSI DCS backlight control Date: Tue, 17 Feb 2026 04:00:12 -0300 Message-ID: <20260217070121.190108-5-val@packett.cool> In-Reply-To: <20260217070121.190108-1-val@packett.cool> References: <20260217070121.190108-1-val@packett.cool> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Migadu-Flow: FLOW_OUT Content-Type: text/plain; charset="utf-8" The HTF065H045 panel based on the HX83102 controller does use DCS commands for controlling backlight brightness. Make the driver fall back to DCS when no external backlight has been defined in the device tree, like many other drivers do. Signed-off-by: Val Packett Reviewed-by: Neil Armstrong --- drivers/gpu/drm/panel/panel-himax-hx83102.c | 65 +++++++++++++++++++++ 1 file changed, 65 insertions(+) diff --git a/drivers/gpu/drm/panel/panel-himax-hx83102.c b/drivers/gpu/drm/= panel/panel-himax-hx83102.c index 34e0e956db48..8b2a68ee851e 100644 --- a/drivers/gpu/drm/panel/panel-himax-hx83102.c +++ b/drivers/gpu/drm/panel/panel-himax-hx83102.c @@ -7,6 +7,7 @@ * Based on drivers/gpu/drm/panel/panel-himax-hx8394.c */ =20 +#include #include #include #include @@ -76,6 +77,8 @@ struct hx83102_panel_desc { unsigned int height_mm; } size; =20 + bool has_backlight; + int (*init)(struct hx83102 *ctx); }; =20 @@ -913,6 +916,7 @@ static const struct hx83102_panel_desc holitech_htf065h= 045_desc =3D { .width_mm =3D 68, .height_mm =3D 151, }, + .has_backlight =3D true, .init =3D holitech_htf065h045_init, }; =20 @@ -1049,6 +1053,59 @@ static const struct drm_panel_funcs hx83102_drm_func= s =3D { .get_orientation =3D hx83102_get_orientation, }; =20 +static int hx83102_bl_update_status(struct backlight_device *bl) +{ + struct mipi_dsi_device *dsi =3D bl_get_data(bl); + u16 brightness =3D backlight_get_brightness(bl); + int ret; + + dsi->mode_flags &=3D ~MIPI_DSI_MODE_LPM; + + ret =3D mipi_dsi_dcs_set_display_brightness_large(dsi, brightness); + if (ret < 0) + return ret; + + dsi->mode_flags |=3D MIPI_DSI_MODE_LPM; + + return 0; +} + +static int hx83102_bl_get_brightness(struct backlight_device *bl) +{ + struct mipi_dsi_device *dsi =3D bl_get_data(bl); + u16 brightness; + int ret; + + dsi->mode_flags &=3D ~MIPI_DSI_MODE_LPM; + + ret =3D mipi_dsi_dcs_get_display_brightness_large(dsi, &brightness); + if (ret < 0) + return ret; + + dsi->mode_flags |=3D MIPI_DSI_MODE_LPM; + + return brightness; +} + +static const struct backlight_ops hx83102_bl_ops =3D { + .update_status =3D hx83102_bl_update_status, + .get_brightness =3D hx83102_bl_get_brightness, +}; + +static struct backlight_device * +hx83102_create_dcs_backlight(struct mipi_dsi_device *dsi) +{ + struct device *dev =3D &dsi->dev; + const struct backlight_properties props =3D { + .type =3D BACKLIGHT_RAW, + .brightness =3D 4095, + .max_brightness =3D 4095, + }; + + return devm_backlight_device_register(dev, dev_name(dev), dev, dsi, + &hx83102_bl_ops, &props); +} + static int hx83102_panel_add(struct hx83102 *ctx) { struct device *dev =3D &ctx->dsi->dev; @@ -1080,6 +1137,14 @@ static int hx83102_panel_add(struct hx83102 *ctx) if (err) return err; =20 + /* Use DSI-based backlight as fallback if available */ + if (ctx->desc->has_backlight && !ctx->base.backlight) { + ctx->base.backlight =3D hx83102_create_dcs_backlight(ctx->dsi); + if (IS_ERR(ctx->base.backlight)) + return dev_err_probe(dev, PTR_ERR(ctx->base.backlight), + "Failed to create backlight\n"); + } + ctx->base.funcs =3D &hx83102_drm_funcs; ctx->base.dev =3D &ctx->dsi->dev; =20 --=20 2.52.0