From nobody Sun Apr 5 13:26:58 2026 Received: from out-13.smtp.spacemail.com (out-13.smtp.spacemail.com [63.250.43.96]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3376E2F5A36 for ; Tue, 17 Feb 2026 21:50:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=63.250.43.96 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771365003; cv=none; b=FTMSUNd3lA7o7xo8BQZpA9xnZobMZ2Jyx360Xk5CYlBq2OetpVzXZgjMql7f8hMpAUPA4e63HoBGH2H8GQuJ9+XuylNhQnr2xNmdBbSN3gFHduXU6dPUdOCkGPmSXQfEboiy4GrOoucckGkeSPHItQNon9LkOhxMcvGyQ9+hRag= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771365003; c=relaxed/simple; bh=VVUhz8zvdbOtmRMr4903pZBKIMyDW8HDNtWn1p9X3mM=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=V4h7A+W/cSXk/QOxHn+L2er2OuhioH8LiyOgtXhKoG9WUSNNWdWA0nR6ry5SSRf9Q5HiDGIFrcaGHfoiLI4MNp+2E5Njc3MfLo47jzuNn2aWt3F0dXo6ic4cP0f9svbAFkSEjXZonc1GZAipu8Mv/Q95rjhzaip4sIGFnhP10Uk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=r-sc.ca; spf=pass smtp.mailfrom=r-sc.ca; dkim=pass (2048-bit key) header.d=r-sc.ca header.i=@r-sc.ca header.b=c+3i52pm; arc=none smtp.client-ip=63.250.43.96 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=r-sc.ca Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=r-sc.ca Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=r-sc.ca header.i=@r-sc.ca header.b="c+3i52pm" Received: from mac.pk.shawcable.net (S0106dceb699ec90f.pk.shawcable.net [24.69.43.232]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mail.spacemail.com (Postfix) with ESMTPSA id 4fFtNR3f8pz6tkM; Tue, 17 Feb 2026 21:40:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=r-sc.ca; s=spacemail; t=1771364425; bh=i2/2h3twt+ZWYOxhg0qj91iP6oQyKNIMoDg7PwtB6dM=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=c+3i52pmVkNyW4+sGHjRAOEnAUW4mTtO74haAYbbJoox6EWlBsdaj7RbUBdmQ5RKI orodcK38f86+s0uOfrepwndtxpDojsN1ZkRVMDHxQ5Xjs1rvZNTm1rFz0/mF75AoUd yoUmGS1DBHppy43DT+RpIHZ8BlvT4kIUUuyrPSLJ7r7EhBiFzJkZeLB50mp+ryxPtb zaG0EuL/NI3qkf2RcPm9khtaHxypJzePhW0AQKg+pe/jt4qoxhDn/LfHJXbqev0HOM jn1U4mHjZXYHxJ1GScoOLR+nQGMilhjnU3nz96K2OmqZifZYs7dIH/JVvT54US96gI 0y/iaPqicVMxg== From: Ross Cawston Date: Tue, 17 Feb 2026 13:39:51 -0800 Subject: [PATCH 3/5] accel/rocket: Add per-task flags and interrupt mask to UAPI and kernel Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260217-accel-rocket-clean-base-v1-3-d72354325a25@r-sc.ca> References: <20260217-accel-rocket-clean-base-v1-0-d72354325a25@r-sc.ca> In-Reply-To: <20260217-accel-rocket-clean-base-v1-0-d72354325a25@r-sc.ca> To: Tomeu Vizoso , Oded Gabbay , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Ross Cawston X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1771364416; l=2842; i=ross@r-sc.ca; s=20260217; h=from:subject:message-id; bh=VVUhz8zvdbOtmRMr4903pZBKIMyDW8HDNtWn1p9X3mM=; b=7tce/8rUj1Ez3tX+T0SIKAC4ZjopLXBhKwyEg/mnXfYPbXVkyXtt0l7pOSnWi/5X8wFa+LuQF exqoacfWxmIDe5Hp+IvpGz4nIOCjAVZXaGhivB9am17tl9QULoUmh0E X-Developer-Key: i=ross@r-sc.ca; a=ed25519; pk=c50mfTDLKsgS2tlqXEZEvb/VGiLvxjsLOw5M50DxhtM= X-Envelope-From: ross@r-sc.ca Add two new fields to struct drm_rocket_task (UAPI) and struct rocket_task (kernel): - u32 int_mask: which block completion interrupt(s) should signal task done - u32 flags: currently only ROCKET_TASK_SKIP_CNA_CORE In rocket_copy_tasks(): - copy the new fields - default int_mask to DPU_0 | DPU_1 when userspace passes zero (backward co= mpatible) No functional change yet - old userspace continues to work unchanged. Signed-off-by: Ross Cawston --- drivers/accel/rocket/rocket_job.c | 8 ++++++++ drivers/accel/rocket/rocket_job.h | 2 ++ include/uapi/drm/rocket_accel.h | 25 +++++++++++++++++++++++++ 3 files changed, 35 insertions(+) diff --git a/drivers/accel/rocket/rocket_job.c b/drivers/accel/rocket/rocke= t_job.c index 369b60805d5f..34898084cc56 100644 --- a/drivers/accel/rocket/rocket_job.c +++ b/drivers/accel/rocket/rocket_job.c @@ -96,6 +96,14 @@ rocket_copy_tasks(struct drm_device *dev, =20 rjob->tasks[i].regcmd =3D task.regcmd; rjob->tasks[i].regcmd_count =3D task.regcmd_count; + rjob->tasks[i].int_mask =3D task.int_mask; + rjob->tasks[i].flags =3D task.flags; + + /* Default to DPU completion if no mask specified */ + if (!rjob->tasks[i].int_mask) { + rjob->tasks[i].int_mask =3D PC_INTERRUPT_MASK_DPU_0 | + PC_INTERRUPT_MASK_DPU_1; + } } =20 return 0; diff --git a/drivers/accel/rocket/rocket_job.h b/drivers/accel/rocket/rocke= t_job.h index 4ae00feec3b9..6931dfed8615 100644 --- a/drivers/accel/rocket/rocket_job.h +++ b/drivers/accel/rocket/rocket_job.h @@ -13,6 +13,8 @@ struct rocket_task { u64 regcmd; u32 regcmd_count; + u32 int_mask; + u32 flags; }; =20 struct rocket_job { diff --git a/include/uapi/drm/rocket_accel.h b/include/uapi/drm/rocket_acce= l.h index d0685e372b79..ae0d8e48afcd 100644 --- a/include/uapi/drm/rocket_accel.h +++ b/include/uapi/drm/rocket_accel.h @@ -90,6 +90,11 @@ struct drm_rocket_fini_bo { __u32 reserved; }; =20 +/** + * Flags for drm_rocket_task.flags + */ +#define ROCKET_TASK_SKIP_CNA_CORE 0x1 + /** * struct drm_rocket_task - A task to be run on the NPU * @@ -106,6 +111,26 @@ struct drm_rocket_task { * buffer */ __u32 regcmd_count; + + /** + * Input: Interrupt mask specifying which block completion signals + * that this task is done. Uses PC_INTERRUPT_MASK_* bits. + * + * For conv/DPU tasks: DPU_0 | DPU_1 (0x0300) + * For PPU tasks: PPU_0 | PPU_1 (0x0C00) + * + * If zero, defaults to DPU_0 | DPU_1 for backwards compatibility. + */ + __u32 int_mask; + + /** + * Input: Task flags. + * + * ROCKET_TASK_SKIP_CNA_CORE: Skip CNA and Core S_POINTER MMIO + * writes for this task. Used for standalone DPU element-wise + * and PPU pooling tasks that don't use CNA/Core. + */ + __u32 flags; }; =20 /** --=20 2.52.0