From nobody Fri Apr 3 04:52:59 2026 Received: from out-03.smtp.spacemail.com (out-03.smtp.spacemail.com [63.250.43.88]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E91AE2F5491 for ; Tue, 17 Feb 2026 21:50:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=63.250.43.88 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771365002; cv=none; b=s1lwNNPSJeMEeZuTUq/ubibTs+LnEtn7nLb9RdsodLdSG90HTeQau5gvmAJ15oaq7XCmQxfM7z3nPy0RQpgBSSWU5ctH0axnbznv7TKLOFmYXEOY2NZSqraHCXZXsk243UDTK00f+YVt4vHkp2oWWsbuvNljQlxhEWt1UweJnuQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771365002; c=relaxed/simple; bh=ZmP9RgOUTYIiHlUT4V9Yl0L96rep3kPBiWGlpC11Vy8=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=nBadACxNzrAwMMhcQYSrSe6NbJxLAUvXzOD7KUPYVN9VKpFqoyKTqaZ309DFFxbDLs9jv7bcDvmh581KfX4HhHG3CC9vSdE6fQW1cCojNI00yHssd5Bu7HWHnJBl4V/lFhNzwQ+EsYvGhi3PH67jumUiWRoH1TepSMqQPIHa58E= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=r-sc.ca; spf=pass smtp.mailfrom=r-sc.ca; dkim=pass (2048-bit key) header.d=r-sc.ca header.i=@r-sc.ca header.b=B+61kZd7; arc=none smtp.client-ip=63.250.43.88 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=r-sc.ca Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=r-sc.ca Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=r-sc.ca header.i=@r-sc.ca header.b="B+61kZd7" Received: from mac.pk.shawcable.net (S0106dceb699ec90f.pk.shawcable.net [24.69.43.232]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mail.spacemail.com (Postfix) with ESMTPSA id 4fFtNM04RYz6tkM; Tue, 17 Feb 2026 21:40:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=r-sc.ca; s=spacemail; t=1771364420; bh=C1++cyFjnAcOq78eiBHr2N5hpkpKmBO2ac0BHicm6JM=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=B+61kZd7qjgKiLtwV+4zd3QlnWvt3hd1n0P3ywMf8a4MJV5Kyf33RzqoYt6uxrN+k +amNd0sCWYYVeA9u0MS1eMw5pLKWi4KwLFBWsIQtrLFU4efVeVRZA+7jf7C5yxL2bJ 6g8mydI9EOL8SLskM5KcSLFMBqAdoufZxLj8ZNKPQC8qT9rEcpB41vLJokOsmkHhJ9 dTXRqejYGEFNDBHvw71EO0e44XkuH0XeYpCveyRgFEoxLos1LnImYrcsxEdKA06n5E O/aw12cMU4hjnY6lwfZq7ZE9lkL5l5HGl9E/7fb1rJktue1Mm4CoTbUekeryN4tSac mpaXZNurgyTLg== From: Ross Cawston Date: Tue, 17 Feb 2026 13:39:49 -0800 Subject: [PATCH 1/5] accel/rocket: Fix error path in BO creation Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260217-accel-rocket-clean-base-v1-1-d72354325a25@r-sc.ca> References: <20260217-accel-rocket-clean-base-v1-0-d72354325a25@r-sc.ca> In-Reply-To: <20260217-accel-rocket-clean-base-v1-0-d72354325a25@r-sc.ca> To: Tomeu Vizoso , Oded Gabbay , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Ross Cawston X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1771364416; l=775; i=ross@r-sc.ca; s=20260217; h=from:subject:message-id; bh=ZmP9RgOUTYIiHlUT4V9Yl0L96rep3kPBiWGlpC11Vy8=; b=WmmfmKgGcn/cs693cF97YX5MbBU4smuQH1A1q2cPLJS3Du86Iokg3YWAKoLwrBsMrUC9t5B3d sh5apspTYygBrv4oVuS+qJe1//CFkW1qZLHRtPoPABbb4etJXetb/fR X-Developer-Key: i=ross@r-sc.ca; a=ed25519; pk=c50mfTDLKsgS2tlqXEZEvb/VGiLvxjsLOw5M50DxhtM= X-Envelope-From: ross@r-sc.ca Check the return value of iommu_map_sgtable() after releasing the mm_lock. Previously an error would be silently ignored. Signed-off-by: Ross Cawston --- drivers/accel/rocket/rocket_gem.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/accel/rocket/rocket_gem.c b/drivers/accel/rocket/rocke= t_gem.c index 624c4ecf5a34..db1ff3544af2 100644 --- a/drivers/accel/rocket/rocket_gem.c +++ b/drivers/accel/rocket/rocket_gem.c @@ -95,6 +95,8 @@ int rocket_ioctl_create_bo(struct drm_device *dev, void *= data, struct drm_file * rkt_obj->size, PAGE_SIZE, 0, 0); mutex_unlock(&rocket_priv->mm_lock); + if (ret) + goto err; =20 ret =3D iommu_map_sgtable(rocket_priv->domain->domain, rkt_obj->mm.start, --=20 2.52.0 From nobody Fri Apr 3 04:52:59 2026 Received: from out-03.smtp.spacemail.com (out-03.smtp.spacemail.com [63.250.43.88]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5823C2FBDF5 for ; Tue, 17 Feb 2026 21:50:01 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=63.250.43.88 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771365002; cv=none; b=FYGVQRz1ChCsXY18kVyOlgqxJETKRa1uG8XUqPKde6bjXH8VanLz9ufXoqXSYsL5Hnsa66DEwDZK9rMcAKZof1Jihiyc6QkIODvmJ2LZ5FV6merIXFEgmPnCRSmlAYvbocFDVakvfQJJ5hZNPcRlieHk6MSSQqdHPScOHKEUzVY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771365002; c=relaxed/simple; bh=Cb4+IVDkbQUsrtBc50YqMxFErQMDOR9dE7jYs8FPuWs=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=R7NFHEfJfEGoidm7DijzP3xiaKDYAaZfzhOCqG+J9WSgl+173ZejZiRnoFjmll7nmgHZ5dfxnWJAd6sHnGt/ZKiz21Cp9HpLAbnrVBrDm/QoyG2X7UYD2d3YPHbuUu9HztgGE2DQ+q1kcRgFz0aS48OG/AcZVxcthfcVgHfYJZs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=r-sc.ca; spf=pass smtp.mailfrom=r-sc.ca; dkim=pass (2048-bit key) header.d=r-sc.ca header.i=@r-sc.ca header.b=HxDxg4Vk; arc=none smtp.client-ip=63.250.43.88 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=r-sc.ca Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=r-sc.ca Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=r-sc.ca header.i=@r-sc.ca header.b="HxDxg4Vk" Received: from mac.pk.shawcable.net (S0106dceb699ec90f.pk.shawcable.net [24.69.43.232]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mail.spacemail.com (Postfix) with ESMTPSA id 4fFtNP1yfGz6tkL; Tue, 17 Feb 2026 21:40:21 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=r-sc.ca; s=spacemail; t=1771364423; bh=oTz3oWFK5OfP2qYkAaOru18NOUe5Uc5v0FwjeqftcXk=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=HxDxg4VkycB2TqNC+bUIRp4nMiYINiBSVkq80kIhsOZ7ilCk6Jfxi3RYEfi6e45pu HYHVxxpQ0eeqbLMohzrUUYeh7vBTesqisaass1NA8mXBeUEu9Wei6Ojqpzh0LQrTX2 pG3l12j/V/yxU98KgkpX6wapBAMHNM/YIZlJerVFhx0lq+ehLJEqM+KjtBowuez0xh 8AQTunrWCHk+6eJsKVEqJk3D555553BuWkCHsab2SQrgqP2RTDqE8xM6Y0hO8jaKve VayHMHx9KmGReyY1kl53e4wX57jr+rhnsz+gOkXfdw3N9f2jxHuAWyclogg5yFYHIi AsWLprdXsUlvQ== From: Ross Cawston Date: Tue, 17 Feb 2026 13:39:50 -0800 Subject: [PATCH 2/5] accel/rocket: Enable ping-pong mode only for multi-task jobs Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260217-accel-rocket-clean-base-v1-2-d72354325a25@r-sc.ca> References: <20260217-accel-rocket-clean-base-v1-0-d72354325a25@r-sc.ca> In-Reply-To: <20260217-accel-rocket-clean-base-v1-0-d72354325a25@r-sc.ca> To: Tomeu Vizoso , Oded Gabbay , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Ross Cawston X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1771364416; l=1192; i=ross@r-sc.ca; s=20260217; h=from:subject:message-id; bh=Cb4+IVDkbQUsrtBc50YqMxFErQMDOR9dE7jYs8FPuWs=; b=kgV09ggsxo5ywlguj5jWKWb/WbBAvwB77ZRO5dWWnXtIeQV1nOhqsXh7n4fUUlfxyrg/OTmQi LKUIGFFWzzcCK+8X0UtBix1CHw8nPF9FNXp53t0Hn/5B4pdmGsSObB5 X-Developer-Key: i=ross@r-sc.ca; a=ed25519; pk=c50mfTDLKsgS2tlqXEZEvb/VGiLvxjsLOw5M50DxhtM= X-Envelope-From: ross@r-sc.ca Ping-pong mode (PC_TASK_CON_TASK_PP_EN) is required for chaining multiple tasks in a job, but is unnecessary overhead for single-task jobs. Set it conditionally based on job->task_count to avoid pointless buffer management cycles and slightly reduce per-job latency/power on simple workloads. No functional change or risk of corruption for existing jobs - backward compatible. Signed-off-by: Ross Cawston --- drivers/accel/rocket/rocket_job.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/accel/rocket/rocket_job.c b/drivers/accel/rocket/rocke= t_job.c index acd606160dc9..369b60805d5f 100644 --- a/drivers/accel/rocket/rocket_job.c +++ b/drivers/accel/rocket/rocket_job.c @@ -143,7 +143,7 @@ static void rocket_job_hw_submit(struct rocket_core *co= re, struct rocket_job *jo rocket_pc_writel(core, TASK_CON, PC_TASK_CON_RESERVED_0(1) | PC_TASK_CON_TASK_COUNT_CLEAR(1) | PC_TASK_CON_TASK_NUMBER(1) | - PC_TASK_CON_TASK_PP_EN(1)); + PC_TASK_CON_TASK_PP_EN(job->task_count > 1 ? 1 : 0)); =20 rocket_pc_writel(core, TASK_DMA_BASE_ADDR, PC_TASK_DMA_BASE_ADDR_DMA_BASE= _ADDR(0x0)); =20 --=20 2.52.0 From nobody Fri Apr 3 04:52:59 2026 Received: from out-13.smtp.spacemail.com (out-13.smtp.spacemail.com [63.250.43.96]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3376E2F5A36 for ; Tue, 17 Feb 2026 21:50:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=63.250.43.96 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771365003; cv=none; b=FTMSUNd3lA7o7xo8BQZpA9xnZobMZ2Jyx360Xk5CYlBq2OetpVzXZgjMql7f8hMpAUPA4e63HoBGH2H8GQuJ9+XuylNhQnr2xNmdBbSN3gFHduXU6dPUdOCkGPmSXQfEboiy4GrOoucckGkeSPHItQNon9LkOhxMcvGyQ9+hRag= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771365003; c=relaxed/simple; bh=VVUhz8zvdbOtmRMr4903pZBKIMyDW8HDNtWn1p9X3mM=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=V4h7A+W/cSXk/QOxHn+L2er2OuhioH8LiyOgtXhKoG9WUSNNWdWA0nR6ry5SSRf9Q5HiDGIFrcaGHfoiLI4MNp+2E5Njc3MfLo47jzuNn2aWt3F0dXo6ic4cP0f9svbAFkSEjXZonc1GZAipu8Mv/Q95rjhzaip4sIGFnhP10Uk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=r-sc.ca; spf=pass smtp.mailfrom=r-sc.ca; dkim=pass (2048-bit key) header.d=r-sc.ca header.i=@r-sc.ca header.b=c+3i52pm; arc=none smtp.client-ip=63.250.43.96 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=r-sc.ca Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=r-sc.ca Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=r-sc.ca header.i=@r-sc.ca header.b="c+3i52pm" Received: from mac.pk.shawcable.net (S0106dceb699ec90f.pk.shawcable.net [24.69.43.232]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mail.spacemail.com (Postfix) with ESMTPSA id 4fFtNR3f8pz6tkM; Tue, 17 Feb 2026 21:40:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=r-sc.ca; s=spacemail; t=1771364425; bh=i2/2h3twt+ZWYOxhg0qj91iP6oQyKNIMoDg7PwtB6dM=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=c+3i52pmVkNyW4+sGHjRAOEnAUW4mTtO74haAYbbJoox6EWlBsdaj7RbUBdmQ5RKI orodcK38f86+s0uOfrepwndtxpDojsN1ZkRVMDHxQ5Xjs1rvZNTm1rFz0/mF75AoUd yoUmGS1DBHppy43DT+RpIHZ8BlvT4kIUUuyrPSLJ7r7EhBiFzJkZeLB50mp+ryxPtb zaG0EuL/NI3qkf2RcPm9khtaHxypJzePhW0AQKg+pe/jt4qoxhDn/LfHJXbqev0HOM jn1U4mHjZXYHxJ1GScoOLR+nQGMilhjnU3nz96K2OmqZifZYs7dIH/JVvT54US96gI 0y/iaPqicVMxg== From: Ross Cawston Date: Tue, 17 Feb 2026 13:39:51 -0800 Subject: [PATCH 3/5] accel/rocket: Add per-task flags and interrupt mask to UAPI and kernel Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260217-accel-rocket-clean-base-v1-3-d72354325a25@r-sc.ca> References: <20260217-accel-rocket-clean-base-v1-0-d72354325a25@r-sc.ca> In-Reply-To: <20260217-accel-rocket-clean-base-v1-0-d72354325a25@r-sc.ca> To: Tomeu Vizoso , Oded Gabbay , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Ross Cawston X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1771364416; l=2842; i=ross@r-sc.ca; s=20260217; h=from:subject:message-id; bh=VVUhz8zvdbOtmRMr4903pZBKIMyDW8HDNtWn1p9X3mM=; b=7tce/8rUj1Ez3tX+T0SIKAC4ZjopLXBhKwyEg/mnXfYPbXVkyXtt0l7pOSnWi/5X8wFa+LuQF exqoacfWxmIDe5Hp+IvpGz4nIOCjAVZXaGhivB9am17tl9QULoUmh0E X-Developer-Key: i=ross@r-sc.ca; a=ed25519; pk=c50mfTDLKsgS2tlqXEZEvb/VGiLvxjsLOw5M50DxhtM= X-Envelope-From: ross@r-sc.ca Add two new fields to struct drm_rocket_task (UAPI) and struct rocket_task (kernel): - u32 int_mask: which block completion interrupt(s) should signal task done - u32 flags: currently only ROCKET_TASK_SKIP_CNA_CORE In rocket_copy_tasks(): - copy the new fields - default int_mask to DPU_0 | DPU_1 when userspace passes zero (backward co= mpatible) No functional change yet - old userspace continues to work unchanged. Signed-off-by: Ross Cawston --- drivers/accel/rocket/rocket_job.c | 8 ++++++++ drivers/accel/rocket/rocket_job.h | 2 ++ include/uapi/drm/rocket_accel.h | 25 +++++++++++++++++++++++++ 3 files changed, 35 insertions(+) diff --git a/drivers/accel/rocket/rocket_job.c b/drivers/accel/rocket/rocke= t_job.c index 369b60805d5f..34898084cc56 100644 --- a/drivers/accel/rocket/rocket_job.c +++ b/drivers/accel/rocket/rocket_job.c @@ -96,6 +96,14 @@ rocket_copy_tasks(struct drm_device *dev, =20 rjob->tasks[i].regcmd =3D task.regcmd; rjob->tasks[i].regcmd_count =3D task.regcmd_count; + rjob->tasks[i].int_mask =3D task.int_mask; + rjob->tasks[i].flags =3D task.flags; + + /* Default to DPU completion if no mask specified */ + if (!rjob->tasks[i].int_mask) { + rjob->tasks[i].int_mask =3D PC_INTERRUPT_MASK_DPU_0 | + PC_INTERRUPT_MASK_DPU_1; + } } =20 return 0; diff --git a/drivers/accel/rocket/rocket_job.h b/drivers/accel/rocket/rocke= t_job.h index 4ae00feec3b9..6931dfed8615 100644 --- a/drivers/accel/rocket/rocket_job.h +++ b/drivers/accel/rocket/rocket_job.h @@ -13,6 +13,8 @@ struct rocket_task { u64 regcmd; u32 regcmd_count; + u32 int_mask; + u32 flags; }; =20 struct rocket_job { diff --git a/include/uapi/drm/rocket_accel.h b/include/uapi/drm/rocket_acce= l.h index d0685e372b79..ae0d8e48afcd 100644 --- a/include/uapi/drm/rocket_accel.h +++ b/include/uapi/drm/rocket_accel.h @@ -90,6 +90,11 @@ struct drm_rocket_fini_bo { __u32 reserved; }; =20 +/** + * Flags for drm_rocket_task.flags + */ +#define ROCKET_TASK_SKIP_CNA_CORE 0x1 + /** * struct drm_rocket_task - A task to be run on the NPU * @@ -106,6 +111,26 @@ struct drm_rocket_task { * buffer */ __u32 regcmd_count; + + /** + * Input: Interrupt mask specifying which block completion signals + * that this task is done. Uses PC_INTERRUPT_MASK_* bits. + * + * For conv/DPU tasks: DPU_0 | DPU_1 (0x0300) + * For PPU tasks: PPU_0 | PPU_1 (0x0C00) + * + * If zero, defaults to DPU_0 | DPU_1 for backwards compatibility. + */ + __u32 int_mask; + + /** + * Input: Task flags. + * + * ROCKET_TASK_SKIP_CNA_CORE: Skip CNA and Core S_POINTER MMIO + * writes for this task. Used for standalone DPU element-wise + * and PPU pooling tasks that don't use CNA/Core. + */ + __u32 flags; }; =20 /** --=20 2.52.0 From nobody Fri Apr 3 04:52:59 2026 Received: from out-13.smtp.spacemail.com (out-13.smtp.spacemail.com [63.250.43.96]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0983D28CF6F for ; Tue, 17 Feb 2026 21:40:28 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=63.250.43.96 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771364430; cv=none; b=KRjzHcNFyzfFtSlBCoFTQD40eHUVo1BgAYzf4nACX6fbqzDAcD/JdWV5d3Yc6kUE+yePSb75QaarxrPgSK5NXqMKB0LNyDJroFf6zkI0C1ATr7tmBL3kTX23L/W/5KhE6feb22+YoORqyt0KMKc/5ouizsAobOkS7E/5meSzt4c= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771364430; c=relaxed/simple; bh=O8dvO9jPl5/KKxBPfvLRBDq6Xf6UbiLZvL/YK3iBv6E=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=px1eQ5cFCfchJ7ZdfgE0kyxQl3/dC3NY9yg1QFwW0Tv/SQdjN9MfitmoKt+8CNwta0cgt9LtR3E5qCFbmAuDCkXwQWJYv/6+L7QKDVHHEUW6qPxPiaw9BIjyIgY5T6A+WecDdYMK0X7gOLXA3ZHioXRIY/d3+dgSY9sf/N6rOh8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=r-sc.ca; spf=pass smtp.mailfrom=r-sc.ca; dkim=pass (2048-bit key) header.d=r-sc.ca header.i=@r-sc.ca header.b=eNv5WZ30; arc=none smtp.client-ip=63.250.43.96 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=r-sc.ca Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=r-sc.ca Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=r-sc.ca header.i=@r-sc.ca header.b="eNv5WZ30" Received: from mac.pk.shawcable.net (S0106dceb699ec90f.pk.shawcable.net [24.69.43.232]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mail.spacemail.com (Postfix) with ESMTPSA id 4fFtNT5Q57z6tkL; Tue, 17 Feb 2026 21:40:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=r-sc.ca; s=spacemail; t=1771364427; bh=I99tBoI9TXIsELu4UV+lme4CdAPu87/8INed4CLN2Xc=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=eNv5WZ309Xa1dp3x4ZA8q8+PncDehOESp9osofBRzyx9aaRASOJxXC3C3SfJ0tcGL IMw9hleVIxPWBRSchSJuMAEv7uoQBCtTlygEMBY7BIvwJ2btipId7KAQMs0WOGoOfK NW25zRpzP7o8OuHIgTToNa01h2FqCEo3pkApVpfYKHxDIE9LukuY77Bh4YJQF2o/DC DeBprkYjEYSe9Ugcc0mKQLJPGvvFACdO6H22vtg8RsXKsT1aUDRQa1MS7TZVqtJKJj UkGDgY5JgHvOw3tleHPfYiVw6XscpcKHdSCegGp44sAFUSyBsqDTeEIzgL7jVQxOkK S+8e3JJkArDpA== From: Ross Cawston Date: Tue, 17 Feb 2026 13:39:52 -0800 Subject: [PATCH 4/5] accel/rocket: Skip CNA/Core S_POINTER initialization for standalone tasks Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260217-accel-rocket-clean-base-v1-4-d72354325a25@r-sc.ca> References: <20260217-accel-rocket-clean-base-v1-0-d72354325a25@r-sc.ca> In-Reply-To: <20260217-accel-rocket-clean-base-v1-0-d72354325a25@r-sc.ca> To: Tomeu Vizoso , Oded Gabbay , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Ross Cawston X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1771364416; l=3130; i=ross@r-sc.ca; s=20260217; h=from:subject:message-id; bh=O8dvO9jPl5/KKxBPfvLRBDq6Xf6UbiLZvL/YK3iBv6E=; b=FUfnHHgYQ3mGQnnW03s2TeWiOl5l1ePobjC4leeQItxLJwGfzksgx9brJvYAl5DJ2/76Aq+AY T+UM3Hbb4U1Ct3zp8s1xBnAkYKNeCrnFbOuJRL0E8tfH05IYu/ocZS5 X-Developer-Key: i=ross@r-sc.ca; a=ed25519; pk=c50mfTDLKsgS2tlqXEZEvb/VGiLvxjsLOw5M50DxhtM= X-Envelope-From: ross@r-sc.ca Standalone DPU (element-wise) and PPU (pooling, etc.) tasks do not use the CNA or Core blocks. Writing S_POINTER to those blocks re-arms them with stale/uninitialized state, leading to corruption. Introduce ROCKET_TASK_SKIP_CNA_CORE flag (added in previous patch) so userspace can indicate such tasks. When set, skip the CNA and Core S_POINTER MMIO writes. Also move the per-core extra bit (bit 28 =C3=97 core index) inside the same conditional - it is only needed when CNA/Core are actually used. Signed-off-by: Ross Cawston --- drivers/accel/rocket/rocket_job.c | 41 +++++++++++++++++++++++++++--------= ---- 1 file changed, 29 insertions(+), 12 deletions(-) diff --git a/drivers/accel/rocket/rocket_job.c b/drivers/accel/rocket/rocke= t_job.c index 34898084cc56..1dcc0c945f7f 100644 --- a/drivers/accel/rocket/rocket_job.c +++ b/drivers/accel/rocket/rocket_job.c @@ -116,7 +116,6 @@ rocket_copy_tasks(struct drm_device *dev, static void rocket_job_hw_submit(struct rocket_core *core, struct rocket_j= ob *job) { struct rocket_task *task; - unsigned int extra_bit; =20 /* Don't queue the job if a reset is in progress */ if (atomic_read(&core->reset.pending)) @@ -129,17 +128,35 @@ static void rocket_job_hw_submit(struct rocket_core *= core, struct rocket_job *jo =20 rocket_pc_writel(core, BASE_ADDRESS, 0x1); =20 - /* From rknpu, in the TRM this bit is marked as reserved */ - extra_bit =3D 0x10000000 * core->index; - rocket_cna_writel(core, S_POINTER, CNA_S_POINTER_POINTER_PP_EN(1) | - CNA_S_POINTER_EXECUTER_PP_EN(1) | - CNA_S_POINTER_POINTER_PP_MODE(1) | - extra_bit); - - rocket_core_writel(core, S_POINTER, CORE_S_POINTER_POINTER_PP_EN(1) | - CORE_S_POINTER_EXECUTER_PP_EN(1) | - CORE_S_POINTER_POINTER_PP_MODE(1) | - extra_bit); + /* + * Initialize CNA and Core S_POINTER for ping-pong mode via MMIO. + * + * Each core needs a per-core extra_bit (bit 28 * core_index) which + * the TRM marks as reserved but the BSP rknpu driver sets. Without + * it, non-zero cores hang. This MUST be done via MMIO (not regcmd) + * because userspace doesn't know which core the scheduler picks. + * + * For standalone DPU/PPU tasks (element-wise ops, pooling), CNA + * and Core have no work. Writing their S_POINTERs would re-arm + * them with stale state from the previous conv task, corrupting + * the DPU/PPU output. Userspace signals this via the + * ROCKET_TASK_SKIP_CNA_CORE flag. + */ + if (!(task->flags & ROCKET_TASK_SKIP_CNA_CORE)) { + unsigned int extra_bit =3D 0x10000000 * core->index; + + rocket_cna_writel(core, S_POINTER, + CNA_S_POINTER_POINTER_PP_EN(1) | + CNA_S_POINTER_EXECUTER_PP_EN(1) | + CNA_S_POINTER_POINTER_PP_MODE(1) | + extra_bit); + + rocket_core_writel(core, S_POINTER, + CORE_S_POINTER_POINTER_PP_EN(1) | + CORE_S_POINTER_EXECUTER_PP_EN(1) | + CORE_S_POINTER_POINTER_PP_MODE(1) | + extra_bit); + } =20 rocket_pc_writel(core, BASE_ADDRESS, task->regcmd); rocket_pc_writel(core, REGISTER_AMOUNTS, --=20 2.52.0 From nobody Fri Apr 3 04:52:59 2026 Received: from out-13.smtp.spacemail.com (out-13.smtp.spacemail.com [63.250.43.96]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B299E2F4A19 for ; Tue, 17 Feb 2026 21:40:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=63.250.43.96 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771364431; cv=none; b=eASa6JkJyWp8WyX+plFksGHg1mNwMVlcusU7RWsghdUF7A8SgvMh2dK8ce+srmerV94MjBipCZA+lFQLEx6Qky7BybMOISP2ZwP1Vt1mhhB+jjwtJD87ALDp/gYRECuInK9rAUIbkpFUyKcUrYFiLDO+SieKoMURE92GesoBe6E= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771364431; c=relaxed/simple; bh=HWs1IC84v/YwZQbKpNwoGA0gGWlv8oAPh64TkdQpIug=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=U0dQHazJJJk/norK+NI2YV4n0LdBovvvYZrv+jHrjuQZ4l6pl1lQqVUoNR3ZdswkZHDN8wdtRW+EX3n1PBgCcllN83/tVGwQWZWsf2loZF16YcrsjrwQfCrAKXUYlZEcUsbcuN48Q1zh2SY40pYpofFcEjK+cVMiOmBNuH1sBhM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=r-sc.ca; spf=pass smtp.mailfrom=r-sc.ca; dkim=pass (2048-bit key) header.d=r-sc.ca header.i=@r-sc.ca header.b=M7VU6osu; arc=none smtp.client-ip=63.250.43.96 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=r-sc.ca Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=r-sc.ca Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=r-sc.ca header.i=@r-sc.ca header.b="M7VU6osu" Received: from mac.pk.shawcable.net (S0106dceb699ec90f.pk.shawcable.net [24.69.43.232]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mail.spacemail.com (Postfix) with ESMTPSA id 4fFtNX09XLz6tkL; Tue, 17 Feb 2026 21:40:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=r-sc.ca; s=spacemail; t=1771364429; bh=5Uwy6bs1Cu3Ac5nEuDpfkKyR0IflWXmYqx0YiyUoMG8=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=M7VU6osuYR6HrU3vBA9eg5GVCmLkn7ea8rhTEYrz9abHI5NTraXwc30RLt8WCXT+c PdyzAFlGLMwYfaio8MnsGdqumgJf/X7nsdQmtUd6h8+zR7H18kyNbq6DUk5eixaUWi +gY4X7iwjBw+p+8jBPQLR9wxXv1t4ga7cdf+ApS7E0ZZMqsThuJMijPMK9I5fIEMz7 d2FOsCJGKkQer58CCusZDisLhFbf4SdE8KMqAzteISVBp6Z8k+mcR6g6gb5tlAOQXr +oiFfSTscMxpOVnIsKqgx0L6dmmtW5Fjh6WjSXvy6EYVgmRQ6sUCtyFOjHTVCapCFc BQRXiuozzwXqA== From: Ross Cawston Date: Tue, 17 Feb 2026 13:39:53 -0800 Subject: [PATCH 5/5] accel/rocket: Use per-task interrupt mask and handle PPU completion interrupts Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260217-accel-rocket-clean-base-v1-5-d72354325a25@r-sc.ca> References: <20260217-accel-rocket-clean-base-v1-0-d72354325a25@r-sc.ca> In-Reply-To: <20260217-accel-rocket-clean-base-v1-0-d72354325a25@r-sc.ca> To: Tomeu Vizoso , Oded Gabbay , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Ross Cawston X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1771364416; l=2929; i=ross@r-sc.ca; s=20260217; h=from:subject:message-id; bh=HWs1IC84v/YwZQbKpNwoGA0gGWlv8oAPh64TkdQpIug=; b=0rgR3wqnVOIYyoNpDkvr/gy3tbo9wKUJ9qM52KuhTyctnPeFJa4yPynjJ/VXvSIOmrmk+l+sr v8eOz6MDQ5RBZbDHgb3VWeRKXUur3aLY6dY+d1SOOl+8LhM964SPt8k X-Developer-Key: i=ross@r-sc.ca; a=ed25519; pk=c50mfTDLKsgS2tlqXEZEvb/VGiLvxjsLOw5M50DxhtM= X-Envelope-From: ross@r-sc.ca The current driver hard-codes interrupt mask and clear to DPU_0 | DPU_1 and only checks DPU completion in the IRQ handler. This causes timeouts on PPU-only tasks and DPU=E2=86=92PPU pipelined jobs. Use the new per-task int_mask field to set INTERRUPT_MASK to the correct terminal block(s): - conv / standalone DPU =E2=86=92 DPU_0 | DPU_1 - PPU / DPU=E2=86=92PPU pipeline =E2=86=92 PPU_0 | PPU_1 Also: - clear all relevant interrupt bits (0x1ffff) instead of just DPU - accept PPU_0 / PPU_1 completions in the IRQ handler Fixes correct completion detection for non-convolutional and pipelined workloads. Signed-off-by: Ross Cawston --- drivers/accel/rocket/rocket_job.c | 29 +++++++++++++++++++++++++---- 1 file changed, 25 insertions(+), 4 deletions(-) diff --git a/drivers/accel/rocket/rocket_job.c b/drivers/accel/rocket/rocke= t_job.c index 1dcc0c945f7f..ce54913baa46 100644 --- a/drivers/accel/rocket/rocket_job.c +++ b/drivers/accel/rocket/rocket_job.c @@ -162,8 +162,20 @@ static void rocket_job_hw_submit(struct rocket_core *c= ore, struct rocket_job *jo rocket_pc_writel(core, REGISTER_AMOUNTS, PC_REGISTER_AMOUNTS_PC_DATA_AMOUNT((task->regcmd_count + 1) / 2 - 1)); =20 - rocket_pc_writel(core, INTERRUPT_MASK, PC_INTERRUPT_MASK_DPU_0 | PC_INTER= RUPT_MASK_DPU_1); - rocket_pc_writel(core, INTERRUPT_CLEAR, PC_INTERRUPT_CLEAR_DPU_0 | PC_INT= ERRUPT_CLEAR_DPU_1); + /* + * Enable interrupts for the last block in this task's pipeline. + * + * The int_mask field from userspace specifies which block completion + * signals that this task is done: + * - Conv/DPU tasks: DPU_0 | DPU_1 + * - PPU tasks (DPU=E2=86=92PPU pipeline): PPU_0 | PPU_1 + * + * Only enabling the terminal block's interrupt prevents the kernel + * from stopping the pipeline early (e.g. DPU fires before PPU has + * finished writing its output). + */ + rocket_pc_writel(core, INTERRUPT_MASK, task->int_mask); + rocket_pc_writel(core, INTERRUPT_CLEAR, 0x1ffff); =20 rocket_pc_writel(core, TASK_CON, PC_TASK_CON_RESERVED_0(1) | PC_TASK_CON_TASK_COUNT_CLEAR(1) | @@ -449,8 +461,17 @@ static irqreturn_t rocket_job_irq_handler(int irq, voi= d *data) WARN_ON(raw_status & PC_INTERRUPT_RAW_STATUS_DMA_READ_ERROR); WARN_ON(raw_status & PC_INTERRUPT_RAW_STATUS_DMA_WRITE_ERROR); =20 - if (!(raw_status & PC_INTERRUPT_RAW_STATUS_DPU_0 || - raw_status & PC_INTERRUPT_RAW_STATUS_DPU_1)) + /* + * Check for any job completion interrupt: DPU or PPU. + * + * Conv and standalone DPU jobs signal via DPU_0/DPU_1. + * PPU pooling jobs signal via PPU_0/PPU_1. + * We must recognize both to avoid PPU job timeouts. + */ + if (!(raw_status & (PC_INTERRUPT_RAW_STATUS_DPU_0 | + PC_INTERRUPT_RAW_STATUS_DPU_1 | + PC_INTERRUPT_RAW_STATUS_PPU_0 | + PC_INTERRUPT_RAW_STATUS_PPU_1))) return IRQ_NONE; =20 rocket_pc_writel(core, INTERRUPT_MASK, 0x0); --=20 2.52.0