From nobody Fri Apr 3 03:11:42 2026 Received: from out-178.mta1.migadu.com (out-178.mta1.migadu.com [95.215.58.178]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A61281EB5B for ; Mon, 16 Feb 2026 23:38:23 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=95.215.58.178 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771285105; cv=none; b=alPkS/Rq39nzxnI2UiBuEwES3toStkIFl7Bd9qsZdu1Qk1aICjCQvdWmoJ7Em5n2xaUzMhrbB5pXeAVGnqzTd8iW9C0twaFabCtRyaC55zro4KGdotAgpHhfOTDO7m+qH9Xn3ypYj5pKAkE5MKJ1GFFXfdr6Bc+l3hKJpe/hdhA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771285105; c=relaxed/simple; bh=kCuopfLu7Oi0EzM4wixJtyFkRBVwm7HLABObJtpowC4=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=pS0IGhibttkjUMY4rdrOoSr1ThYHbOeihe3W2iCyO8QrXKZJELCEW+reuzJlkkvGh/V2IKCROF29xHvyU8Yq4vJI1rJUhP/40vj4AzG8dLjSfAse0J/iyvMCIV3qLhxxHJ0bdK5RnZeLAQknTYTntmNNfJ8UV2RIf+JdYSnjBvA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=packett.cool; spf=pass smtp.mailfrom=packett.cool; dkim=pass (2048-bit key) header.d=packett.cool header.i=@packett.cool header.b=Dk+62Vat; arc=none smtp.client-ip=95.215.58.178 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=packett.cool Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=packett.cool Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=packett.cool header.i=@packett.cool header.b="Dk+62Vat" X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=packett.cool; s=key1; t=1771285102; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=NWnN6+c5xsBb3tOefcLzO1lu0M8RbBtdH+rnfm5Rppk=; b=Dk+62VatWm82DrmIg6ZI12X5VxYgb087vuPYvLrZSrcT5plDzZLXdtJJQi20LKPASPxzqi WdwmO0UWXPCzX7G8v08Lr05w/ha9vlA9lVAlDCeTyZDLSYMctyL5GMFO18ahJat6WjOAjp UkwoXxjSWcx/hjsjisTCTHj4vNGZFUMAPqZ4sRtjmHrWeRWmshmtaeCVYgrBOVlscAKfKJ sAs0IS1584FoeWW9rkCgrbUs6lmkmfL3AcshcMGSh6y+PsLtBc9iwN1v27lE10QzWkSoB1 kX+R11gbHb2fJyjtelxChxRmMDxcdqEBTtm5C3bzpHJIm+QHXrjauBuQoT0lUA== From: Val Packett To: Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Adam Skladowski Cc: linux-arm-msm@vger.kernel.org, phone-devel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, Val Packett , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 1/6] dt-bindings: clock: qcom,sm6115-dispcc: Define MDSS resets Date: Mon, 16 Feb 2026 20:25:19 -0300 Message-ID: <20260216233600.13098-3-val@packett.cool> In-Reply-To: <20260216233600.13098-2-val@packett.cool> References: <20260216233600.13098-2-val@packett.cool> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Migadu-Flow: FLOW_OUT Content-Type: text/plain; charset="utf-8" Add the missing defines for MDSS resets. While here, align comment style with other SoCs. Fixes: 38557c6fc077 ("dt-bindings: clock: add QCOM SM6115 display clock bin= dings") Signed-off-by: Val Packett --- include/dt-bindings/clock/qcom,sm6115-dispcc.h | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/include/dt-bindings/clock/qcom,sm6115-dispcc.h b/include/dt-bi= ndings/clock/qcom,sm6115-dispcc.h index d1a6c45b5029..ab8d312ade37 100644 --- a/include/dt-bindings/clock/qcom,sm6115-dispcc.h +++ b/include/dt-bindings/clock/qcom,sm6115-dispcc.h @@ -6,7 +6,7 @@ #ifndef _DT_BINDINGS_CLK_QCOM_DISP_CC_SM6115_H #define _DT_BINDINGS_CLK_QCOM_DISP_CC_SM6115_H =20 -/* DISP_CC clocks */ +/* Clocks */ #define DISP_CC_PLL0 0 #define DISP_CC_PLL0_OUT_MAIN 1 #define DISP_CC_MDSS_AHB_CLK 2 @@ -30,7 +30,10 @@ #define DISP_CC_SLEEP_CLK 20 #define DISP_CC_SLEEP_CLK_SRC 21 =20 -/* DISP_CC GDSCR */ +/* Resets */ +#define DISP_CC_MDSS_CORE_BCR 0 + +/* GDSCs */ #define MDSS_GDSC 0 =20 #endif --=20 2.52.0 From nobody Fri Apr 3 03:11:42 2026 Received: from out-176.mta1.migadu.com (out-176.mta1.migadu.com [95.215.58.176]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 154ED27A92D for ; Mon, 16 Feb 2026 23:38:40 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=95.215.58.176 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771285122; cv=none; b=RDoWk2Zsj1gSBKMS9OIjwD00wTRo1hO6AHfk07oJSRIcat0DGVDu74D5JBW3QDMsLr0z1mqVtbqOEl1LpM8NVZa0aoyc/XHS8FYbIHP2DRjrZHS935EarZ3AfYapXOLtGy2/spmxxQ03C6MUnMIWkLNyDFhAYN0jP/TS8U1zyH8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771285122; c=relaxed/simple; bh=OMRlCPZ0qEsHQmJTvMNnWe15UorBiHbpB3WG68YnfuE=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=qoqGeudPKz72mBt4GPpr6YiF3hloplsfJs4KYRjQf7Lq16tUItckzDdrIQI2l18eUNIpnxiQwxrKHHSY817wy3CnI0Ibi4ut2QvWLBl8jWUawDRCBX0ooqx8k578yJq3XInNPejDeLj4Y80QcXexNycZGO09oR7A9ag03jdOaac= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=packett.cool; spf=pass smtp.mailfrom=packett.cool; dkim=pass (2048-bit key) header.d=packett.cool header.i=@packett.cool header.b=IP4sEnXg; arc=none smtp.client-ip=95.215.58.176 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=packett.cool Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=packett.cool Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=packett.cool header.i=@packett.cool header.b="IP4sEnXg" X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=packett.cool; s=key1; t=1771285119; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=eQuQSiGO+iS/wZyw+tk5yrutgULYwUrgwsAfbZSdAiQ=; b=IP4sEnXgqOFc/6LA/A4W+MyzXKJTYAUjOYF6oICmlthJIabh0uKfDlAqvx3iFznDO/kHHb NhwcT2QksYVC0i7JebM5fgfeS8TPUsF4WjCiS3bsipkSq7jAYsaXSpMGyaIbZbrUZM4yeo WvLdlg4AGBSKv/X+hIv8KAehjZlbhW5W37kl9xhqugSS7QDajelvB8GAxJYP4sgSykXPeh 7+avHkYYoN4dNe2wpp0a7qM9L05SWfkMhkBnjdeGWiFnFOUl275XH5PZ63wLNCCNEQ2VAM Sw1+JsFmFSYUlMMxUctnYhePFxhYXRlpqerLPfy1giIkv3G74ygNg/OFHr2thw== From: Val Packett To: Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Marijn Suijten , Martin Botka Cc: linux-arm-msm@vger.kernel.org, phone-devel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, Val Packett , Krzysztof Kozlowski , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 2/6] dt-bindings: clock: qcom,dispcc-sm6125: Define MDSS resets Date: Mon, 16 Feb 2026 20:25:20 -0300 Message-ID: <20260216233600.13098-4-val@packett.cool> In-Reply-To: <20260216233600.13098-2-val@packett.cool> References: <20260216233600.13098-2-val@packett.cool> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Migadu-Flow: FLOW_OUT Content-Type: text/plain; charset="utf-8" Add the missing defines for MDSS resets. While here, align comment style with other SoCs. Fixes: 8397c9c0c26b ("dt-bindings: clock: add QCOM SM6125 display clock bin= dings") Signed-off-by: Val Packett --- include/dt-bindings/clock/qcom,dispcc-sm6125.h | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/include/dt-bindings/clock/qcom,dispcc-sm6125.h b/include/dt-bi= ndings/clock/qcom,dispcc-sm6125.h index 4ff974f4fcc3..f58b85d2c814 100644 --- a/include/dt-bindings/clock/qcom,dispcc-sm6125.h +++ b/include/dt-bindings/clock/qcom,dispcc-sm6125.h @@ -6,6 +6,7 @@ #ifndef _DT_BINDINGS_CLK_QCOM_DISP_CC_SM6125_H #define _DT_BINDINGS_CLK_QCOM_DISP_CC_SM6125_H =20 +/* Clocks */ #define DISP_CC_PLL0 0 #define DISP_CC_MDSS_AHB_CLK 1 #define DISP_CC_MDSS_AHB_CLK_SRC 2 @@ -35,7 +36,10 @@ #define DISP_CC_MDSS_VSYNC_CLK_SRC 26 #define DISP_CC_XO_CLK 27 =20 -/* DISP_CC GDSCR */ +/* Resets */ +#define DISP_CC_MDSS_CORE_BCR 0 + +/* GDSCs */ #define MDSS_GDSC 0 =20 #endif --=20 2.52.0 From nobody Fri Apr 3 03:11:42 2026 Received: from out-181.mta1.migadu.com (out-181.mta1.migadu.com [95.215.58.181]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A27522144D7 for ; Mon, 16 Feb 2026 23:38:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=95.215.58.181 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771285138; cv=none; b=oucIJ9jM/I0iruy2O9IB3m9bVbF3qUNMdX/tVnG0B2dU9sA0nL0Hq+FaeN5qZ/bfqHlsxmx2mHKFFLyJ4WSu93xcZAIOIS9HMXaTxQaEhaM6jKyZaMwkzv0M9CQzb+Ponv85MLYMvAhe1wDdYL8NxhhdQ6illVezbaVB6HrZSZk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771285138; c=relaxed/simple; bh=UZYObOCo+4Uc/zazdoJD2WY1/0RSF+UuBPsgZca65/I=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=G6bNO7znpeTtQYobIFHmhMWx6xMzcfCc74DBGfit2xUIyNkEYPnFp0wOTgbbg+yFkqyFjDnK0f6+ZJaSZVAHZymCqv/3gbVwyuVhlp9qfuvNn9HdFEmewKsvNHlDTKQpVVQnDpQxUolkU77GMjqU84NDsd8x8xzemCYkENGWEeE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=packett.cool; spf=pass smtp.mailfrom=packett.cool; dkim=pass (2048-bit key) header.d=packett.cool header.i=@packett.cool header.b=jz+rBCHv; arc=none smtp.client-ip=95.215.58.181 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=packett.cool Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=packett.cool Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=packett.cool header.i=@packett.cool header.b="jz+rBCHv" X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=packett.cool; s=key1; t=1771285135; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=ILY7v2SmIZw9ZvvKst2oBdkcdWOxzEcSMApNN4USfk8=; b=jz+rBCHvNqWCv6GTD/feeOn+hQoHdzYTTnU0S6uAVNKOj89vp+P1Lgfb8LsgCnvVPbFF6Y kqcMozxcdL6o6n1dQDY6iZNfIR9FIUnHBnR78jGY87lXxky93mQazv2xeIx7Sb0uuC2CCc MPBbPRiKLh7umSVaMre6w4TigoHZWX2f5ZsNHDDqpxHI5NRI9xxoySwnFyNuKC0wb8bO2V AGsu7Bj2I3kzca/a8i61qa4xUy+8jlFiCEPl9UX+fH8PCn0Z+dRrrNiaYcxQkaeSHbm1iv Mgk7LFGDgu4TsFdwIyH44Xgf+adrVqDQcU7WZ5hhsufQkrVKv0rbHx23h5PX3w== From: Val Packett To: Bjorn Andersson , Michael Turquette , Stephen Boyd , Adam Skladowski Cc: linux-arm-msm@vger.kernel.org, phone-devel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, Val Packett , linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 3/6] clk: qcom: dispcc-sm6115: Add missing MDSS resets Date: Mon, 16 Feb 2026 20:25:21 -0300 Message-ID: <20260216233600.13098-5-val@packett.cool> In-Reply-To: <20260216233600.13098-2-val@packett.cool> References: <20260216233600.13098-2-val@packett.cool> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Migadu-Flow: FLOW_OUT Content-Type: text/plain; charset="utf-8" The MDSS resets were left undescribed, fix that. Fixes: 9b518788631c ("clk: qcom: Add display clock controller driver for SM= 6115") Signed-off-by: Val Packett Reviewed-by: Dmitry Baryshkov Reviewed-by: Konrad Dybcio --- drivers/clk/qcom/dispcc-sm6115.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/clk/qcom/dispcc-sm6115.c b/drivers/clk/qcom/dispcc-sm6= 115.c index 8ae25d51db94..75bd57213079 100644 --- a/drivers/clk/qcom/dispcc-sm6115.c +++ b/drivers/clk/qcom/dispcc-sm6115.c @@ -22,6 +22,7 @@ #include "clk-regmap-divider.h" #include "common.h" #include "gdsc.h" +#include "reset.h" =20 enum { DT_BI_TCXO, @@ -511,6 +512,10 @@ static struct clk_branch disp_cc_sleep_clk =3D { }, }; =20 +static const struct qcom_reset_map disp_cc_sm6115_resets[] =3D { + [DISP_CC_MDSS_CORE_BCR] =3D { 0x2000 }, +}; + static struct gdsc mdss_gdsc =3D { .gdscr =3D 0x3000, .pd =3D { @@ -561,6 +566,8 @@ static const struct qcom_cc_desc disp_cc_sm6115_desc = =3D { .config =3D &disp_cc_sm6115_regmap_config, .clks =3D disp_cc_sm6115_clocks, .num_clks =3D ARRAY_SIZE(disp_cc_sm6115_clocks), + .resets =3D disp_cc_sm6115_resets, + .num_resets =3D ARRAY_SIZE(disp_cc_sm6115_resets), .gdscs =3D disp_cc_sm6115_gdscs, .num_gdscs =3D ARRAY_SIZE(disp_cc_sm6115_gdscs), }; --=20 2.52.0 From nobody Fri Apr 3 03:11:42 2026 Received: from out-179.mta1.migadu.com (out-179.mta1.migadu.com [95.215.58.179]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9AFD92144D7 for ; Mon, 16 Feb 2026 23:39:01 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=95.215.58.179 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771285142; cv=none; b=f08kfYF4065z8nVkv0cVWCcro8vUWnoSYuFPiYnqiVRirq3K46allVwzU93hUcMQmvfgbEBemBqXHJNdf3MwD1uszxELOdUI6u6MGeIbS3X/K3/37J+LAmHZnqSB1O1JDg4cfSU9kuqp9YKIV1bMl53fsUO6QsZiWc3M5jrZaoU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771285142; c=relaxed/simple; bh=9gXORpOWQrrniCRlK1vNO9h4X4Fi44J556FjVdTAbLQ=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=IfNqZ5hWEA1JcNh3hlxVemKCb3abLLge7Zhv9INbAfTI+CsfPDpgK/SQjzDhlICncgOlLsBu+hn3AAC7Jb5XT0vRLPnnwZSRVDFH/t94twPBgp9d4Qg2rXjAjLxXvv6OUEtoMDxwH6S5DIL9eZbfoNQNMG/CMNJLCSljlMME7UA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=packett.cool; spf=pass smtp.mailfrom=packett.cool; dkim=pass (2048-bit key) header.d=packett.cool header.i=@packett.cool header.b=Dn9Jea18; arc=none smtp.client-ip=95.215.58.179 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=packett.cool Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=packett.cool Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=packett.cool header.i=@packett.cool header.b="Dn9Jea18" X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=packett.cool; s=key1; t=1771285139; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=yY9yyJpMHiUSK3y3yUdWqkedHsO8yxXbPn8ACEQJD3A=; b=Dn9Jea18JOksSmpf/XyNliig2T5KJu2U6Gtw7hKdNSfvbm0BtqHMyMA1bE16fcnLlb5TOx xddFDV5a909ej8fCFNq5B1mzvrG2UChVKTGrnb7bT1R/2R3Ym4zgRVrZpPI1wnLl0KofxS FXcc9yg0LrRrmcFCyKg398NM535UA2gdUuaEvH50ugpBu86g+zcRpKN3GREtZNnedWBaxH kdNa/0cekpNWJzf+CjXZowbsQkURUU14BpA/aukRpQ4aJC0hULC8FSGiKZTsuyz2bTewfd oyaJyNv0TTlOoxxwgjMZGiwHf+VSE9MC3zqJjHceoprYVmBKS2PFBZhU2DywFQ== From: Val Packett To: Bjorn Andersson , Michael Turquette , Stephen Boyd , Marijn Suijten , Martin Botka , AngeloGioacchino Del Regno Cc: linux-arm-msm@vger.kernel.org, phone-devel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, Val Packett , linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 4/6] clk: qcom: dispcc-sm6125: Add missing MDSS resets Date: Mon, 16 Feb 2026 20:25:22 -0300 Message-ID: <20260216233600.13098-6-val@packett.cool> In-Reply-To: <20260216233600.13098-2-val@packett.cool> References: <20260216233600.13098-2-val@packett.cool> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Migadu-Flow: FLOW_OUT Content-Type: text/plain; charset="utf-8" The MDSS resets were left undescribed, fix that. Fixes: 6e87c8f07407 ("clk: qcom: Add display clock controller driver for SM= 6125") Signed-off-by: Val Packett Reviewed-by: Dmitry Baryshkov Reviewed-by: Konrad Dybcio --- drivers/clk/qcom/dispcc-sm6125.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/clk/qcom/dispcc-sm6125.c b/drivers/clk/qcom/dispcc-sm6= 125.c index 851d38a487d3..2c67abcfef12 100644 --- a/drivers/clk/qcom/dispcc-sm6125.c +++ b/drivers/clk/qcom/dispcc-sm6125.c @@ -17,6 +17,7 @@ #include "clk-regmap.h" #include "common.h" #include "gdsc.h" +#include "reset.h" =20 enum { P_BI_TCXO, @@ -607,6 +608,10 @@ static struct clk_branch disp_cc_xo_clk =3D { }, }; =20 +static const struct qcom_reset_map disp_cc_sm6125_resets[] =3D { + [DISP_CC_MDSS_CORE_BCR] =3D { 0x2000 }, +}; + static struct gdsc mdss_gdsc =3D { .gdscr =3D 0x3000, .pd =3D { @@ -663,6 +668,8 @@ static const struct qcom_cc_desc disp_cc_sm6125_desc = =3D { .config =3D &disp_cc_sm6125_regmap_config, .clks =3D disp_cc_sm6125_clocks, .num_clks =3D ARRAY_SIZE(disp_cc_sm6125_clocks), + .resets =3D disp_cc_sm6125_resets, + .num_resets =3D ARRAY_SIZE(disp_cc_sm6125_resets), .gdscs =3D disp_cc_sm6125_gdscs, .num_gdscs =3D ARRAY_SIZE(disp_cc_sm6125_gdscs), }; --=20 2.52.0 From nobody Fri Apr 3 03:11:42 2026 Received: from out-171.mta1.migadu.com (out-171.mta1.migadu.com [95.215.58.171]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 737352F4A15; Mon, 16 Feb 2026 23:39:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=95.215.58.171 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771285146; cv=none; b=h7mQEHmbM3sGtor/6AOsqY3Xy3p8952irXpRQtPHxwBi6OAUug2f+SA+vebOam3M1MwcyWSamRnHaE9xGqRRFph/s5DRapKu7RuFceLhbR2Z4Nynkz2k+y3YWp+yOYVICm6Nu5UHWyJwy2ZOuBOFxgUYvBv9rpecibarGElX9I4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771285146; c=relaxed/simple; bh=RbCV6vzOlnwxtYtR5B5jbd9YeOD8iqu6VXuc+VtdXhI=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=p8gwvmilkdeKypwdXhPq7zoIBwlVWPBrIvBsG5AtaSGJEqZGodPE7jxqvEcDxuNI4mxE0B6I4u1+SNS0wBkGtfOUB5wZ+i2kMY7p5dML7o92F/iSpJpw8U+t2dPYmg/H06sY2qMgUoMgYuSKNWwju3taVuXNAYS1SwK4dabSK8w= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=packett.cool; spf=pass smtp.mailfrom=packett.cool; dkim=pass (2048-bit key) header.d=packett.cool header.i=@packett.cool header.b=OXJx9inD; arc=none smtp.client-ip=95.215.58.171 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=packett.cool Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=packett.cool Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=packett.cool header.i=@packett.cool header.b="OXJx9inD" X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=packett.cool; s=key1; t=1771285143; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=KY82BaUYIukxsPfbzUE86Y/IZ+XbH/uKCDnIMOz06rs=; b=OXJx9inDTjXp2JZwbkvCjcdcucOwNDeBErqq8EwU86/GBwbVAwNTyfoRATgdmwjf3UZFpU 1cI/Lqa3LYdh6STnQoWQSXMX1mQo9J71ytvxEYKjyrkqs7iHRb4MmYgBKtoLJdxXsr9u1/ rz6JUUoqZngpsgro5frg2b8KZfk/WubtTRHnUZj1rqiX9eGewn6V+92cAhWYS/EQ3sc563 Fzz4nnak1rUiWvnCsPIqMihosvatamtAA0/GuFO3Xqjqipzjg+4rfQzlu0F1qFkJRd2Ab3 dqZemXDgmt93pbgAhVv8WiyzTnu0g+q8oWJDyyurFNAyutdUdA/vvEWaWfN4mA== From: Val Packett To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Adam Skladowski Cc: linux-arm-msm@vger.kernel.org, phone-devel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, Val Packett , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 5/6] arm64: dts: qcom: sm6115: Add missing MDSS core reset Date: Mon, 16 Feb 2026 20:25:23 -0300 Message-ID: <20260216233600.13098-7-val@packett.cool> In-Reply-To: <20260216233600.13098-2-val@packett.cool> References: <20260216233600.13098-2-val@packett.cool> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Migadu-Flow: FLOW_OUT Content-Type: text/plain; charset="utf-8" To make sure the display subsystem starts in a predictable state, we need to reset it. Otherwise, unpredictable issues can happen, e.g. on the motorola-guamp smartphone DSI would not transmit anything. Wire up the reset to fix. Fixes: 705e50427d81 ("arm64: dts: qcom: sm6115: Add mdss/dpu node") Signed-off-by: Val Packett Reviewed-by: Dmitry Baryshkov Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sm6115.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qco= m/sm6115.dtsi index e9336adbc391..3a9a1ad8d581 100644 --- a/arch/arm64/boot/dts/qcom/sm6115.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi @@ -1864,6 +1864,8 @@ mdss: display-subsystem@5e00000 { <&gcc GCC_DISP_HF_AXI_CLK>, <&dispcc DISP_CC_MDSS_MDP_CLK>; =20 + resets =3D <&dispcc DISP_CC_MDSS_CORE_BCR>; + interrupts =3D ; interrupt-controller; #interrupt-cells =3D <1>; --=20 2.52.0 From nobody Fri Apr 3 03:11:42 2026 Received: from out-179.mta1.migadu.com (out-179.mta1.migadu.com [95.215.58.179]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 84B322D061C for ; Mon, 16 Feb 2026 23:39:09 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=95.215.58.179 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771285150; cv=none; b=MvVg31U8pHCN5DxyZqXQDP9DLxWQBvplSElQ2NBAIfEADqq4VZj9Dw6coscZnboaLPsSqQGln3U3I5E1vYH4jbQzFPf+zSDbqKZM0L8SFVX61egXGmt6H5YKf5FQMpUEfv86P9aVv5NPIgfZAtvrkuICaWab7+dvNJN+E9DsRfg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771285150; c=relaxed/simple; bh=FzEDqe3HBmxO9tiERGUD5CbndWbXj8cTA4U4jJIIxwE=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=BJLf2dwdQrMEt1gAKys62LxEaoAL0rHN6LcB9t3dmYyzFF5WCLBwPN6tN/j0WQ/lYj/KWvL9Fgku3l895KE6F96b0XWTAJwVwzzpOloG0sp/AFA/EnX5nF2tdzq005WbI7hr8AhqzxftdQS44d4mMb7F+fwkbT3H6rJwjWGG+8k= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=packett.cool; spf=pass smtp.mailfrom=packett.cool; dkim=pass (2048-bit key) header.d=packett.cool header.i=@packett.cool header.b=tMAJgSO1; arc=none smtp.client-ip=95.215.58.179 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=packett.cool Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=packett.cool Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=packett.cool header.i=@packett.cool header.b="tMAJgSO1" X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=packett.cool; s=key1; t=1771285148; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=jw6LbuJdUl80cdrWG1FjVnPEOcj3kz8s/yDqaabuano=; b=tMAJgSO1aAwqoEJfxiKKa2h+P806coUwah+cWnqZSlnPnp4fiqAknqtSZJM+Kzkki/Iw7X jMX32IcQ/AvJ3VWI2mqFVrLAOwrnf2++7364cjpJorOIM5wjuhevrIlgsucEW8jUHUIIla VHo8oZkVtvsnwQ991NjE2feVAneOpNFGKr9qjCYPW2g80A1F+2pYaeXV/q/odVrKr5AKZp eiLfIaTCwr3aahD0sK3rY8huMfWyXhc1u6TlslMjmRbEFoJCp53A5TvmLBbaWDd2VHp5Ea BHdBXUn9d/A+ZCvPtQnvXm3GhKojxaTg1fq+/jPgZF0kj/IwubIySoQQi5tG7g== From: Val Packett To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Marijn Suijten , Dmitry Baryshkov Cc: linux-arm-msm@vger.kernel.org, phone-devel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, Val Packett , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 6/6] arm64: dts: qcom: sm6125: Add missing MDSS core reset Date: Mon, 16 Feb 2026 20:25:24 -0300 Message-ID: <20260216233600.13098-8-val@packett.cool> In-Reply-To: <20260216233600.13098-2-val@packett.cool> References: <20260216233600.13098-2-val@packett.cool> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Migadu-Flow: FLOW_OUT Content-Type: text/plain; charset="utf-8" To make sure the display subsystem starts in a predictable state, we need to reset it. On closely related SoC (sm6115) this has caused DSI displays to not work. Wire up the reset to fix. Fixes: 0865d23a0226 ("arm64: dts: qcom: sm6125: Add display hardware nodes") Signed-off-by: Val Packett Reviewed-by: Dmitry Baryshkov Reviewed-by: Konrad Dybcio Tested-By: Yedaya Katsman --- arch/arm64/boot/dts/qcom/sm6125.dtsi | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm6125.dtsi b/arch/arm64/boot/dts/qco= m/sm6125.dtsi index 80c42dff5399..a22374e5a17f 100644 --- a/arch/arm64/boot/dts/qcom/sm6125.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6125.dtsi @@ -1238,6 +1238,8 @@ mdss: display-subsystem@5e00000 { "ahb", "core"; =20 + resets =3D <&dispcc DISP_CC_MDSS_CORE_BCR>; + power-domains =3D <&dispcc MDSS_GDSC>; =20 iommus =3D <&apps_smmu 0x400 0x0>; @@ -1437,6 +1439,7 @@ dispcc: clock-controller@5f00000 { power-domains =3D <&rpmpd RPMPD_VDDCX>; =20 #clock-cells =3D <1>; + #reset-cells =3D <1>; #power-domain-cells =3D <1>; }; =20 --=20 2.52.0