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[87.205.5.123]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-b8fc735d185sm264683866b.14.2026.02.16.08.45.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 16 Feb 2026 08:45:35 -0800 (PST) From: =?UTF-8?q?Tomasz=20Paku=C5=82a?= To: alexander.deucher@amd.com, harry.wentland@amd.com, sunpeng.li@amd.com Cc: maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, airlied@gmail.com, simona@ffwll.ch, siqueira@igalia.com, dri-devel@lists.freedesktop.org, amd-gfx@lists.freedesktop.org, linux-kernel@vger.kernel.org, tomasz.pakula.oficjalny@gmail.com, bernhard.berger@gmail.com, michel.daenzer@mailbox.org, daniel@fooishbar.org Subject: [PATCH v4 12/27] drm/edid: Parse more info from HDMI Forum vsdb Date: Mon, 16 Feb 2026 17:45:01 +0100 Message-ID: <20260216164516.36803-13-tomasz.pakula.oficjalny@gmail.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260216164516.36803-1-tomasz.pakula.oficjalny@gmail.com> References: <20260216164516.36803-1-tomasz.pakula.oficjalny@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable [Why] Drivers may need info about gaming features exposed by HDMI sinks. Add a central way of storing this information. [How] Adds flags and a struct to hold HDMI VRR information. `supported` here is an additional property which allows easier parsing in consumers and adds a bit of logic used to detect malformed VRRmin/VRRmax values. Signed-off-by: Tomasz Paku=C5=82a Tested-by: Bernhard Berger --- drivers/gpu/drm/drm_edid.c | 41 +++++++++++++++++++++++++++++++- include/drm/drm_connector.h | 47 +++++++++++++++++++++++++++++++++++++ 2 files changed, 87 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c index 26bb7710a462..056eff8cbd1a 100644 --- a/drivers/gpu/drm/drm_edid.c +++ b/drivers/gpu/drm/drm_edid.c @@ -6152,6 +6152,33 @@ static void drm_parse_ycbcr420_deep_color_info(struc= t drm_connector *connector, hdmi->y420_dc_modes =3D dc_mask; } =20 +static void drm_parse_hdmi_gaming_info(struct drm_hdmi_info *hdmi, const u= 8 *db) +{ + struct drm_hdmi_vrr_cap *vrr =3D &hdmi->vrr_cap; + + if (cea_db_payload_len(db) < 8) + return; + + hdmi->fapa_start_location =3D db[8] & DRM_EDID_FAPA_START_LOCATION; + hdmi->allm =3D db[8] & DRM_EDID_ALLM; + vrr->fva =3D db[8] & DRM_EDID_FVA; + vrr->cnmvrr =3D db[8] & DRM_EDID_CNMVRR; + vrr->cinema_vrr =3D db[8] & DRM_EDID_CINEMA_VRR; + vrr->mdelta =3D db[8] & DRM_EDID_MDELTA; + + if (cea_db_payload_len(db) < 9) + return; + + vrr->vrr_min =3D db[9] & DRM_EDID_VRR_MIN_MASK; + vrr->supported =3D (vrr->vrr_min > 0 && vrr->vrr_min <=3D 48); + + if (cea_db_payload_len(db) < 10) + return; + + vrr->vrr_max =3D (db[9] & DRM_EDID_VRR_MAX_UPPER_MASK) << 2 | db[10]; + vrr->supported &=3D (vrr->vrr_max =3D=3D 0 || vrr->vrr_max >=3D 100); +} + static void drm_parse_dsc_info(struct drm_hdmi_dsc_cap *hdmi_dsc, const u8 *hf_scds) { @@ -6277,7 +6304,7 @@ static void drm_parse_hdmi_forum_scds(struct drm_conn= ector *connector, } =20 drm_parse_ycbcr420_deep_color_info(connector, hf_scds); - + drm_parse_hdmi_gaming_info(&connector->display_info.hdmi, hf_scds); if (cea_db_payload_len(hf_scds) >=3D 11 && hf_scds[11]) { drm_parse_dsc_info(hdmi_dsc, hf_scds); dsc_support =3D true; @@ -6287,6 +6314,18 @@ static void drm_parse_hdmi_forum_scds(struct drm_con= nector *connector, "[CONNECTOR:%d:%s] HF-VSDB: max TMDS clock: %d KHz, HDMI 2.1 support= : %s, DSC 1.2 support: %s\n", connector->base.id, connector->name, max_tmds_clock, str_yes_no(max_frl_rate), str_yes_no(dsc_support)); + drm_dbg_kms(connector->dev, + "[CONNECTOR:%d:%s] FAPA in blanking: %s, ALLM support: %s, Fast Vact= ive support: %s\n", + connector->base.id, connector->name, str_yes_no(hdmi->fapa_start_loc= ation), + str_yes_no(hdmi->allm), str_yes_no(hdmi->vrr_cap.fva)); + drm_dbg_kms(connector->dev, + "[CONNECTOR:%d:%s] Negative M VRR support: %s, CinemaVRR support: %s= , Mdelta: %d\n", + connector->base.id, connector->name, str_yes_no(hdmi->vrr_cap.cnmvrr= ), + str_yes_no(hdmi->vrr_cap.cinema_vrr), hdmi->vrr_cap.mdelta); + drm_dbg_kms(connector->dev, + "[CONNECTOR:%d:%s] VRRmin: %u, VRRmax: %u, VRR supported: %s\n", + connector->base.id, connector->name, hdmi->vrr_cap.vrr_min, + hdmi->vrr_cap.vrr_max, str_yes_no(hdmi->vrr_cap.supported)); } =20 static void drm_parse_hdmi_deep_color_info(struct drm_connector *connector, diff --git a/include/drm/drm_connector.h b/include/drm/drm_connector.h index 8f34f4b8183d..dab9d5521f41 100644 --- a/include/drm/drm_connector.h +++ b/include/drm/drm_connector.h @@ -254,6 +254,44 @@ struct drm_scdc { struct drm_scrambling scrambling; }; =20 +/** + * struct drm_hdmi_vrr_cap - Information about VRR capabilities of a HDMI = sink + * + * Describes the VRR support provided by HDMI 2.1 sink. The information is + * fetched fom additional HFVSDB blocks defined for HDMI 2.1. + */ +struct drm_hdmi_vrr_cap { + /** @fva: flag for Fast VActive (Quick Frame Transport) support */ + bool fva; + + /** @mcnmvrr: flag for Negative M VRR support */ + bool cnmvrr; + + /** @mcinema_vrr: flag for Cinema VRR support */ + bool cinema_vrr; + + /** @mdelta: flag for limited frame-to-frame compensation support */ + bool mdelta; + + /** + * @vrr_min : minimum supported variable refresh rate in Hz. + * Valid values only inide 1 - 48 range + */ + u16 vrr_min; + + /** + * @vrr_max : maximum supported variable refresh rate in Hz (optional). + * Valid values are either 0 (max based on video mode) or >=3D 100 + */ + u16 vrr_max; + + /** + * @supported: flag for vrr support based on checking for VRRmin and + * VRRmax values having correct values. + */ + bool supported; +}; + /** * struct drm_hdmi_dsc_cap - DSC capabilities of HDMI sink * @@ -330,6 +368,15 @@ struct drm_hdmi_info { /** @max_lanes: supported by sink */ u8 max_lanes; =20 + /** @fapa_start_location: flag for the FAPA in blanking support */ + bool fapa_start_location; + + /** @allm: flag for Auto Low Latency Mode support by sink */ + bool allm; + + /** @vrr_cap: VRR capabilities of the sink */ + struct drm_hdmi_vrr_cap vrr_cap; + /** @dsc_cap: DSC capabilities of the sink */ struct drm_hdmi_dsc_cap dsc_cap; }; --=20 2.53.0