From nobody Thu Mar 19 03:48:32 2026 Received: from sender4-pp-f112.zoho.com (sender4-pp-f112.zoho.com [136.143.188.112]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 204B830FF31; Mon, 16 Feb 2026 13:40:01 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=pass smtp.client-ip=136.143.188.112 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771249202; cv=pass; b=bHhOQ/3yUy5vCr1zm849KIl8V0BfekevaCOYocbQbTRwwqNW3iGpTvp5q1VRCgPWFvoj/WGGpvC3BL6wFBfbeZINUoBwp88iaDx2IA5Qhofjr/soWmnaeQ/k+y8d7NGzcrb0vT3VGfTrkwfgVVd8RYpVHTBmUjPsvarq7DWXw5k= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771249202; c=relaxed/simple; bh=DAQVuHSHpdYT/y51wbhkil/Q7a03NSl6A9lB2BILo7U=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=dMFbwqR9iSWDw9nYrWpim/4U7V44OD4z/u/Ote+Aew1UpEYjjwvvOicvh6/gpeu4O7RgxqhFIQXClZETEdqrOH7VaiKixDshm9mtiNBKk8dVsax21qEKNR2GjBevD4P9msSZK9uXMDsdgvu4VdmT7HebyIfwj9C/y0rujqeYX8w= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (1024-bit key) header.d=collabora.com header.i=nicolas.frattaroli@collabora.com header.b=kPLoDJoB; arc=pass smtp.client-ip=136.143.188.112 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=collabora.com header.i=nicolas.frattaroli@collabora.com header.b="kPLoDJoB" ARC-Seal: i=1; a=rsa-sha256; t=1771249165; cv=none; d=zohomail.com; s=zohoarc; b=eQzV0aPuOYJAE0qpEQMpyc4Fr9e06YQOhiKBIdd+vNBxCTu7SixxgBO93X1As1OdVNVYbtx983tJPcl4dcMG0Q08/4JbkU1rKnJ0oS+r5F/bsSVH4XK4P3srdpx1D1Z1TJ803HSTRfMp7/2ajWD+sMc6G4yffgOpthjaWt30/rY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1771249165; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:MIME-Version:Message-ID:References:Subject:Subject:To:To:Message-Id:Reply-To; bh=6FwKjiPKBXZBYyQbYzVbwkdoXySYiIbPYzGjqC4h6fo=; b=mk0rob81zc2cI0ccJSuoPKplvdrEOI9e2emqWoKe/KAb1pNV5X4RTY7keYUecuImYNujCzZ/B02O8255iH3BCYFArSNXBnEIYpyT5nXF6Zu7U/xHP+Hlmc20zjxrntYQquiQLhrle5I7drXvAzUyCXWVSpm3uenCZH1YxE3pCQM= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=collabora.com; spf=pass smtp.mailfrom=nicolas.frattaroli@collabora.com; dmarc=pass header.from= DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; t=1771249165; s=zohomail; d=collabora.com; i=nicolas.frattaroli@collabora.com; h=From:From:Date:Date:Subject:Subject:MIME-Version:Content-Type:Content-Transfer-Encoding:Message-Id:Message-Id:References:In-Reply-To:To:To:Cc:Cc:Reply-To; bh=6FwKjiPKBXZBYyQbYzVbwkdoXySYiIbPYzGjqC4h6fo=; b=kPLoDJoBe+Cwk1FWFXgxN+AQPZM4nMRgmYgDShKiMm8k7bTGwWzZzzMk1S33H7LA yc/4CXK5SzpUNJN12XaVAG+SHqIqEL4RQdD7o1TQyOhicRUoyFSeoKS3Hpu9mqcTMSD ERjxf8SG0oFjdfTLspdzsAdtq8765gmzNaCky1zI= Received: by mx.zohomail.com with SMTPS id 1771249163431748.1996618264048; Mon, 16 Feb 2026 05:39:23 -0800 (PST) From: Nicolas Frattaroli Date: Mon, 16 Feb 2026 14:37:48 +0100 Subject: [PATCH v7 15/23] scsi: ufs: mediatek: Rework _ufs_mtk_clk_scale error paths Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260216-mt8196-ufs-v7-15-b5f2907c6da7@collabora.com> References: <20260216-mt8196-ufs-v7-0-b5f2907c6da7@collabora.com> In-Reply-To: <20260216-mt8196-ufs-v7-0-b5f2907c6da7@collabora.com> To: Alim Akhtar , Avri Altman , Bart Van Assche , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Chunfeng Yun , Vinod Koul , Kishon Vijay Abraham I , Peter Wang , Stanley Jhu , "James E.J. Bottomley" , "Martin K. Petersen" , Philipp Zabel , Liam Girdwood , Mark Brown , Chaotian Jing , Neil Armstrong Cc: Louis-Alexis Eyraud , kernel@collabora.com, linux-scsi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-phy@lists.infradead.org, Nicolas Frattaroli X-Mailer: b4 0.14.3 Errors should be printed at the correct log level. Additionally, it looks like some "goto out"'s were omitted in the scale up case, which looks like a mistake, as the scale down branch of the code does use them. Rework the error messages to make them nicer and at the correct verbosity, and add the missing gotos. Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: Nicolas Frattaroli Reviewed-by: Peter Wang --- drivers/ufs/host/ufs-mediatek.c | 41 +++++++++++++++++++------------------= ---- 1 file changed, 19 insertions(+), 22 deletions(-) diff --git a/drivers/ufs/host/ufs-mediatek.c b/drivers/ufs/host/ufs-mediate= k.c index 424533538b90..ecf16e82a326 100644 --- a/drivers/ufs/host/ufs-mediatek.c +++ b/drivers/ufs/host/ufs-mediatek.c @@ -1961,16 +1961,16 @@ static void _ufs_mtk_clk_scale(struct ufs_hba *hba,= bool scale_up) =20 ret =3D clk_prepare_enable(clki->clk); if (ret) { - dev_info(hba->dev, - "clk_prepare_enable() fail, ret: %d\n", ret); + dev_err(hba->dev, "%s: Failed to enable clock: %pe\n", __func__, ERR_PTR= (ret)); return; } =20 if (clk_fde_scale) { ret =3D clk_prepare_enable(fde_clki->clk); if (ret) { - dev_info(hba->dev, - "fde clk_prepare_enable() fail, ret: %d\n", ret); + dev_err(hba->dev, "%s: Failed to enable FDE clock: %pe\n", + __func__, ERR_PTR(ret)); + clk_disable_unprepare(clki->clk); return; } } @@ -1979,51 +1979,48 @@ static void _ufs_mtk_clk_scale(struct ufs_hba *hba,= bool scale_up) if (clk_bind_vcore) { ret =3D regulator_set_voltage(reg, volt, INT_MAX); if (ret) { - dev_info(hba->dev, - "Failed to set vcore to %d\n", volt); + dev_err(hba->dev, "Failed to set vcore to %d\n", volt); goto out; } } =20 ret =3D clk_set_parent(clki->clk, mclk->ufs_sel_max_clki->clk); if (ret) { - dev_info(hba->dev, "Failed to set clk mux, ret =3D %d\n", - ret); + dev_err(hba->dev, "%s: Failed to set clock mux: %pe\n", + __func__, ERR_PTR(ret)); + goto out; } =20 if (clk_fde_scale) { - ret =3D clk_set_parent(fde_clki->clk, - mclk->ufs_fde_max_clki->clk); + ret =3D clk_set_parent(fde_clki->clk, mclk->ufs_fde_max_clki->clk); if (ret) { - dev_info(hba->dev, - "Failed to set fde clk mux, ret =3D %d\n", - ret); + dev_err(hba->dev, "%s: Failed to set fde clock mux: %pe\n", + __func__, ERR_PTR(ret)); + goto out; } } } else { if (clk_fde_scale) { - ret =3D clk_set_parent(fde_clki->clk, - mclk->ufs_fde_min_clki->clk); + ret =3D clk_set_parent(fde_clki->clk, mclk->ufs_fde_min_clki->clk); if (ret) { - dev_info(hba->dev, - "Failed to set fde clk mux, ret =3D %d\n", - ret); + dev_err(hba->dev, "%s: Failed to set fde clock mux: %pe\n", + __func__, ERR_PTR(ret)); goto out; } } =20 ret =3D clk_set_parent(clki->clk, mclk->ufs_sel_min_clki->clk); if (ret) { - dev_info(hba->dev, "Failed to set clk mux, ret =3D %d\n", - ret); + dev_err(hba->dev, "%s: Failed to set clock mux: %pe\n", + __func__, ERR_PTR(ret)); goto out; } =20 if (clk_bind_vcore) { ret =3D regulator_set_voltage(reg, 0, INT_MAX); if (ret) { - dev_info(hba->dev, - "failed to set vcore to MIN\n"); + dev_err(hba->dev, "%s: Failed to set vcore to minimum: %pe\n", + __func__, ERR_PTR(ret)); } } } --=20 2.53.0