From nobody Thu Apr  2 22:22:19 2026
Received: from mail-pf1-f177.google.com (mail-pf1-f177.google.com
 [209.85.210.177])
	(using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits))
	(No client certificate requested)
	by smtp.subspace.kernel.org (Postfix) with ESMTPS id 362001DF75D
	for <linux-kernel@vger.kernel.org>; Sat, 14 Feb 2026 07:01:38 +0000 (UTC)
Authentication-Results: smtp.subspace.kernel.org;
 arc=none smtp.client-ip=209.85.210.177
ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;
	t=1771052499; cv=none;
 b=Yxdxq4sgmRV9dX3MxG5XHpjcDM1WL8DcQp9J2XsBNrjYDlF0nr0b6YSpOHs67yMUo13HCfAtua8ritzBUjTNAoPsupfm28p8Ft8+Y3zMoIX1WoT3gd/1Kwyv1gfPDMJCDx+iZk9RKNGCwhsYQjXxJG+QvX6hDDTuMg0REVV1x+Q=
ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org;
	s=arc-20240116; t=1771052499; c=relaxed/simple;
	bh=PlYQHKFHoDyoA5QMDlCr83ibWWU37pZPlBTMuXYVjVU=;
	h=From:To:Cc:Subject:Date:Message-Id:MIME-Version;
 b=CFG0Xb9CtNrCBP3z2TDUP0hmkIsKdhBOak+PEnN/86bbIMbPkwTBSeL+dXF1sfIn4+IaoC5N30SHcLsQrKaF4Jch3aiKFqz3afI2NMI4Etxq7hankA3Jvj2VptolxoYdvNd2T77zXCr7/Qh++CHKDy4ZedwKSHQsvNusLTvNIGA=
ARC-Authentication-Results: i=1; smtp.subspace.kernel.org;
 dmarc=pass (p=none dis=none) header.from=gmail.com;
 spf=pass smtp.mailfrom=gmail.com;
 dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com
 header.b=lssUY6Kc; arc=none smtp.client-ip=209.85.210.177
Authentication-Results: smtp.subspace.kernel.org;
 dmarc=pass (p=none dis=none) header.from=gmail.com
Authentication-Results: smtp.subspace.kernel.org;
 spf=pass smtp.mailfrom=gmail.com
Authentication-Results: smtp.subspace.kernel.org;
	dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com
 header.b="lssUY6Kc"
Received: by mail-pf1-f177.google.com with SMTP id
 d2e1a72fcca58-823c56765fdso906972b3a.1
        for <linux-kernel@vger.kernel.org>;
 Fri, 13 Feb 2026 23:01:38 -0800 (PST)
DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed;
        d=gmail.com; s=20230601; t=1771052497; x=1771657297;
 darn=vger.kernel.org;
        h=content-transfer-encoding:mime-version:message-id:date:subject:cc
         :to:from:from:to:cc:subject:date:message-id:reply-to;
        bh=t3fS/jBrz25JfiVnibsVI6lmnN85JbB8A6Q8rODhA7A=;
        b=lssUY6KcS21N/i3DEO5QZPrI9rHnDbMuKE7xOlkVHvHO16L9oiitRG7FGvgyc0U2BV
         j0j6ZU9vgbyYo1PEfkyPQj7gJo79SghXqlcdON8o6+S6jDs9MFxIJcyCGE4enJ9Cwqlb
         livP2z2m3cR0nmwH5t/mGnpAVUHnEiSIouZ1NdXcUkODRi/ALbxIdsw3po8vDfVdmDga
         cNr1w6qB2Cwr3Lj8svyXyPqzCJe+HyhEZhS52Z5URID4aSXP02lTubTOOxnxC8/REhwq
         Fq939YL6lbwZ93tFnMQk8c/hEz8jBWDywuFkoKztYoh487yD85omyO9K5rmV76Crr1lx
         AXOQ==
X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed;
        d=1e100.net; s=20230601; t=1771052497; x=1771657297;
        h=content-transfer-encoding:mime-version:message-id:date:subject:cc
         :to:from:x-gm-gg:x-gm-message-state:from:to:cc:subject:date
         :message-id:reply-to;
        bh=t3fS/jBrz25JfiVnibsVI6lmnN85JbB8A6Q8rODhA7A=;
        b=T2jxd4C724oFlbScPubJp4h2xRr94/Bx3KuKN8HKmf+P0EHR2vdpxr4txyzC0KbGFR
         vB5nZgKir0zDYoQepM30+9WVvIAaTsca9eUD8y1jgyldS0Yvts8iPzF+F7sVpcjOePLp
         TwVr96MnL2g2M0DKdqVtml0Ahi7MqnrjjFi5/rbsQauXc2WTIjo63CnlQSyNBhMthdZq
         zAlWsKbA0GB3JKOVhcsFutJkthYyQ4+CVZ8YoeZ2RqRhYuaTU7qkHPb0tWh7oAFT7tOi
         Ps8397kHLdbJcvzEWDBa8cuE/ZUKGtjOr5LfEnfMyD1S+ZfuMlOC4x5MrnbctCtON1CK
         5cyg==
X-Forwarded-Encrypted: i=1;
 AJvYcCWN4CAdF7VQx8nmQvXEI+BULNEdSCMtOkUcIRV7Wl7r3DikunIxxVG7awjeQOMsj3fEgOm5FnnV7lWCUaE=@vger.kernel.org
X-Gm-Message-State: AOJu0YyAsRNJWZRk2ak0ZbZxA0cFOhie3AAuCqkcSs02r1An+mnKzpA8
	fNf5HObNWN2qTjAYXlnTJYtEYZpsNTyUIwFXF3uWvw84kB4wK2ZhN6T6
X-Gm-Gg: AZuq6aJ+h6D30a/toqiniONOMwqi/8J5WdB6pBUEksrr9YLkEP8uEcLjPeVNcBB9Xf1
	aLF8QjTJDDGBQe9gElvhbUFXB2gz0VY25HHd+0espDUx0fmclHgIIFTuPObLSPo8mVT6VdqlDzz
	BG+ge9CjyQEgjgYahXVyKqHUULQqA4B6sKlDf+5YsdLjUP6pAytk8DIIg2kNW8dWLZxvcufS16k
	JzZMQ7YOOtqYk9yQLCdOzZwA4m67KZfKctM52xxPBDX9H4s4kIYIBN3X3bPlqNczdkV/SAT1VaG
	PQlz9MIzhRWyZ8yoTil+2p9g6GLx3VbCJLVoPwYBsyIqFECOm2RiKodi/iL7nwlEc9FHhZ6bhB2
	10m5+nl/xb0zFv6U6+puw1jfvUcE0OfScWSN0UZZOAzC72c5elIni7nCGNIa+CE31X2loZMPOEN
	du7zvGwTMb3HuQd7PjbwNFeiHRa81GmpAzugB+FT8/7w==
X-Received: by 2002:a05:6a21:d82:b0:35f:6e12:186f with SMTP id
 adf61e73a8af0-3946c733f3cmr4041961637.23.1771052497293;
        Fri, 13 Feb 2026 23:01:37 -0800 (PST)
Received: from debian.ari ([152.58.179.225])
        by smtp.gmail.com with ESMTPSA id
 41be03b00d2f7-c6e533155fdsm1072674a12.27.2026.02.13.23.01.30
        (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256);
        Fri, 13 Feb 2026 23:01:36 -0800 (PST)
From: Archit Anant <architanant5@gmail.com>
To: maarten.lankhorst@linux.intel.com,
	mripard@kernel.org,
	tzimmermann@suse.de
Cc: airlied@gmail.com,
	simona@ffwll.ch,
	javierm@redhat.com,
	nathan@kernel.org,
	geert+renesas@glider.be,
	marcus.folkesson@gmail.com,
	david@lechnology.com,
	noralf@tronnes.org,
	dri-devel@lists.freedesktop.org,
	linux-kernel@vger.kernel.org,
	Archit Anant <architanant5@gmail.com>
Subject: [RFC PATCH] drm/sitronix: add ST7789V panel driver
Date: Sat, 14 Feb 2026 12:31:23 +0530
Message-Id: <20260214070123.41374-1-architanant5@gmail.com>
X-Mailer: git-send-email 2.39.5
Precedence: bulk
X-Mailing-List: linux-kernel@vger.kernel.org
List-Id: <linux-kernel.vger.kernel.org>
List-Subscribe: <mailto:linux-kernel+subscribe@vger.kernel.org>
List-Unsubscribe: <mailto:linux-kernel+unsubscribe@vger.kernel.org>
MIME-Version: 1.0
Content-Transfer-Encoding: quoted-printable
Content-Type: text/plain; charset="utf-8"

Add a DRM driver for Sitronix ST7789V display controllers using the
mipi_dbi interface.

Currently, support for this controller is split between a legacy fbdev
driver in staging (fb_st7789v.c) and a DRM panel driver that requires
9-bit SPI words (panel-sitronix-st7789v.c). This new driver uses the
mipi_dbi helper to support standard 8-bit SPI with a D/C GPIO, which
is the configuration used by the vast majority of hobbyist and
embedded hardware.

The initialization sequence is ported from the staging driver and
supports several panels:
- Generic 240x320 profile
- HannStar HSD20 IPS
- Inanbo T28CP45TN89-V17
- EDT ET028013DMA
- Jasonic JT240MHQS-HWT-EK-E3

Signed-off-by: Archit Anant <architanant5@gmail.com>
---
 drivers/gpu/drm/sitronix/Kconfig   |  17 ++
 drivers/gpu/drm/sitronix/Makefile  |   2 +
 drivers/gpu/drm/sitronix/st7789v.c | 307 +++++++++++++++++++++++++++++
 3 files changed, 326 insertions(+)
 create mode 100644 drivers/gpu/drm/sitronix/st7789v.c

diff --git a/drivers/gpu/drm/sitronix/Kconfig b/drivers/gpu/drm/sitronix/Kc=
onfig
index 6de7d92d9b74..7a2c66677003 100644
--- a/drivers/gpu/drm/sitronix/Kconfig
+++ b/drivers/gpu/drm/sitronix/Kconfig
@@ -40,3 +40,20 @@ config DRM_ST7735R
=20
 	  If M is selected the module will be called st7735r.
=20
+config DRM_ST7789V
+	tristate "DRM support for Sitronix ST7789V display panels"
+	depends on DRM && SPI
+	select DRM_CLIENT_SELECTION
+	select DRM_GEM_DMA_HELPER
+	select DRM_KMS_HELPER
+	select DRM_MIPI_DBI
+	select BACKLIGHT_CLASS_DEVICE
+	help
+	  DRM driver for Sitronix ST7789V panels connected via SPI.
+	  This driver supports several panels including:
+	  * HannStar HSD20 IPS
+	  * Inanbo T28CP45TN89-V17
+	  * EDT ET028013DMA
+	  * Jasonic JT240MHQS-HWT-EK-E3
+
+	  If M is selected the module will be called st7789v.
diff --git a/drivers/gpu/drm/sitronix/Makefile b/drivers/gpu/drm/sitronix/M=
akefile
index bd139e5a6995..96b2a4d85368 100644
--- a/drivers/gpu/drm/sitronix/Makefile
+++ b/drivers/gpu/drm/sitronix/Makefile
@@ -1,3 +1,5 @@
 obj-$(CONFIG_DRM_ST7571_I2C)		+=3D st7571-i2c.o
 obj-$(CONFIG_DRM_ST7586)		+=3D st7586.o
 obj-$(CONFIG_DRM_ST7735R)		+=3D st7735r.o
+obj-$(CONFIG_DRM_ST7789V)		+=3D st7789v.o
+
diff --git a/drivers/gpu/drm/sitronix/st7789v.c b/drivers/gpu/drm/sitronix/=
st7789v.c
new file mode 100644
index 000000000000..4ce4b46d8df2
--- /dev/null
+++ b/drivers/gpu/drm/sitronix/st7789v.c
@@ -0,0 +1,307 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * DRM driver for Sitronix ST7789V LCD panels
+ *
+ * Copyright (C) 2026 Archit Anant <architanant5@gmail.com>
+ */
+
+#include <linux/bits.h>
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/spi/spi.h>
+#include <linux/gpio/consumer.h>
+#include <linux/delay.h>
+#include <linux/backlight.h>
+
+#include <drm/drm_device.h>
+#include <drm/drm_drv.h>
+#include <drm/drm_managed.h>
+#include <drm/drm_mipi_dbi.h>
+#include <drm/drm_modes.h>
+#include <drm/drm_gem_dma_helper.h>
+#include <drm/drm_atomic_helper.h>
+#include <drm/clients/drm_client_setup.h>
+#include <drm/drm_fbdev_dma.h>
+#include <video/mipi_display.h>
+
+#define ST7789V_PORCTRL      0xb2
+#define ST7789V_GCTRL        0xb7
+#define ST7789V_VCOMS        0xbb
+#define ST7789V_LCMCTRL      0xc0
+#define ST7789V_VDVVRHEN     0xc2
+#define ST7789V_VRHS         0xc3
+#define ST7789V_VDVS         0xc4
+#define ST7789V_VCMOFSET     0xc5
+#define ST7789V_FRCTRL2      0xc6
+#define ST7789V_PWCTRL1      0xd0
+#define ST7789V_PVGAMCTRL    0xe0
+#define ST7789V_NVGAMCTRL    0xe1
+
+#define ST7789V_MADCTL_MY  BIT(7)
+#define ST7789V_MADCTL_MX  BIT(6)
+#define ST7789V_MADCTL_MV  BIT(5)
+#define ST7789V_MADCTL_BGR BIT(3)
+
+
+struct st7789v_cfg {
+	const struct drm_display_mode mode;
+	unsigned int left_offset;
+	unsigned int top_offset;
+	bool is_ips;   /* Controls PORCTRL and GCTRL timings */
+	bool invert;   /* Controls Color Inversion (positive/negative) */
+};
+struct st7789v_priv {
+	struct mipi_dbi_dev dbidev; /* Must be first for .release() */
+	const struct st7789v_cfg *cfg;
+};
+
+
+/* 1. Generic Fallback (Matches default behavior of fb_st7789v.c) */
+static const struct st7789v_cfg generic_cfg =3D {
+	.mode =3D { DRM_SIMPLE_MODE(240, 320, 0, 0) },
+	.is_ips =3D false,
+	.invert =3D true,
+};
+
+/* 2. HannStar 2.0" IPS (The specific panel handled in staging) */
+static const struct st7789v_cfg hsd20_ips_cfg =3D {
+	.mode =3D { DRM_SIMPLE_MODE(240, 320, 31, 41) },
+	.is_ips =3D true,
+	.invert =3D true,
+};
+
+/* 3. Inanbo 2.8" (From the 9-bit driver: No Inversion) */
+static const struct st7789v_cfg inanbo_panel_cfg =3D {
+	.mode =3D { DRM_SIMPLE_MODE(240, 320, 43, 57) },
+	.is_ips =3D false,
+	.invert =3D false,
+};
+
+/* 4. EDT 2.8" (From the 9-bit driver: Normal Inversion) */
+static const struct st7789v_cfg edt_panel_cfg =3D {
+	.mode =3D { DRM_SIMPLE_MODE(240, 320, 43, 58) },
+	.is_ips =3D false,
+	.invert =3D true,
+};
+
+/* 5. Jasonic 2.4" (From the 9-bit driver: Custom Height + Offset) */
+static const struct st7789v_cfg jasonic_panel_cfg =3D {
+	.mode =3D { DRM_SIMPLE_MODE(240, 280, 37, 43) },
+	.is_ips =3D true,
+	.invert =3D true,
+	.top_offset =3D 38,
+};
+
+DEFINE_DRM_GEM_DMA_FOPS(st7789v_fops);
+
+static const struct drm_driver st7789v_driver =3D {
+    .driver_features    =3D DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC,
+    .fops               =3D &st7789v_fops,
+    DRM_GEM_DMA_DRIVER_OPS_VMAP,
+    DRM_FBDEV_DMA_DRIVER_OPS,
+    .debugfs_init       =3D mipi_dbi_debugfs_init,
+    .name               =3D "st7789v",
+    .desc               =3D "Sitronix ST7789V",
+    .major              =3D 1,
+    .minor              =3D 0,
+};
+
+static void st7789v_pipe_enable(struct drm_simple_display_pipe *pipe,
+                                struct drm_crtc_state *crtc_state,
+                                struct drm_plane_state *plane_state)
+{
+    struct mipi_dbi_dev *dbidev =3D drm_to_mipi_dbi_dev(pipe->crtc.dev);
+    struct st7789v_priv *priv =3D container_of(dbidev, struct st7789v_priv=
, dbidev);
+    struct mipi_dbi *dbi =3D &dbidev->dbi;
+    int ret,idx;=20
+
+    if (!drm_dev_enter(pipe->crtc.dev, &idx))
+        return;
+
+    ret =3D mipi_dbi_poweron_reset(dbidev);=20
+    if (ret)
+		goto out_exit;
+
+    mipi_dbi_command(dbi, MIPI_DCS_SOFT_RESET);
+    msleep(150);
+
+    mipi_dbi_command(dbi, MIPI_DCS_EXIT_SLEEP_MODE);
+    msleep(500);
+
+    mipi_dbi_command(dbi, MIPI_DCS_SET_PIXEL_FORMAT, MIPI_DCS_PIXEL_FMT_16=
BIT);
+
+    if (priv->cfg->is_ips) {
+        mipi_dbi_command(dbi, ST7789V_PORCTRL, 0x05, 0x05, 0x00, 0x33, 0x3=
3);
+        mipi_dbi_command(dbi, ST7789V_GCTRL, 0x75);
+    } else {
+        mipi_dbi_command(dbi, ST7789V_PORCTRL, 0x0c, 0x0c, 0x00, 0x33, 0x3=
3);
+        mipi_dbi_command(dbi, ST7789V_GCTRL, 0x35);
+    }
+
+    mipi_dbi_command(dbi, ST7789V_VCOMS, 0x20);=20
+    mipi_dbi_command(dbi, ST7789V_LCMCTRL, 0x2c);
+    mipi_dbi_command(dbi, ST7789V_VDVVRHEN, 0x01);
+    mipi_dbi_command(dbi, ST7789V_VRHS, 0x12);
+    mipi_dbi_command(dbi, ST7789V_VDVS, 0x20);
+    mipi_dbi_command(dbi, ST7789V_FRCTRL2, 0x0f);
+    mipi_dbi_command(dbi, ST7789V_PWCTRL1, 0xa4, 0xa1);
+
+    mipi_dbi_command(dbi, ST7789V_PVGAMCTRL,=20
+                     0xd0, 0x04, 0x0d, 0x11, 0x13, 0x2b, 0x3f, 0x54,=20
+                     0x4c, 0x18, 0x0d, 0x0b, 0x1f, 0x23);
+    mipi_dbi_command(dbi, ST7789V_NVGAMCTRL,=20
+                     0xd0, 0x04, 0x0c, 0x11, 0x13, 0x2c, 0x3f, 0x44,=20
+                     0x51, 0x2f, 0x1f, 0x1f, 0x20, 0x23);
+
+    if (priv->cfg->invert)
+        mipi_dbi_command(dbi, MIPI_DCS_ENTER_INVERT_MODE);
+    else
+        mipi_dbi_command(dbi, MIPI_DCS_EXIT_INVERT_MODE);
+    mipi_dbi_command(dbi, MIPI_DCS_SET_DISPLAY_ON);
+    msleep(100);
+
+    u8 addr_mode =3D 0;
+
+    switch (dbidev->rotation) {
+    case 90:
+
+        addr_mode =3D ST7789V_MADCTL_MV | ST7789V_MADCTL_MY;
+        break;
+    case 180:
+        addr_mode =3D ST7789V_MADCTL_MX | ST7789V_MADCTL_MY;
+        break;
+    case 270:
+        addr_mode =3D ST7789V_MADCTL_MV | ST7789V_MADCTL_MX;
+        break;
+    default:=20
+        addr_mode =3D 0;
+        break;
+    }
+
+    addr_mode |=3D ST7789V_MADCTL_BGR;=20
+
+    mipi_dbi_command(dbi, MIPI_DCS_SET_ADDRESS_MODE, addr_mode);
+
+    mipi_dbi_enable_flush(dbidev, crtc_state, plane_state);
+
+out_exit:
+    drm_dev_exit(idx);
+}
+
+static const struct drm_simple_display_pipe_funcs st7789v_pipe_funcs =3D=20
+{
+    DRM_MIPI_DBI_SIMPLE_DISPLAY_PIPE_FUNCS(st7789v_pipe_enable),
+};
+
+static int st7789v_probe(struct spi_device *spi)
+{
+    struct device *dev =3D &spi->dev;
+    const struct st7789v_cfg *cfg;
+    struct mipi_dbi_dev *dbidev;
+    struct st7789v_priv *priv;
+    struct drm_device *drm;
+    struct mipi_dbi *dbi;
+    struct gpio_desc *dc;
+    u32 rotation =3D 0;
+    int ret;
+
+    cfg =3D device_get_match_data(&spi->dev);
+
+	if (!cfg)
+		cfg =3D (void *)spi_get_device_id(spi)->driver_data;
+
+	priv =3D devm_drm_dev_alloc(dev, &st7789v_driver,
+				  struct st7789v_priv, dbidev.drm);
+
+	if (IS_ERR(priv))
+		return PTR_ERR(priv);
+
+    dbidev =3D &priv->dbidev;
+    priv->cfg =3D cfg;
+
+    dbi =3D &dbidev->dbi;
+    drm =3D &dbidev->drm;
+
+    spi_set_drvdata(spi, drm);
+
+    dbi->reset =3D devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_HIGH);
+    if (IS_ERR(dbi->reset))
+        return dev_err_probe(dev, PTR_ERR(dbi->reset), "Failed to get GPIO=
 'reset'\n");
+
+    dc =3D devm_gpiod_get(dev, "dc", GPIOD_OUT_LOW);
+    if (IS_ERR(dc))
+        return dev_err_probe(dev, PTR_ERR(dc), "Failed to get GPIO 'dc'\n"=
);
+
+    dbidev->backlight =3D devm_of_find_backlight(dev);
+    if (IS_ERR(dbidev->backlight))
+        return PTR_ERR(dbidev->backlight);
+   =20
+    dbidev->left_offset =3D priv->cfg->left_offset;
+    dbidev->top_offset =3D priv->cfg->top_offset;
+   =20
+    device_property_read_u32(dev, "rotation", &rotation);
+
+    ret =3D mipi_dbi_spi_init(spi, dbi, dc);
+    if (ret)
+        return ret;
+   =20
+    ret =3D mipi_dbi_dev_init(dbidev, &st7789v_pipe_funcs, &cfg->mode, rot=
ation);
+    if (ret)
+        return ret;
+
+    drm_mode_config_reset(drm);
+   =20
+    ret =3D drm_dev_register(drm, 0);
+    if (ret)
+        return ret;
+
+    drm_client_setup(drm, NULL);
+
+    return 0;
+}
+
+static void st7789v_remove(struct spi_device *spi)
+{
+    struct drm_device *drm =3D spi_get_drvdata(spi);
+    drm_dev_unplug(drm);
+    drm_atomic_helper_shutdown(drm);
+}
+
+static void st7789v_shutdown(struct spi_device *spi)
+{
+    drm_atomic_helper_shutdown(spi_get_drvdata(spi));
+}
+
+
+static const struct of_device_id st7789v_of_match[] =3D {
+	{ .compatible =3D "sitronix,st7789v", .data =3D &generic_cfg },
+	{ .compatible =3D "hannstar,hsd20-ips", .data =3D &hsd20_ips_cfg },
+	{ .compatible =3D "inanbo,t28cp45tn89-v17", .data =3D &inanbo_panel_cfg },
+	{ .compatible =3D "edt,et028013dma", .data =3D &edt_panel_cfg },
+	{ .compatible =3D "jasonic,jt240mhqs-hwt-ek-e3", .data =3D &jasonic_panel=
_cfg },
+	{  }
+};
+MODULE_DEVICE_TABLE(of, st7789v_of_match);
+
+static const struct spi_device_id st7789v_id[] =3D {
+    { "st7789v", 0 },
+    { },
+};
+MODULE_DEVICE_TABLE(spi, st7789v_id);
+
+static struct spi_driver st7789v_spi_driver =3D {
+    .driver =3D {
+        .name =3D "st7789v",
+        .of_match_table =3D st7789v_of_match,
+    },
+    .probe =3D st7789v_probe,
+    .remove =3D st7789v_remove,
+    .shutdown =3D st7789v_shutdown,
+    .id_table =3D st7789v_id,
+};
+
+module_spi_driver(st7789v_spi_driver);
+
+MODULE_DESCRIPTION("Sitronix ST7789V DRM driver");
+MODULE_AUTHOR("Archit Anant <architanant5@gmail.com>");
+MODULE_LICENSE("GPL");
\ No newline at end of file
--=20
2.39.5