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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: FXVlMDW8PuDVvbn6FKzPRFVV0+dgBmFH98Iun3fpmGzqmvtGbVj37uG+4gDZ1y+v3p0n+A/Un8MHzsqDMko2fuCzOIIdGarQjaEMNiSHKDIUm8ZD6TMGT+fZwnBnYZc+y+i+kjy49SRW2uj8k7jUh0mtrXtvgfGWVF9/UmWoTcu0atTOGupvT7jcv6NFV6JPzPA+J+XhvSz/LBsu2ur85W5ZSaXV3hi635oWuiFN+9xuJnc+VOlj2IlEARV7OwIWTeEme3u5CB1gMJpjX9T5MpwQ+KTyuR4wMRZvG4ILogZhWn1WrjpBQo2AGI2JKSYo2tV4hW1gc6kt3S/1eyGusg2NIxJzhOUmdAWOI2veOTd2xw+AJG99zAVNQEXenuJQQ2/LBkwDw7cyY0MhLekOi3ptPlf6zWpkazb2Fvz7q6676bP+uwuJrn3NumXvFXg9 X-OriginatorOrg: ti.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Feb 2026 12:36:16.4225 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 87948c03-6c1d-4618-ef3a-08de6afc7b44 X-MS-Exchange-CrossTenant-Id: e5b49634-450b-4709-8abb-1e2b19b982b7 X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=e5b49634-450b-4709-8abb-1e2b19b982b7;Ip=[198.47.23.195];Helo=[lewvzet201.ext.ti.com] X-MS-Exchange-CrossTenant-AuthSource: SJ1PEPF00001CE4.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW6PR10MB7552 From: Aksh Garg Document the architecture and implementation details for the Data Object Exchange (DOE) framework for PCIe Endpoint devices. Co-developed-by: Siddharth Vadapalli Signed-off-by: Siddharth Vadapalli Signed-off-by: Aksh Garg --- Documentation/PCI/index.rst | 1 + Documentation/PCI/pci-doe-ep.rst | 291 +++++++++++++++++++++++++++++++ 2 files changed, 292 insertions(+) create mode 100644 Documentation/PCI/pci-doe-ep.rst diff --git a/Documentation/PCI/index.rst b/Documentation/PCI/index.rst index 5d720d2a415e..4c9a4e749442 100644 --- a/Documentation/PCI/index.rst +++ b/Documentation/PCI/index.rst @@ -20,3 +20,4 @@ PCI Bus Subsystem controller/index boot-interrupts tph + pci-doe-ep diff --git a/Documentation/PCI/pci-doe-ep.rst b/Documentation/PCI/pci-doe-e= p.rst new file mode 100644 index 000000000000..d6715944c117 --- /dev/null +++ b/Documentation/PCI/pci-doe-ep.rst @@ -0,0 +1,291 @@ +.. SPDX-License-Identifier: GPL-2.0-only or MIT + +.. include:: + +=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D +Data Object Exchange (DOE) for PCIe Endpoint +=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D + +:Copyright: |copy| 2026 Texas Instruments Incorporated +:Author: Aksh Garg +:Co-Author: Siddharth Vadapalli + +Overview +=3D=3D=3D=3D=3D=3D=3D=3D + +DOE (Data Object Exchange) is a standard PCIe extended capability feature = as +introduced in the Data Object Exchange (DOE) ECN for PCIe r5.0. It is an o= ptional +mechanism for system firmware/software running on root complex (host) to p= erform +:ref:`data object ` exchanges with an endpoint function.= Each +data object is uniquely identified by the Vendor ID of the vendor publishi= ng the +data object definition and a Data Object Type value assigned by that vendo= r. + +Think of DOE as a sophisticated mailbox system built into PCIe. The root c= omplex +can send structured requests to the endpoint device through DOE mailboxes,= and +the endpoint device responds with appropriate data. DOE mailboxes are impl= emented +as PCIe Extended Capabilities in endpoint devices, allowing multiple mailb= oxes +per function, each potentially supporting different data object protocols. + +The DOE support for root complex devices has already been implemented in +``drivers/pci/doe.c``. + +How DOE Works +=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D + +The DOE mailbox operates through a simple request-response model: + +1. **Host sends request**: The root complex writes a data object (vendor I= D, type, + and payload) to the DOE write mailbox register (one DWORD at a time) of= the + endpoint function's config space and sets the GO bit in the DOE Status = register + to indicate that a request is ready for processing. +2. **Endpoint processes**: The endpoint function reads the request from DO= E write + mailbox register, sets the BUSY bit in the DOE Status register, identif= ies the + protocol of the data object, and executes the appropriate handler. +3. **Endpoint responds**: The endpoint function writes the response data o= bject to the + DOE read mailbox register (one DWORD at a time), and sets the READY bit= in the DOE + Status register to indicate that the response is ready. If an error occ= urs during + request processing (such as unsupported protocol or handler failure), t= he endpoint + sets the ERROR bit in the DOE Status register instead of the READY bit. +4. **Host reads response**: The root complex retrieves the response data f= rom the DOE read + mailbox register once the READY bit is set in the DOE Status register, = and then writes + any value to this register to indicate a successful read. If the ERROR = bit was set, + the root complex discards the response and performs error handling as n= eeded. + +Each mailbox operates independently and can handle one transaction at a ti= me. The +DOE specification supports data objects of size up to 256KB (2\ :sup:`18` = dwords). + +For complete DOE capability details, refer to `PCI Express Base Specificat= ion Revision 7.0, +Section 6.30 - Data Object Exchange (DOE)`. + +Key Terminologies +=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D + +.. _data-object-term: + +**Data Object** + A structured, vendor-defined, or standard-defined message exchanged betw= een + root complex and endpoint function via DOE capability registers in confi= guration + space of the function. + +**Mailbox** + A DOE capability on the endpoint device, where each physical function ca= n have + multiple mailboxes. + +**Protocol** + A specific type of DOE communication data object identified by a Vendor = ID and Type. + +**Handler** + A function that processes DOE requests of a specific protocol and genera= tes responses. + +Architecture of DOE Implementation for Endpoint +=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D + +.. code-block:: text + + +------------------+ + | | + | Root Complex | + | | + +--------^---------+ + | + | Config space access + | over PCIe link + | + +----------v-----------+ + | | + | PCIe Controller | + | as Endpoint | + | | + | +-----------------+ | + | | DOE Mailbox | | + | +-------^---------+ | + +----------|-----------+ + +-----------|---------------------------------------------------------= ------+ + | | +-----------------= ---+ | + | +---------v--------+ Allocate | +--------------= + | | + | | |-------------------------------->| Request = | | | + | | EP Controller |-------------------------------->| Buffer = | | | + | | Driver | Free | +--------------= + | | + | | |---+ | = | | + | +--------^---------+ | Free | = | | + | | +-----------------------+ | = | | + | | | | = | | + | | pci_ep_doe_process_request() | | = | | + | | | | = | | + | +--------v---------+ | | = | | + | | |<----+ | | DDR = | | + | | DOE EP Core | | Discovery | | = | | + | | (doe-ep.c) | | Protocol | | = | | + | | |-----+ Handler | | = | | + | +--------^---------+ | | = | | + | | | | = | | + | | protocol_handler() | | = | | + | | | | = | | + | +--------v---------+ | | = | | + | | | | | +--------------= + | | + | | Protocol Handler | +---->| Response = | | | + | | Module |-------------------------------->| Buffer = | | | + | | (CMA/SPDM/Other) | Allocate | +--------------= + | | + | | | | = | | + | +------------------+ | = | | + | +-----------------= ---+ | + +---------------------------------------------------------------------= ------+ + +Initialization and Cleanup +-------------------------- + +**Framework Initialization** + +The controller driver calls ``pci_ep_doe_init(epc)`` during its probe sequ= ence. +This initializes the xarray data structure (a resizable array data structu= re +defined in linux) named ``doe_mbs`` that stores metadata of DOE mailboxes = for +the controller in ``struct pci_epc``. + +**Mailbox Registration** + +For each DOE capability found in the endpoint function's configuration spa= ce, +the controller driver calls ``pci_ep_doe_add_mailbox(epc, func_no, cap_off= set)``. +This creates a mailbox structure and allocates an ordered workqueue for pr= ocessing +DOE requests sequentially for that mailbox, enabling concurrent request ha= ndling +across different mailboxes. Each mailbox is uniquely identified by the com= bination +of physical function number and capability offset for that controller. + +**Cleanup** + +During driver removal or controller shutdown, the controller driver calls +``pci_ep_doe_destroy(epc)`` to clean up all DOE resources. This function +destroys all registered mailboxes, cancels any pending tasks, flushes and +destroys the workqueues, and frees all memory allocated to the mailboxes. + +Register and Unregister Protocol Handler +---------------------------------------- + +Protocol implementations (such as CMA, SPDM, or vendor-specific protocols) +register their handlers with the DOE EP core during module initialization. + +**Registration** + +Protocol modules call ``pci_ep_doe_register_protocol(vendor_id, type, hand= ler)`` +to register their handler function. The handler is stored in a global xarr= ay +and will be invoked when DOE requests matching the vendor ID and type are = received. +The discovery protocol (VID =3D 0x0001 (PCI-SIG vendor ID), Type =3D 0x00 = (discovery +protocol)) is handled internally by the DOE EP core and cannot be register= ed by +external modules. + +**Unregistration** + +During module cleanup, protocol modules call +``pci_ep_doe_unregister_protocol(vendor_id, type)`` to remove their handler +from the registry. + +Request Handling +---------------- + +The complete flow of a DOE request from the root complex to the response: + +**Step 1: Root Complex =E2=86=92 EP Controller Driver** + +The root complex writes a DOE request (Vendor ID, Type, and Payload) to the +DOE write mailbox register in the endpoint function's configuration space = and sets +the GO bit in the DOE Control register, indicating that the request is rea= dy for +processing. + +**Step 2: EP Controller Driver =E2=86=92 DOE EP Core** + +The controller driver reads the request header to determine the data objec= t length. +Based on this length field, it allocates a request buffer in memory (DDR) = of the +appropriate size. The driver then reads the complete request payload from = the DOE +write mailbox register and converts the data from little-endian format (th= e format +followed in the PCIe transactions over the link) to CPU-native format using +``le32_to_cpu()``. The driver creates pointers for the response buffer and= response +size, which will be populated by the protocol handler. Finally, the driver= calls +``pci_ep_doe_process_request(epc, func_no, cap_offset, vendor, type, reque= st, +request_sz, &response, &response_sz)`` to hand off the request to the DOE = EP core, +and sets the BUSY bit in the DOE Status register. + +**Step 3: DOE EP Core Processing** + +The DOE EP core looks up the protocol handler based on the Vendor ID and T= ype +from the request header. It creates a task structure and submits it to the +mailbox's ordered workqueue. This ensures that requests for each mailbox a= re +processed sequentially, one at a time, as required by the DOE specificatio= n. + +**Step 4: Protocol Handler Execution** + +The workqueue executes the task by calling the registered protocol handler: +``handler(request, request_sz, &response, &response_sz)``. The handler pro= cesses +the request, allocates a response buffer in memory (DDR), builds the respo= nse +data, and returns the response pointer and size. For the discovery protoco= l, +the DOE EP core handles this directly without invoking an external handler. + +**Step 5: DOE EP Core =E2=86=92 EP Controller Driver** + +The DOE EP core waits for the handler to complete by the work queue, and r= eturns +the response pointer and size to the controller driver. + +**Step 6: EP Controller Driver =E2=86=92 Root Complex** + +The controller driver converts the response from CPU-native format to +little-endian format using ``cpu_to_le32()``, writes the response to DOE r= ead +mailbox register, and sets the READY bit in the DOE Status register. The r= oot +complex then reads the response from the read mailbox register. Finally, +the controller driver frees both the request buffer (which it allocated) a= nd the +response buffer (which the handler allocated). + +Abort Handling +-------------- + +The DOE specification allows the root complex to abort ongoing DOE operati= ons +by setting the ABORT bit in the DOE Control register. + +**Trigger** + +When the root complex sets the ABORT bit, the EP controller driver detects= this +condition (typically in an interrupt handler or register polling routine).= The +action taken depends on the timing of the abort: + +- **ABORT during request transfer**: If the ABORT bit is set while the roo= t complex + is still transferring the request to the mailbox registers, the controll= er driver + discards the request and no call to ``pci_ep_doe_abort()`` is needed. + +- **ABORT after request submission**: If the ABORT bit is set after the re= quest + has been fully received and submitted to the DOE EP core via + ``pci_ep_doe_process_request()``, the controller driver must call + ``pci_ep_doe_abort(epc, func_no, cap_offset)`` for the affected mailbox = to + perform abort sequence in the DOE EP core. + +**Abort Sequence** + +The abort function performs the following actions: + +1. Sets the CANCEL flag on the mailbox to prevent queued requests from sta= rting +2. Flushes the workqueue to wait for any currently executing handler to co= mplete + (handlers cannot be interrupted mid-execution) +3. Clears the CANCEL flag to allow the mailbox to accept new requests + +Queued requests that have not started execution will be aborted with an er= ror +status. The currently executing request will complete normally, and the co= ntroller +will reject the response if it arrives after the abort sequence has been t= riggered. + +.. note:: + Independent of when the ABORT bit is triggered, the controller driver m= ust + clear the ERROR, BUSY, and READY bits in the DOE Status register after + completing the abort operation to reset the mailbox to an idle state. + +Error Handling +-------------- + +Errors can occur during DOE request processing for various reasons, such as +unsupported protocols, handler failures, or memory allocation failures. + +**Error Detection** + +When an error occurs during DOE request processing, the DOE EP core propag= ates this error +back to the controller driver through the ``pci_ep_doe_process_request()``= return value. + +**Error Response** + +When the controller driver receives an error code from +``pci_ep_doe_process_request()``, it sets the ERROR bit in the DOE Status +register instead of writing a response to the read mailbox register, +and frees the buffers. --=20 2.34.1 From nobody Fri Apr 17 21:53:54 2026 Received: from PH8PR06CU001.outbound.protection.outlook.com (mail-westus3azon11012008.outbound.protection.outlook.com [40.107.209.8]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DD7F3354AE7; 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charset="utf-8" From: Aksh Garg Move common macros and structures from drivers/pci/doe.c to include/linux/pci-doe.h to allow reuse across root complex and endpoint DOE implementations. Also add CONFIG_PCI_DOE guards around the root complex DOE APIs to maintain proper conditional compilation. These changes prepare the groundwork for the DOE endpoint implementation that will reuse these common definitions. Co-developed-by: Siddharth Vadapalli Signed-off-by: Siddharth Vadapalli Signed-off-by: Aksh Garg --- drivers/pci/doe.c | 11 ----------- include/linux/pci-doe.h | 38 +++++++++++++++++++++++++++++++++----- 2 files changed, 33 insertions(+), 16 deletions(-) diff --git a/drivers/pci/doe.c b/drivers/pci/doe.c index 62be9c8dbc52..0171ef3215a7 100644 --- a/drivers/pci/doe.c +++ b/drivers/pci/doe.c @@ -28,12 +28,6 @@ #define PCI_DOE_TIMEOUT HZ #define PCI_DOE_POLL_INTERVAL (PCI_DOE_TIMEOUT / 128) =20 -#define PCI_DOE_FLAG_CANCEL 0 -#define PCI_DOE_FLAG_DEAD 1 - -/* Max data object length is 2^18 dwords */ -#define PCI_DOE_MAX_LENGTH (1 << 18) - /** * struct pci_doe_mb - State for a single DOE mailbox * @@ -63,11 +57,6 @@ struct pci_doe_mb { #endif }; =20 -struct pci_doe_feature { - u16 vid; - u8 type; -}; - /** * struct pci_doe_task - represents a single query/response * diff --git a/include/linux/pci-doe.h b/include/linux/pci-doe.h index bd4346a7c4e7..a966626c47f9 100644 --- a/include/linux/pci-doe.h +++ b/include/linux/pci-doe.h @@ -13,12 +13,25 @@ #ifndef LINUX_PCI_DOE_H #define LINUX_PCI_DOE_H =20 -struct pci_doe_mb; +/* Mailbox state flags */ +#define PCI_DOE_FLAG_CANCEL 0 +#define PCI_DOE_FLAG_DEAD 1 + +/* Max data object length is 2^18 dwords */ +#define PCI_DOE_MAX_LENGTH (1 << 18) =20 -#define PCI_DOE_FEATURE_DISCOVERY 0 -#define PCI_DOE_FEATURE_CMA 1 -#define PCI_DOE_FEATURE_SSESSION 2 +#define PCI_DOE_FEATURE_DISCOVERY 0 +#define PCI_DOE_FEATURE_CMA 1 +#define PCI_DOE_FEATURE_SSESSION 2 =20 +struct pci_doe_feature { + u16 vid; + u8 type; +}; + +struct pci_doe_mb; + +#ifdef CONFIG_PCI_DOE struct pci_doe_mb *pci_find_doe_mailbox(struct pci_dev *pdev, u16 vendor, u8 type); =20 @@ -26,4 +39,19 @@ int pci_doe(struct pci_doe_mb *doe_mb, u16 vendor, u8 ty= pe, const void *request, size_t request_sz, void *response, size_t response_sz); =20 -#endif +#else +static inline struct pci_doe_mb *pci_find_doe_mailbox(struct pci_dev *pdev, + u16 vendor, u8 type) +{ + return NULL; +} + +static inline int pci_doe(struct pci_doe_mb *doe_mb, u16 vendor, u8 type, + const void *request, size_t request_sz, + void *response, size_t response_sz) +{ + return -EOPNOTSUPP; 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charset="utf-8" From: Aksh Garg DOE (Data Object Exchange) is a standard PCIe extended capability feature introduced in the Data Object Exchange (DOE) ECN for PCIe r5.0. It provides a communication mechanism primarily used for implementing PCIe security features such as device authentication, and secure link establishment. Think of DOE as a sophisticated mailbox system built into PCIe. The root complex can send structured requests to the endpoint device through DOE mailboxes, and the endpoint device responds with appropriate data. Add the DOE support for PCIe endpoint devices, enabling endpoint functions to process the DOE requests from the host. The implementation provides framework APIs for controller drivers to register mailboxes, protocol handler registration for different DOE data object types, and request processing with workqueues ensuring sequential handling per mailbox. The Discovery protocol is handled internally by the DOE core. This implementation complements the existing DOE implementation for root complex in drivers/pci/doe.c. Co-developed-by: Siddharth Vadapalli Signed-off-by: Siddharth Vadapalli Signed-off-by: Aksh Garg --- drivers/pci/Kconfig | 14 + drivers/pci/Makefile | 1 + drivers/pci/doe-ep.c | 671 ++++++++++++++++++++++++++++++++++++++++ include/linux/pci-doe.h | 69 +++++ include/linux/pci-epc.h | 4 + 5 files changed, 759 insertions(+) create mode 100644 drivers/pci/doe-ep.c diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig index e3f848ffb52a..2a57a314054c 100644 --- a/drivers/pci/Kconfig +++ b/drivers/pci/Kconfig @@ -146,6 +146,20 @@ config PCI_DOE Say Y here if you want be able to communicate with PCIe DOE mailboxes. =20 +config PCI_DOE_EP + bool "PCI Endpoint Data Object Exchange (DOE) support" + depends on PCI_ENDPOINT + help + This enables support for Data Object Exchange (DOE) protocol + on PCI Endpoint controllers. It provides a communication + mechanism through mailboxes, primarily used for PCIe security + features. + + Say Y here if you want be able to communicate using PCIe DOE + mailboxes. + + If unsure, say N. + config PCI_ECAM bool =20 diff --git a/drivers/pci/Makefile b/drivers/pci/Makefile index e10cfe5a280b..66084e2ef9b2 100644 --- a/drivers/pci/Makefile +++ b/drivers/pci/Makefile @@ -34,6 +34,7 @@ obj-$(CONFIG_PCI_P2PDMA) +=3D p2pdma.o obj-$(CONFIG_XEN_PCIDEV_FRONTEND) +=3D xen-pcifront.o obj-$(CONFIG_VGA_ARB) +=3D vgaarb.o obj-$(CONFIG_PCI_DOE) +=3D doe.o +obj-$(CONFIG_PCI_DOE_EP) +=3D doe-ep.o obj-$(CONFIG_PCI_IDE) +=3D ide.o obj-$(CONFIG_PCI_TSM) +=3D tsm.o obj-$(CONFIG_PCI_DYNAMIC_OF_NODES) +=3D of_property.o diff --git a/drivers/pci/doe-ep.c b/drivers/pci/doe-ep.c new file mode 100644 index 000000000000..ff0551644f54 --- /dev/null +++ b/drivers/pci/doe-ep.c @@ -0,0 +1,671 @@ +// SPDX-License-Identifier: GPL-2.0-only or MIT +/* + * Data Object Exchange for PCIe Endpoint + * PCIe r7.0, sec 6.30 DOE + * + * Copyright (C) 2026 Texas Instruments Incorporated - https://www.ti.com + * Aksh Garg + * Siddharth Vadapalli + */ + +#define dev_fmt(fmt) "DOE EP: " fmt + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* + * Combines function number and capability offset into a unique lookup key + * for storing/retrieving DOE mailboxes in an xarray. + */ +#define PCI_DOE_MB_KEY(func, offset) \ + (((unsigned long)(func) << 16) | (offset)) + +/** + * struct pci_doe_protocol - DOE protocol handler entry + * @vid: Vendor ID + * @type: Protocol type + * @handler: Handler function pointer + */ +struct pci_doe_protocol { + u16 vid; + u8 type; + pci_doe_protocol_handler_t handler; +}; + +/* + * Global registry of protocol handlers, + * holding struct pci_doe_protocol + */ +static DEFINE_XARRAY_ALLOC(pci_doe_protocols); + +/* Serializes concurrent accesses to pci_doe_protocols xarray */ +static DEFINE_MUTEX(protocols_mutex); + +/** + * struct pci_ep_doe_mb - State for a single DOE mailbox on EP + * + * This state is used to manage a single DOE mailbox capability on the + * endpoint side. + * + * @epc: PCI endpoint controller this mailbox belongs to + * @func_no: Physical function number of the function this mailbox belongs= to + * @cap_offset: Capability offset + * @work_queue: Queue of work items + * @flags: Bit array of PCI_DOE_FLAG_* flags + */ +struct pci_ep_doe_mb { + struct pci_epc *epc; + u8 func_no; + u16 cap_offset; + struct workqueue_struct *work_queue; + unsigned long flags; +}; + +/** + * struct pci_ep_doe_task - Represents a single DOE request/response task + * + * @feat: DOE feature (vendor ID and type) + * @request_pl: Request payload + * @request_pl_sz: Size of request payload in bytes + * @response_pl: Output pointer for response buffer + * @response_pl_sz: Output pointer for response size + * @task_status: Task completion status (0 on success, -errno on failure) + * @complete: Completion callback + * @private: Private data for completion + * @work: Work structure for workqueue + * @doe_mb: DOE mailbox handling this task + */ +struct pci_ep_doe_task { + struct pci_doe_feature feat; + const void *request_pl; + size_t request_pl_sz; + void **response_pl; + size_t *response_pl_sz; + int task_status; + void (*complete)(struct pci_ep_doe_task *task); + void *private; + + /* Initialized by pci_ep_doe_submit_task() */ + struct work_struct work; + struct pci_ep_doe_mb *doe_mb; +}; + +/** + * pci_ep_doe_init() - Initialize the DOE framework for a controller in EP= mode + * @epc: PCI endpoint controller + * + * Initialize the DOE framework data structures. This only initializes + * the xarray that will hold the mailboxes. + * + * RETURNS: 0 on success, -errno on failure + */ +int pci_ep_doe_init(struct pci_epc *epc) +{ + if (!epc) + return -EINVAL; + + xa_init(&epc->doe_mbs); + return 0; +} +EXPORT_SYMBOL_GPL(pci_ep_doe_init); + +/** + * pci_ep_doe_add_mailbox() - Add a DOE mailbox for a physical function + * @epc: PCI endpoint controller + * @func_no: Physical function number + * @cap_offset: Offset of the DOE capability + * + * Create and register a DOE mailbox for the specified physical function + * and capability offset. The controller driver should call this for each + * DOE capability it finds in its config space. + * + * RETURNS: 0 on success, -errno on failure + */ +int pci_ep_doe_add_mailbox(struct pci_epc *epc, u8 func_no, u16 cap_offset) +{ + struct pci_ep_doe_mb *doe_mb; + unsigned long key; + int ret; + + if (!epc) + return -EINVAL; + + doe_mb =3D kzalloc(sizeof(*doe_mb), GFP_KERNEL); + if (!doe_mb) + return -ENOMEM; + + doe_mb->epc =3D epc; + doe_mb->func_no =3D func_no; + doe_mb->cap_offset =3D cap_offset; + + doe_mb->work_queue =3D alloc_ordered_workqueue("pci_ep_doe[%s:pf%d:offset= %x]", 0, + dev_name(&epc->dev), + func_no, cap_offset); + if (!doe_mb->work_queue) { + dev_err(epc->dev.parent, + "[pf%d:offset%x] failed to allocate work queue\n", + func_no, cap_offset); + ret =3D -ENOMEM; + goto err_free; + } + + /* Add to xarray with composite key */ + key =3D PCI_DOE_MB_KEY(func_no, cap_offset); + ret =3D xa_insert(&epc->doe_mbs, key, doe_mb, GFP_KERNEL); + if (ret) { + dev_err(epc->dev.parent, + "[pf%d:offset%x] failed to insert mailbox: %d\n", + func_no, cap_offset, ret); + goto err_destroy; + } + + dev_dbg(epc->dev.parent, + "DOE mailbox added: pf%d offset 0x%x\n", + func_no, cap_offset); + + return 0; + +err_destroy: + destroy_workqueue(doe_mb->work_queue); +err_free: + kfree(doe_mb); + return ret; +} +EXPORT_SYMBOL_GPL(pci_ep_doe_add_mailbox); + +/** + * pci_ep_doe_register_protocol() - Register a protocol handler + * @vendor: Vendor ID + * @type: Protocol type + * @handler: Handler function pointer + * + * Register a protocol handler that will be called when DOE requests + * with the specified vendor ID and type are received. Protocol libraries + * should call this during module initialization. + * + * RETURNS: 0 on success, -errno on failure + */ +int pci_ep_doe_register_protocol(u16 vendor, u8 type, + pci_doe_protocol_handler_t handler) +{ + struct pci_doe_protocol *protocol; + unsigned long index; + int ret; + u32 id; + + if (!handler) + return -EINVAL; + + /* Don't allow registering discovery protocol */ + if (vendor =3D=3D PCI_VENDOR_ID_PCI_SIG && type =3D=3D PCI_DOE_FEATURE_DI= SCOVERY) + return -EINVAL; + + mutex_lock(&protocols_mutex); + + /* Check if already registered */ + xa_for_each(&pci_doe_protocols, index, protocol) { + if (protocol->vid =3D=3D vendor && protocol->type =3D=3D type) { + ret =3D -EEXIST; + goto err; + } + } + + protocol =3D kzalloc(sizeof(*protocol), GFP_KERNEL); + if (!protocol) { + ret =3D -ENOMEM; + goto err; + } + + protocol->vid =3D vendor; + protocol->type =3D type; + protocol->handler =3D handler; + + ret =3D xa_alloc(&pci_doe_protocols, &id, protocol, + xa_limit_32b, GFP_KERNEL); + if (ret) { + kfree(protocol); + goto err; + } + + mutex_unlock(&protocols_mutex); + + pr_debug("DOE EP: Registered protocol %04x:%02x at index %u\n", + vendor, type, id); + + return 0; + +err: + mutex_unlock(&protocols_mutex); + return ret; +} +EXPORT_SYMBOL_GPL(pci_ep_doe_register_protocol); + +/** + * pci_ep_doe_unregister_protocol() - Unregister a protocol handler + * @vendor: Vendor ID + * @type: Protocol type + * + * Unregister a previously registered protocol handler. Protocol libraries + * should call this during module cleanup. + */ +void pci_ep_doe_unregister_protocol(u16 vendor, u8 type) +{ + struct pci_doe_protocol *protocol; + unsigned long index; + + mutex_lock(&protocols_mutex); + + /* Find and remove the protocol entry */ + xa_for_each(&pci_doe_protocols, index, protocol) { + if (protocol->vid =3D=3D vendor && protocol->type =3D=3D type) { + xa_erase(&pci_doe_protocols, index); + kfree(protocol); + mutex_unlock(&protocols_mutex); + pr_debug("DOE EP: Unregistered protocol %04x:%02x\n", + vendor, type); + return; + } + } + + mutex_unlock(&protocols_mutex); + pr_warn("DOE EP: Attempted to unregister non-existent protocol %04x:%02x\= n", + vendor, type); +} +EXPORT_SYMBOL_GPL(pci_ep_doe_unregister_protocol); + +/** + * pci_ep_doe_cancel_tasks() - Cancel all pending tasks + * @doe_mb: DOE mailbox + * + * Cancel all pending tasks in the mailbox. Mark the mailbox as dead + * so no new tasks can be submitted. + */ +static void pci_ep_doe_cancel_tasks(struct pci_ep_doe_mb *doe_mb) +{ + if (!doe_mb) + return; + + /* Mark the mailbox as dead */ + set_bit(PCI_DOE_FLAG_DEAD, &doe_mb->flags); + + /* Stop all pending work items from starting */ + set_bit(PCI_DOE_FLAG_CANCEL, &doe_mb->flags); +} + +/** + * pci_ep_doe_get_mailbox() - Get DOE mailbox by function and offset + * @epc: PCI endpoint controller + * @func_no: Physical function number + * @cap_offset: Offset of the DOE capability + * + * Internal helper to look up a DOE mailbox by its function number and + * capability offset. + * + * RETURNS: Pointer to the mailbox or NULL if not found + */ +static struct pci_ep_doe_mb *pci_ep_doe_get_mailbox(struct pci_epc *epc, + u8 func_no, u16 cap_offset) +{ + unsigned long key; + + if (!epc) + return NULL; + + key =3D PCI_DOE_MB_KEY(func_no, cap_offset); + return xa_load(&epc->doe_mbs, key); +} + +/** + * pci_ep_doe_find_protocol() - Find protocol handler + * @vendor: Vendor ID + * @type: Protocol type + * + * Look up a protocol handler in the registered protocols. + * + * RETURNS: Handler function pointer or NULL if not found + */ +static pci_doe_protocol_handler_t pci_ep_doe_find_protocol(u16 vendor, u8 = type) +{ + pci_doe_protocol_handler_t handler =3D NULL; + struct pci_doe_protocol *protocol; + unsigned long index; + + mutex_lock(&protocols_mutex); + + xa_for_each(&pci_doe_protocols, index, protocol) { + if (protocol->vid =3D=3D vendor && protocol->type =3D=3D type) { + handler =3D protocol->handler; + break; + } + } + + mutex_unlock(&protocols_mutex); + return handler; +} + +/** + * pci_ep_doe_handle_discovery() - Handle Discovery protocol request + * @request: Request payload + * @request_sz: Request size + * @response: Output pointer for response buffer + * @response_sz: Output pointer for response size + * + * Handle the DOE Discovery protocol. The request contains an index specif= ying + * which protocol to query. This function creates a response containing the + * vendor ID and protocol type for the requested index, along with the next + * index value for further discovery: + * + * - next_index =3D 0: Signals this is the last protocol supported + * - next_index =3D n (non-zero): Signals more protocols available, + * query index n next + * + * RETURNS: 0 on success, -errno on failure + */ +static int pci_ep_doe_handle_discovery(const void *request, size_t request= _sz, + void **response, size_t *response_sz) +{ + struct pci_doe_protocol *protocol; + u8 requested_index, next_index; + unsigned long index; + u8 xarray_count =3D 0; + u32 *response_pl; + u32 request_pl; + u16 vendor; + u8 type; + + if (request_sz !=3D sizeof(u32)) + return -EINVAL; + + request_pl =3D *(u32 *)request; + requested_index =3D FIELD_GET(PCI_DOE_DATA_OBJECT_DISC_REQ_3_INDEX, reque= st_pl); + + mutex_lock(&protocols_mutex); + + /* Count protocols in xarray */ + xa_for_each(&pci_doe_protocols, index, protocol) + xarray_count++; + + if (requested_index > xarray_count) { + mutex_unlock(&protocols_mutex); + return -EINVAL; + } + + /* Index 0 is always Discovery protocol */ + if (requested_index =3D=3D 0) { + vendor =3D PCI_VENDOR_ID_PCI_SIG; + type =3D PCI_DOE_FEATURE_DISCOVERY; + } else { + protocol =3D xa_load(&pci_doe_protocols, (unsigned long)(requested_index= - 1)); + if (!protocol) { + mutex_unlock(&protocols_mutex); + return -EINVAL; + } + vendor =3D protocol->vid; + type =3D protocol->type; + } + mutex_unlock(&protocols_mutex); + + /* Calculate next index */ + next_index =3D (requested_index < xarray_count) ? requested_index + 1 : 0; + + response_pl =3D kzalloc(sizeof(*response_pl), GFP_KERNEL); + if (!response_pl) + return -ENOMEM; + + /* Build response */ + *response_pl =3D FIELD_PREP(PCI_DOE_DATA_OBJECT_DISC_RSP_3_VID, vendor) | + FIELD_PREP(PCI_DOE_DATA_OBJECT_DISC_RSP_3_TYPE, type) | + FIELD_PREP(PCI_DOE_DATA_OBJECT_DISC_RSP_3_NEXT_INDEX, next_index); + + *response =3D response_pl; + *response_sz =3D sizeof(*response_pl); + + return 0; +} + +static void signal_task_complete(struct pci_ep_doe_task *task, int status) +{ + task->task_status =3D status; + destroy_work_on_stack(&task->work); + task->complete(task); +} + +/** + * doe_ep_task_work() - Work function for processing DOE EP tasks + * @work: Work structure + * + * Process a DOE request by calling the appropriate protocol handler. + */ +static void doe_ep_task_work(struct work_struct *work) +{ + struct pci_ep_doe_task *task =3D container_of(work, struct pci_ep_doe_tas= k, + work); + struct pci_ep_doe_mb *doe_mb =3D task->doe_mb; + pci_doe_protocol_handler_t handler; + int rc; + + if (test_bit(PCI_DOE_FLAG_DEAD, &doe_mb->flags)) { + signal_task_complete(task, -EIO); + return; + } + + /* Check if request was aborted */ + if (test_bit(PCI_DOE_FLAG_CANCEL, &doe_mb->flags)) { + signal_task_complete(task, -ECANCELED); + return; + } + + /* Handle Discovery protocol directly */ + if (task->feat.vid =3D=3D PCI_VENDOR_ID_PCI_SIG && + task->feat.type =3D=3D PCI_DOE_FEATURE_DISCOVERY) { + rc =3D pci_ep_doe_handle_discovery(task->request_pl, + task->request_pl_sz, + task->response_pl, + task->response_pl_sz); + signal_task_complete(task, rc); + return; + } + + /* Find protocol handler in xarray */ + handler =3D pci_ep_doe_find_protocol(task->feat.vid, task->feat.type); + if (!handler) { + dev_warn(doe_mb->epc->dev.parent, + "[%d:%x] Unsupported protocol VID=3D%04x TYPE=3D%02x\n", + doe_mb->func_no, doe_mb->cap_offset, + task->feat.vid, task->feat.type); + signal_task_complete(task, -EOPNOTSUPP); + return; + } + + /* Call protocol handler */ + rc =3D handler(task->request_pl, task->request_pl_sz, + task->response_pl, task->response_pl_sz); + + signal_task_complete(task, rc); +} + +/** + * pci_ep_doe_submit_task() - Submit a task to be processed + * @doe_mb: DOE mailbox + * @task: Task to submit + * + * Submit a DOE task to the workqueue for processing. + * Task must be allocated on the stack. + * + * RETURNS: 0 on success, -errno on failure + */ +static int pci_ep_doe_submit_task(struct pci_ep_doe_mb *doe_mb, + struct pci_ep_doe_task *task) +{ + if (test_bit(PCI_DOE_FLAG_DEAD, &doe_mb->flags)) + return -EIO; + + task->doe_mb =3D doe_mb; + INIT_WORK_ONSTACK(&task->work, doe_ep_task_work); + queue_work(doe_mb->work_queue, &task->work); + return 0; +} + +static void pci_ep_doe_task_complete(struct pci_ep_doe_task *task) +{ + complete(task->private); +} + +/** + * pci_ep_doe_process_request() - Process DOE request on endpoint + * @epc: PCI endpoint controller + * @func_no: Physical function number + * @cap_offset: DOE capability offset + * @vendor: Vendor ID from request header + * @type: Protocol type from request header + * @request: Request payload in CPU-native format + * @request_sz: Size of request payload (bytes) + * @response: Output pointer for response buffer in CPU-native format + * @response_sz: Output pointer for response size (bytes) + * + * Process a DOE request received on the endpoint. The request payload sho= uld + * not include the DOE header (vendor/type/length). The protocol handler w= ill + * allocate the response buffer, which the caller (controller driver) must + * free after use. + * + * As per DOE specification, a mailbox processes one request at a time. + * Therefore, this function will never be called concurrently for the same + * mailbox by different callers. + * + * The caller is responsible for the conversion of the received DOE request + * with le32_to_cpu() before calling this function. + * Similarly, it is responsible for converting the response payload with + * cpu_to_le32() before sending it back over the DOE mailbox. + * + * The caller is also responsible for ensuring that the request size + * is within the limits defined by PCI_DOE_MAX_LENGTH. + * + * RETURNS: 0 on success, -errno on failure + */ +int pci_ep_doe_process_request(struct pci_epc *epc, u8 func_no, u16 cap_of= fset, + u16 vendor, u8 type, const void *request, + size_t request_sz, void **response, size_t *response_sz) +{ + DECLARE_COMPLETION_ONSTACK(c); + struct pci_ep_doe_mb *doe_mb; + struct pci_ep_doe_task task =3D { + .feat.vid =3D vendor, + .feat.type =3D type, + .request_pl =3D request, + .request_pl_sz =3D request_sz, + .response_pl =3D response, + .response_pl_sz =3D response_sz, + .complete =3D pci_ep_doe_task_complete, + .private =3D &c, + }; + int rc; + + doe_mb =3D pci_ep_doe_get_mailbox(epc, func_no, cap_offset); + if (!doe_mb) + return -ENODEV; + + rc =3D pci_ep_doe_submit_task(doe_mb, &task); + if (rc) + return rc; + + wait_for_completion(&c); + + return task.task_status; +} +EXPORT_SYMBOL_GPL(pci_ep_doe_process_request); + +/** + * pci_ep_doe_abort() - Abort DOE operations on a mailbox + * @epc: PCI endpoint controller + * @func_no: Physical function number + * @cap_offset: DOE capability offset + * + * Abort all queued and wait for in-flight DOE operations to complete for = the + * specified mailbox. This function is called by the EP controller driver + * when the RC sets the ABORT bit in the DOE Control register. + * + * The function will: + * + * - Set CANCEL flag to prevent new requests in the queue from starting + * - Wait for the currently executing handler to complete (cannot interrup= t) + * - Flush the workqueue to wait for all requests to be handled appropriat= ely + * - Clear CANCEL flag to prepare for new requests + * + * RETURNS: 0 on success, -errno on failure + */ +int pci_ep_doe_abort(struct pci_epc *epc, u8 func_no, u16 cap_offset) +{ + struct pci_ep_doe_mb *doe_mb; + + if (!epc) + return -EINVAL; + + doe_mb =3D pci_ep_doe_get_mailbox(epc, func_no, cap_offset); + if (!doe_mb) + return -ENODEV; + + /* Set CANCEL flag - worker will abort queued requests */ + set_bit(PCI_DOE_FLAG_CANCEL, &doe_mb->flags); + flush_workqueue(doe_mb->work_queue); + + /* Clear CANCEL flag - mailbox ready for new requests */ + clear_bit(PCI_DOE_FLAG_CANCEL, &doe_mb->flags); + + dev_dbg(epc->dev.parent, + "DOE mailbox aborted: PF%d offset 0x%x\n", + func_no, cap_offset); + + return 0; +} +EXPORT_SYMBOL_GPL(pci_ep_doe_abort); + +/** + * pci_ep_doe_destroy_mb() - Destroy a single DOE mailbox + * @doe_mb: DOE mailbox to destroy + * + * Internal function to destroy a mailbox and free its resources. + */ +static void pci_ep_doe_destroy_mb(struct pci_ep_doe_mb *doe_mb) +{ + if (!doe_mb) + return; + + pci_ep_doe_cancel_tasks(doe_mb); + + if (doe_mb->work_queue) + destroy_workqueue(doe_mb->work_queue); + + kfree(doe_mb); +} + +/** + * pci_ep_doe_destroy() - Destroy all DOE mailboxes + * @epc: PCI endpoint controller + * + * Destroy all DOE mailboxes and free associated resources. + * + * This function should be called during controller cleanup to free all + * DOE resources. + */ +void pci_ep_doe_destroy(struct pci_epc *epc) +{ + struct pci_ep_doe_mb *doe_mb; + unsigned long index; + + if (!epc) + return; + + xa_for_each(&epc->doe_mbs, index, doe_mb) + pci_ep_doe_destroy_mb(doe_mb); + + xa_destroy(&epc->doe_mbs); +} +EXPORT_SYMBOL_GPL(pci_ep_doe_destroy); diff --git a/include/linux/pci-doe.h b/include/linux/pci-doe.h index a966626c47f9..b353c3a1aa82 100644 --- a/include/linux/pci-doe.h +++ b/include/linux/pci-doe.h @@ -13,6 +13,8 @@ #ifndef LINUX_PCI_DOE_H #define LINUX_PCI_DOE_H =20 +#include + /* Mailbox state flags */ #define PCI_DOE_FLAG_CANCEL 0 #define PCI_DOE_FLAG_DEAD 1 @@ -24,12 +26,19 @@ #define PCI_DOE_FEATURE_CMA 1 #define PCI_DOE_FEATURE_SSESSION 2 =20 +typedef int (*pci_doe_protocol_handler_t)(const void *request, + size_t request_sz, + void **response, + size_t *response_sz); + struct pci_doe_feature { u16 vid; u8 type; }; =20 struct pci_doe_mb; +struct pci_dev; +struct pci_epc; =20 #ifdef CONFIG_PCI_DOE struct pci_doe_mb *pci_find_doe_mailbox(struct pci_dev *pdev, u16 vendor, @@ -54,4 +63,64 @@ static inline int pci_doe(struct pci_doe_mb *doe_mb, u16= vendor, u8 type, } #endif /* CONFIG_PCI_DOE */ =20 +#ifdef CONFIG_PCI_DOE_EP +int pci_ep_doe_init(struct pci_epc *epc); + +int pci_ep_doe_add_mailbox(struct pci_epc *epc, u8 func_no, u16 cap_offset= ); + +int pci_ep_doe_register_protocol(u16 vendor, u8 type, + pci_doe_protocol_handler_t handler); + +void pci_ep_doe_unregister_protocol(u16 vendor, u8 type); + +int pci_ep_doe_process_request(struct pci_epc *epc, u8 func_no, u16 cap_of= fset, + u16 vendor, u8 type, const void *request, + size_t request_sz, void **response, size_t *response_sz); + +int pci_ep_doe_abort(struct pci_epc *epc, u8 func_no, u16 cap_offset); + +void pci_ep_doe_destroy(struct pci_epc *epc); + +#else +static inline int pci_ep_doe_init(struct pci_epc *epc) +{ + return -EOPNOTSUPP; +} + +static inline int pci_ep_doe_add_mailbox(struct pci_epc *epc, u8 func_no, + u16 cap_offset) +{ + return -EOPNOTSUPP; +} + +static inline int pci_ep_doe_register_protocol(u16 vendor, u8 type, + pci_doe_protocol_handler_t handler) +{ + return -EOPNOTSUPP; +} + +static inline void pci_ep_doe_unregister_protocol(u16 vendor, u8 type) +{ +} + +static inline int pci_ep_doe_process_request(struct pci_epc *epc, u8 func_= no, u16 cap_offset, + u16 vendor, u8 type, + const void *request, size_t request_sz, + void **response, size_t *response_sz) +{ + return -EOPNOTSUPP; +} + +static inline int pci_ep_doe_abort(struct pci_epc *epc, u8 func_no, + u16 cap_offset) +{ + return -EOPNOTSUPP; +} + +static inline void pci_ep_doe_destroy(struct pci_epc *epc) +{ +} + +#endif /* CONFIG_PCI_DOE_EP */ + #endif /* LINUX_PCI_DOE_H */ diff --git a/include/linux/pci-epc.h b/include/linux/pci-epc.h index 4286bfdbfdfa..ad4de4d33da3 100644 --- a/include/linux/pci-epc.h +++ b/include/linux/pci-epc.h @@ -165,6 +165,7 @@ struct pci_epc_mem { * @domain_nr: PCI domain number of the endpoint controller * @init_complete: flag to indicate whether the EPC initialization is comp= lete * or not + * @doe_mbs: array of DOE mailboxes (CONFIG_PCI_DOE_EP) */ struct pci_epc { struct device dev; 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charset="utf-8" From: Aksh Garg Add kernel-doc API reference section to the DOE endpoint documentation, documenting the exported functions from drivers/pci/doe-ep.c for use by endpoint controller drivers and protocol handler modules. Co-developed-by: Siddharth Vadapalli Signed-off-by: Siddharth Vadapalli Signed-off-by: Aksh Garg --- Documentation/PCI/pci-doe-ep.rst | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/PCI/pci-doe-ep.rst b/Documentation/PCI/pci-doe-e= p.rst index d6715944c117..6ad064e838e7 100644 --- a/Documentation/PCI/pci-doe-ep.rst +++ b/Documentation/PCI/pci-doe-ep.rst @@ -289,3 +289,9 @@ When the controller driver receives an error code from ``pci_ep_doe_process_request()``, it sets the ERROR bit in the DOE Status register instead of writing a response to the read mailbox register, and frees the buffers. + +API Reference +=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D + +.. kernel-doc:: drivers/pci/doe-ep.c + :export: --=20 2.34.1