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(unknown [210.73.43.101]) by APP-05 (Coremail) with SMTP id zQCowAC3RgqO_o5pQN4uCA--.25463S5; Fri, 13 Feb 2026 18:36:02 +0800 (CST) From: Jiakai Xu To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org, kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, linux-kselftest@vger.kernel.org Cc: Anup Patel , Atish Patra , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Andrew Jones , Paolo Bonzini , Shuah Khan , Jiakai Xu , Jiakai Xu Subject: [PATCH v7 3/3] RISC-V: KVM: selftests: Add RISC-V SBI STA shmem alignment tests Date: Fri, 13 Feb 2026 10:35:57 +0000 Message-Id: <20260213103557.3207335-4-xujiakai2025@iscas.ac.cn> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260213103557.3207335-1-xujiakai2025@iscas.ac.cn> References: <20260213103557.3207335-1-xujiakai2025@iscas.ac.cn> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: zQCowAC3RgqO_o5pQN4uCA--.25463S5 X-Coremail-Antispam: 1UD129KBjvJXoWxCr1fKw17CrWDCF4rurWrGrg_yoW5Xr4fpr Z7Gr90qrW8trs3t34xKr1vqF4FgrWvkr4vvry7Zw4rAF4xtF1xJryUKFyDZ343WrZ5XF1S vFySqF45uF4DAaDanT9S1TB71UUUUU7qnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDU0xBIdaVrnRJUUUQF14x267AKxVWrJVCq3wAFc2x0x2IEx4CE42xK8VAvwI8IcIk0 rVWrJVCq3wAFIxvE14AKwVWUJVWUGwA2048vs2IY020E87I2jVAFwI0_JrWl82xGYIkIc2 x26xkF7I0E14v26ryj6s0DM28lY4IEw2IIxxk0rwA2F7IY1VAKz4vEj48ve4kI8wA2z4x0 Y4vE2Ix0cI8IcVAFwI0_Gr0_Xr1l84ACjcxK6xIIjxv20xvEc7CjxVAFwI0_Cr0_Gr1UM2 8EF7xvwVC2z280aVAFwI0_GcCE3s1l84ACjcxK6I8E87Iv6xkF7I0E14v26rxl6s0DM2vY z4IE04k24VAvwVAKI4IrM2AIxVAIcxkEcVAq07x20xvEncxIr21l5I8CrVACY4xI64kE6c 02F40Ex7xfMcIj6xIIjxv20xvE14v26r1j6r18McIj6I8E87Iv67AKxVWUJVW8JwAm72CE 4IkC6x0Yz7v_Jr0_Gr1lF7xvr2IYc2Ij64vIr41lF7I21c0EjII2zVCS5cI20VAGYxC7M4 IIrI8v6xkF7I0E8cxan2IY04v7MxkF7I0En4kS14v26r1q6r43MxAIw28IcxkI7VAKI48J MxC20s026xCaFVCjc4AY6r1j6r4UMI8I3I0E5I8CrVAFwI0_Jr0_Jr4lx2IqxVCjr7xvwV AFwI0_JrI_JrWlx4CE17CEb7AF67AKxVW8ZVWrXwCIc40Y0x0EwIxGrwCI42IY6xIIjxv2 0xvE14v26r1j6r1xMIIF0xvE2Ix0cI8IcVCY1x0267AKxVWxJVW8Jr1lIxAIcVCF04k26c xKx2IYs7xG6r1j6r1xMIIF0xvEx4A2jsIE14v26r1j6r4UMIIF0xvEx4A2jsIEc7CjxVAF wI0_Gr0_Gr1UYxBIdaVFxhVjvjDU0xZFpf9x0JUmiifUUUUU= X-CM-SenderInfo: 50xmxthndljiysv6x2xfdvhtffof0/1tbiCRARCWmOigf8bQACs4 Content-Type: text/plain; charset="utf-8" Add RISC-V KVM selftests to verify the SBI Steal-Time Accounting (STA) shared memory alignment requirements. The SBI specification requires the STA shared memory GPA to be 64-byte aligned, or set to all-ones to explicitly disable steal-time accounting. This test verifies that KVM enforces the expected behavior when configuring the SBI STA shared memory via KVM_SET_ONE_REG. Specifically, the test checks that: - misaligned GPAs are rejected with -EINVAL - 64-byte aligned GPAs are accepted - all-ones GPA is accepted Signed-off-by: Jiakai Xu Signed-off-by: Jiakai Xu --- V6 -> V7:=20 - Removed RISCV_SBI_STA_REG() macro addition and used existing=20 KVM_REG_RISCV_SBI_STA_REG(shmem_lo) instead. - Refined assertion messages per review feedback. - Split into two patches per Andrew Jones' suggestion: Refactored UAPI tests from steal_time_init() into dedicated=20 check_steal_time_uapi() function and added empty stub for=20 RISC-V. Filled in RISC-V stub with STA alignment tests. (this patch) --- tools/testing/selftests/kvm/steal_time.c | 26 +++++++++++++++++++++++- 1 file changed, 25 insertions(+), 1 deletion(-) diff --git a/tools/testing/selftests/kvm/steal_time.c b/tools/testing/selft= ests/kvm/steal_time.c index a814f6f3f8b41..2af7fd7513d55 100644 --- a/tools/testing/selftests/kvm/steal_time.c +++ b/tools/testing/selftests/kvm/steal_time.c @@ -233,6 +233,7 @@ static void check_steal_time_uapi(struct kvm_vcpu *vcpu) =20 /* SBI STA shmem must have 64-byte alignment */ #define STEAL_TIME_SIZE ((sizeof(struct sta_struct) + 63) & ~63) +#define INVALID_GPA (~(u64)0) =20 static vm_paddr_t st_gpa[NR_VCPUS]; =20 @@ -327,7 +328,30 @@ static void steal_time_dump(struct kvm_vm *vm, uint32_= t vcpu_idx) =20 static void check_steal_time_uapi(struct kvm_vcpu *vcpu) { - /* RISC-V UAPI tests will be added in a subsequent patch */ + struct kvm_one_reg reg; + uint64_t shmem; + int ret; + + reg.id =3D KVM_REG_RISCV_SBI_STA_REG(shmem_lo); + reg.addr =3D (uint64_t)&shmem; + + /* Case 1: misaligned GPA */ + shmem =3D ST_GPA_BASE + 1; + ret =3D __vcpu_ioctl(vcpu, KVM_SET_ONE_REG, ®); + TEST_ASSERT(ret =3D=3D -1 && errno =3D=3D EINVAL, + "misaligned STA shmem returns -EINVAL"); + + /* Case 2: 64-byte aligned GPA */ + shmem =3D ST_GPA_BASE; + ret =3D __vcpu_ioctl(vcpu, KVM_SET_ONE_REG, ®); + TEST_ASSERT(ret =3D=3D 0, + "aligned STA shmem succeeds"); + + /* Case 3: INVALID_GPA disables STA */ + shmem =3D INVALID_GPA; + ret =3D __vcpu_ioctl(vcpu, KVM_SET_ONE_REG, ®); + TEST_ASSERT(ret =3D=3D 0, + "all-ones for STA shmem succeeds"); } =20 #endif --=20 2.34.1