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[210.61.187.172]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-3567eba9b2esm8814759a91.9.2026.02.13.06.54.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 13 Feb 2026 06:54:55 -0800 (PST) From: Jun Nie Date: Fri, 13 Feb 2026 22:54:26 +0800 Subject: [PATCH v18 2/4] drm/msm/dpu: Defer SSPP allocation until CRTC check Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260213-msm-next-quad-pipe-split-v18-2-5815158d3635@linaro.org> References: <20260213-msm-next-quad-pipe-split-v18-0-5815158d3635@linaro.org> In-Reply-To: <20260213-msm-next-quad-pipe-split-v18-0-5815158d3635@linaro.org> To: Abhinav Kumar , Dmitry Baryshkov , Sean Paul , Marijn Suijten , David Airlie , Simona Vetter , Rob Clark , Neil Armstrong Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org, Jun Nie X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1770994473; l=9685; i=jun.nie@linaro.org; s=20240403; h=from:subject:message-id; bh=i1RzzvrabPDykfHEg1NdrWB/7Psq7/tLp+Qwsh/cZPk=; b=nr7UC/X9qLl1fHVfTwnuqUJxOxnsm/m4g0kvNNqOcNxbzasp4NRSTg/+c8/2G4mlqNns6S52K H8bBOWmtDoPBjCp43KDF0ZfAOm/UtVlqmpvYNVPxnmYXvQVJSgFx1s9 X-Developer-Key: i=jun.nie@linaro.org; a=ed25519; pk=MNiBt/faLPvo+iJoP1hodyY2x6ozVXL8QMptmsKg3cc= Currently, mapping plane to SSPP occurs during the plane check phase for non-virtual plane case. The SSPP allocation and plane mapping occurs during crtc check phase for virtual plane case. Defer these SSPP operations until CRTC check stage to unify the 2 cases, and ease later revisement for quad-pipe change. Signed-off-by: Jun Nie --- drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 3 +- drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 155 +++++++++++++-------------= ---- 2 files changed, 66 insertions(+), 92 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c b/drivers/gpu/drm/msm= /disp/dpu1/dpu_crtc.c index 6bf7c46379aed..797296b14264e 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c @@ -1534,8 +1534,7 @@ static int dpu_crtc_atomic_check(struct drm_crtc *crt= c, return rc; } =20 - if (dpu_use_virtual_planes && - (crtc_state->planes_changed || crtc_state->zpos_changed)) { + if (crtc_state->planes_changed || crtc_state->zpos_changed) { rc =3D dpu_crtc_reassign_planes(crtc, crtc_state); if (rc < 0) return rc; diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c b/drivers/gpu/drm/ms= m/disp/dpu1/dpu_plane.c index 66f240ce29d07..be1a7fcf11b81 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c @@ -1119,102 +1119,24 @@ static int dpu_plane_atomic_check(struct drm_plane= *plane, struct drm_plane_state *new_plane_state =3D drm_atomic_get_new_plane_stat= e(state, plane); int ret =3D 0; - struct dpu_plane *pdpu =3D to_dpu_plane(plane); - struct dpu_plane_state *pstate =3D to_dpu_plane_state(new_plane_state); - struct dpu_kms *dpu_kms =3D _dpu_plane_get_kms(plane); - struct dpu_sw_pipe *pipe =3D &pstate->pipe[0]; - struct dpu_sw_pipe *r_pipe =3D &pstate->pipe[1]; - struct dpu_sw_pipe_cfg *pipe_cfg =3D &pstate->pipe_cfg[0]; - struct dpu_sw_pipe_cfg *r_pipe_cfg =3D &pstate->pipe_cfg[1]; - const struct drm_crtc_state *crtc_state =3D NULL; - uint32_t max_linewidth =3D dpu_kms->catalog->caps->max_linewidth; + struct drm_crtc_state *crtc_state =3D NULL; =20 if (new_plane_state->crtc) crtc_state =3D drm_atomic_get_new_crtc_state(state, new_plane_state->crtc); =20 - pipe->sspp =3D dpu_rm_get_sspp(&dpu_kms->rm, pdpu->pipe); - - if (!pipe->sspp) - return -EINVAL; - ret =3D dpu_plane_atomic_check_nosspp(plane, new_plane_state, crtc_state); if (ret) return ret; =20 - ret =3D dpu_plane_split(plane, new_plane_state, crtc_state); - if (ret) - return ret; - if (!new_plane_state->visible) return 0; =20 - if (!dpu_plane_try_multirect_parallel(pipe, pipe_cfg, r_pipe, r_pipe_cfg, - pipe->sspp, - msm_framebuffer_format(new_plane_state->fb), - max_linewidth)) { - DPU_DEBUG_PLANE(pdpu, "invalid " DRM_RECT_FMT " /" DRM_RECT_FMT - " max_line:%u, can't use split source\n", - DRM_RECT_ARG(&pipe_cfg->src_rect), - DRM_RECT_ARG(&r_pipe_cfg->src_rect), - max_linewidth); - return -E2BIG; - } - - return dpu_plane_atomic_check_sspp(plane, state, crtc_state); -} - -static int dpu_plane_virtual_atomic_check(struct drm_plane *plane, - struct drm_atomic_state *state) -{ - struct drm_plane_state *plane_state =3D - drm_atomic_get_plane_state(state, plane); - struct drm_plane_state *old_plane_state =3D - drm_atomic_get_old_plane_state(state, plane); - struct dpu_plane_state *pstate =3D to_dpu_plane_state(plane_state); - struct drm_crtc_state *crtc_state =3D NULL; - int ret, i; - - if (IS_ERR(plane_state)) - return PTR_ERR(plane_state); - - if (plane_state->crtc) - crtc_state =3D drm_atomic_get_new_crtc_state(state, - plane_state->crtc); - - ret =3D dpu_plane_atomic_check_nosspp(plane, plane_state, crtc_state); - if (ret) - return ret; - - ret =3D dpu_plane_split(plane, plane_state, crtc_state); - if (ret) - return ret; - - if (!plane_state->visible) { - /* - * resources are freed by dpu_crtc_assign_plane_resources(), - * but clean them here. - */ - for (i =3D 0; i < PIPES_PER_PLANE; i++) - pstate->pipe[i].sspp =3D NULL; - - return 0; - } - /* - * Force resource reallocation if the format of FB or src/dst have - * changed. We might need to allocate different SSPP or SSPPs for this - * plane than the one used previously. + * To trigger the callback of dpu_assign_plane_resources() to + * finish the sspp assignment or allocation and check. */ - if (!old_plane_state || !old_plane_state->fb || - old_plane_state->src_w !=3D plane_state->src_w || - old_plane_state->src_h !=3D plane_state->src_h || - old_plane_state->crtc_w !=3D plane_state->crtc_w || - old_plane_state->crtc_h !=3D plane_state->crtc_h || - msm_framebuffer_format(old_plane_state->fb) !=3D - msm_framebuffer_format(plane_state->fb)) - crtc_state->planes_changed =3D true; - + crtc_state->planes_changed =3D true; return 0; } =20 @@ -1261,9 +1183,9 @@ static int dpu_plane_virtual_assign_resources(struct = drm_crtc *crtc, struct dpu_global_state *global_state, struct drm_atomic_state *state, struct drm_plane_state *plane_state, + const struct drm_crtc_state *crtc_state, struct drm_plane_state **prev_adjacent_plane_state) { - const struct drm_crtc_state *crtc_state =3D NULL; struct drm_plane *plane =3D plane_state->plane; struct dpu_kms *dpu_kms =3D _dpu_plane_get_kms(plane); struct dpu_rm_sspp_requirements reqs; @@ -1273,10 +1195,6 @@ static int dpu_plane_virtual_assign_resources(struct= drm_crtc *crtc, const struct msm_format *fmt; int i, ret; =20 - if (plane_state->crtc) - crtc_state =3D drm_atomic_get_new_crtc_state(state, - plane_state->crtc); - pstate =3D to_dpu_plane_state(plane_state); for (i =3D 0; i < STAGES_PER_PLANE; i++) prev_adjacent_pstate[i] =3D prev_adjacent_plane_state[i] ? @@ -1288,6 +1206,10 @@ static int dpu_plane_virtual_assign_resources(struct= drm_crtc *crtc, if (!plane_state->fb) return -EINVAL; =20 + ret =3D dpu_plane_split(plane, plane_state, crtc_state); + if (ret) + return ret; + fmt =3D msm_framebuffer_format(plane_state->fb); reqs.yuv =3D MSM_FORMAT_IS_YUV(fmt); reqs.scale =3D (plane_state->src_w >> 16 !=3D plane_state->crtc_w) || @@ -1318,14 +1240,56 @@ static int dpu_plane_virtual_assign_resources(struc= t drm_crtc *crtc, return dpu_plane_atomic_check_sspp(plane, state, crtc_state); } =20 +static int dpu_plane_assign_resources(struct drm_crtc *crtc, + struct dpu_global_state *global_state, + struct drm_atomic_state *state, + struct drm_plane_state *plane_state, + const struct drm_crtc_state *crtc_state, + struct drm_plane_state **prev_adjacent_plane_state) +{ + struct drm_plane *plane =3D plane_state->plane; + struct dpu_kms *dpu_kms =3D _dpu_plane_get_kms(plane); + struct dpu_plane_state *pstate =3D to_dpu_plane_state(plane_state); + struct dpu_sw_pipe *pipe =3D &pstate->pipe[0]; + struct dpu_sw_pipe *r_pipe =3D &pstate->pipe[1]; + struct dpu_sw_pipe_cfg *pipe_cfg =3D &pstate->pipe_cfg[0]; + struct dpu_sw_pipe_cfg *r_pipe_cfg =3D &pstate->pipe_cfg[1]; + struct dpu_plane *pdpu =3D to_dpu_plane(plane); + int ret; + + pipe->sspp =3D dpu_rm_get_sspp(&dpu_kms->rm, pdpu->pipe); + if (!pipe->sspp) + return -EINVAL; + + ret =3D dpu_plane_split(plane, plane_state, crtc_state); + if (ret) + return ret; + + if (!dpu_plane_try_multirect_parallel(pipe, pipe_cfg, r_pipe, r_pipe_cfg, + pipe->sspp, + msm_framebuffer_format(plane_state->fb), + dpu_kms->catalog->caps->max_linewidth)) { + DPU_DEBUG_PLANE(pdpu, "invalid " DRM_RECT_FMT " /" DRM_RECT_FMT + " max_line:%u, can't use split source\n", + DRM_RECT_ARG(&pipe_cfg->src_rect), + DRM_RECT_ARG(&r_pipe_cfg->src_rect), + dpu_kms->catalog->caps->max_linewidth); + return -E2BIG; + } + + return dpu_plane_atomic_check_sspp(plane, state, crtc_state); +} + int dpu_assign_plane_resources(struct dpu_global_state *global_state, struct drm_atomic_state *state, struct drm_crtc *crtc, struct drm_plane_state **states, unsigned int num_planes) { - unsigned int i; struct drm_plane_state *prev_adjacent_plane_state[STAGES_PER_PLANE] =3D {= NULL }; + const struct drm_crtc_state *crtc_state =3D NULL; + unsigned int i; + int ret; =20 for (i =3D 0; i < num_planes; i++) { struct drm_plane_state *plane_state =3D states[i]; @@ -1334,8 +1298,19 @@ int dpu_assign_plane_resources(struct dpu_global_sta= te *global_state, !plane_state->visible) continue; =20 - int ret =3D dpu_plane_virtual_assign_resources(crtc, global_state, + if (plane_state->crtc) + crtc_state =3D drm_atomic_get_new_crtc_state(state, + plane_state->crtc); + + if (!dpu_use_virtual_planes) + ret =3D dpu_plane_assign_resources(crtc, global_state, + state, plane_state, + crtc_state, + prev_adjacent_plane_state); + else + ret =3D dpu_plane_virtual_assign_resources(crtc, global_state, state, plane_state, + crtc_state, prev_adjacent_plane_state); if (ret) return ret; @@ -1772,7 +1747,7 @@ static const struct drm_plane_helper_funcs dpu_plane_= helper_funcs =3D { static const struct drm_plane_helper_funcs dpu_plane_virtual_helper_funcs = =3D { .prepare_fb =3D dpu_plane_prepare_fb, .cleanup_fb =3D dpu_plane_cleanup_fb, - .atomic_check =3D dpu_plane_virtual_atomic_check, + .atomic_check =3D dpu_plane_atomic_check, .atomic_update =3D dpu_plane_atomic_update, }; =20 --=20 2.43.0