From nobody Thu Apr 2 20:14:35 2026 Received: from bali.collaboradmins.com (bali.collaboradmins.com [148.251.105.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 645F33559F1; Thu, 12 Feb 2026 16:24:08 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=148.251.105.195 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770913449; cv=none; b=OGpsjFDQnKe3xd9n2pGJAgvnvOUr+EmrGR9zZkr0q1Li5tpq0DALvLn1QXr2vv0qqCEM7B2DxZ7Kll+uK8m488UrK7JOHHe2cVc1JL5PsZ3g34SJXqh20A7m1b2V9CtFyRoUcQOAGXYUdz9dJyaRk32+AH3Xpm3HR5xOkCp8kDg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770913449; c=relaxed/simple; bh=vBBpxpebLiYJIkQxlVMyNrGvtfsuoFLONoMpU1V0tnA=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=aMI55aumWQScpXhW5i2FapPuKQL3+eIHtA0+vOet0MiDo/4wBtL+7q0DFtcsTkCZUK6ZkXw0iQpyOLctnQ5eIla5v9YCCEsL7NkzfLoa1VorHWKkTjfSOIXjC0ClDpaEsrupwzlsgwq+6AtR1+vZjv0d4wSyA2droxEqSm/TbmY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b=llB9yrhO; arc=none smtp.client-ip=148.251.105.195 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b="llB9yrhO" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1770913446; bh=vBBpxpebLiYJIkQxlVMyNrGvtfsuoFLONoMpU1V0tnA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=llB9yrhOo03sz5nB1W2bO7oKNmywE3mQx95PEoFBf5IO7Xmy+m53z8CS/dbszM40c DAHfMqq4pKyVJwTp7vVFJ+Wua5OLOKuvASybimOwsxRzJJxdfEketRMWJU5MfxtTct ZiIduCsgzdYTMJpzz0+IH7dGiaxEWUGfFiqAFQOTgdM4lroenJhxFgRj3prFsR8KT2 wGPjp7jMec5+ue0CqhZ09Qv5EcagKrxvwWXVhXULftOkWLuaaPVlocxLxojPxC7jH5 XsYmKve3wwz0EO3D11QTHCP8UZBxcSlyRFtbvaWZ3M2bsXxB7bwVBG2RBPnmVcFp2y GDWT7Uu2VNxYQ== Received: from trenzalore (modemcable014.2-22-96.mc.videotron.ca [96.22.2.14]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: detlev) by bali.collaboradmins.com (Postfix) with ESMTPSA id AA85B17E0E6A; Thu, 12 Feb 2026 17:24:03 +0100 (CET) From: Detlev Casanova To: linux-kernel@vger.kernel.org Cc: Nicolas Dufresne , Benjamin Gaignard , Philipp Zabel , Mauro Carvalho Chehab , Heiko Stuebner , Daniel Almeida , Steven Rostedt , Masami Hiramatsu , Mathieu Desnoyers , Hans Verkuil , Laurent Pinchart , Ricardo Ribalda , Yunke Cao , Detlev Casanova , Sakari Ailus , Pavan Bobba , James Cowgill , Ma Ke , Jacopo Mondi , Daniel Scally , linux-media@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-trace-kernel@vger.kernel.org, kernel@collabora.com Subject: [PATCH 09/11] media: hantro: Add v4l2_hw run/done traces Date: Thu, 12 Feb 2026 11:23:26 -0500 Message-ID: <20260212162328.192217-10-detlev.casanova@collabora.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260212162328.192217-1-detlev.casanova@collabora.com> References: <20260212162328.192217-1-detlev.casanova@collabora.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add the trace calls as well as retrieving the number of clock cycles for the rockchip_vpu core. Signed-off-by: Detlev Casanova --- drivers/media/platform/verisilicon/hantro.h | 1 + drivers/media/platform/verisilicon/hantro_drv.c | 10 ++++++++++ .../media/platform/verisilicon/rockchip_vpu981_regs.h | 1 + drivers/media/platform/verisilicon/rockchip_vpu_hw.c | 4 ++++ 4 files changed, 16 insertions(+) diff --git a/drivers/media/platform/verisilicon/hantro.h b/drivers/media/pl= atform/verisilicon/hantro.h index 0353de154a1e..d5cddc783688 100644 --- a/drivers/media/platform/verisilicon/hantro.h +++ b/drivers/media/platform/verisilicon/hantro.h @@ -253,6 +253,7 @@ struct hantro_ctx { =20 u32 sequence_cap; u32 sequence_out; + u32 hw_cycles; =20 const struct hantro_fmt *vpu_src_fmt; struct v4l2_pix_format_mplane src_fmt; diff --git a/drivers/media/platform/verisilicon/hantro_drv.c b/drivers/medi= a/platform/verisilicon/hantro_drv.c index 94f58f4e4a4e..8dd26ca32459 100644 --- a/drivers/media/platform/verisilicon/hantro_drv.c +++ b/drivers/media/platform/verisilicon/hantro_drv.c @@ -25,6 +25,8 @@ #include #include =20 +#include + #include "hantro_v4l2.h" #include "hantro.h" #include "hantro_hw.h" @@ -103,6 +105,9 @@ void hantro_irq_done(struct hantro_dev *vpu, struct hantro_ctx *ctx =3D v4l2_m2m_get_curr_priv(vpu->m2m_dev); =20 + if (ctx) + trace_v4l2_hw_done(ctx->fh.tgid, ctx->fh.fd, ctx->hw_cycles); + /* * If cancel_delayed_work returns false * the timeout expired. The watchdog is running, @@ -125,6 +130,9 @@ void hantro_watchdog(struct work_struct *work) ctx =3D v4l2_m2m_get_curr_priv(vpu->m2m_dev); if (ctx) { vpu_err("frame processing timed out!\n"); + + trace_v4l2_hw_done(ctx->fh.tgid, ctx->fh.fd, ctx->hw_cycles); + if (ctx->codec_ops->reset) ctx->codec_ops->reset(ctx); hantro_job_finish(vpu, ctx, VB2_BUF_STATE_ERROR); @@ -189,6 +197,8 @@ static void device_run(void *priv) if (ctx->codec_ops->run(ctx)) goto err_cancel_job; =20 + trace_v4l2_hw_run(ctx->fh.tgid, ctx->fh.fd); + return; =20 err_cancel_job: diff --git a/drivers/media/platform/verisilicon/rockchip_vpu981_regs.h b/dr= ivers/media/platform/verisilicon/rockchip_vpu981_regs.h index e4008da64f19..96b85470208b 100644 --- a/drivers/media/platform/verisilicon/rockchip_vpu981_regs.h +++ b/drivers/media/platform/verisilicon/rockchip_vpu981_regs.h @@ -451,6 +451,7 @@ #define av1_pp0_dup_ver AV1_DEC_REG(394, 16, 0xff) #define av1_pp0_dup_hor AV1_DEC_REG(394, 24, 0xff) =20 +#define AV1_CYCLE_COUNT (AV1_SWREG(63)) #define AV1_TILE_OUT_LU (AV1_SWREG(65)) #define AV1_REFERENCE_Y(i) (AV1_SWREG(67) + ((i) * 0x8)) #define AV1_SEGMENTATION (AV1_SWREG(81)) diff --git a/drivers/media/platform/verisilicon/rockchip_vpu_hw.c b/drivers= /media/platform/verisilicon/rockchip_vpu_hw.c index 02673be9878e..f959151b6645 100644 --- a/drivers/media/platform/verisilicon/rockchip_vpu_hw.c +++ b/drivers/media/platform/verisilicon/rockchip_vpu_hw.c @@ -424,6 +424,8 @@ static irqreturn_t rk3588_vpu981_irq(int irq, void *dev= _id) { struct hantro_dev *vpu =3D dev_id; enum vb2_buffer_state state; + struct hantro_ctx *ctx =3D + v4l2_m2m_get_curr_priv(vpu->m2m_dev); u32 status; =20 status =3D vdpu_read(vpu, AV1_REG_INTERRUPT); @@ -433,6 +435,8 @@ static irqreturn_t rk3588_vpu981_irq(int irq, void *dev= _id) vdpu_write(vpu, 0, AV1_REG_INTERRUPT); vdpu_write(vpu, AV1_REG_CONFIG_DEC_CLK_GATE_E, AV1_REG_CONFIG); =20 + ctx->hw_cycles =3D vdpu_read(vpu, AV1_CYCLE_COUNT); + hantro_irq_done(vpu, state); =20 return IRQ_HANDLED; --=20 2.53.0