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charset="utf-8" In AXIMCDMA scatter-gather mode, the hardware sets the completion bit when a transfer finishes. The driver now checks this bit to free descriptors from the active list and move them to the done list. This is required when interrupt delay timeout Dly_IrqEn is enabled, as interrupts may be triggered before the configured threshold is reached, even if not all descriptors have completed. Signed-off-by: Srinivas Neeli --- drivers/dma/xilinx/xilinx_dma.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/drivers/dma/xilinx/xilinx_dma.c b/drivers/dma/xilinx/xilinx_dm= a.c index e09a22721c01..e3f8c0f09a17 100644 --- a/drivers/dma/xilinx/xilinx_dma.c +++ b/drivers/dma/xilinx/xilinx_dma.c @@ -1762,6 +1762,18 @@ static void xilinx_dma_complete_descriptor(struct xi= linx_dma_chan *chan) struct xilinx_axidma_tx_segment, node); if (!(seg->hw.status & XILINX_DMA_BD_COMP_MASK) && chan->has_sg) break; + } else if (chan->xdev->dma_config->dmatype =3D=3D XDMA_TYPE_AXIMCDMA) { + struct xilinx_aximcdma_tx_segment *seg; + bool completed; + + seg =3D list_last_entry(&desc->segments, + struct xilinx_aximcdma_tx_segment, + node); + completed =3D (chan->direction =3D=3D DMA_DEV_TO_MEM) ? + (seg->hw.s2mm_status & XILINX_DMA_BD_COMP_MASK) : + (seg->hw.mm2s_status & XILINX_DMA_BD_COMP_MASK); + if (!completed) + break; } if (chan->has_sg && chan->xdev->dma_config->dmatype !=3D XDMA_TYPE_VDMA) --=20 2.25.1