From nobody Thu Apr 2 19:00:21 2026 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 10BC22E8B87; Thu, 12 Feb 2026 10:02:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.154.123 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770890535; cv=none; b=NWPAIY+3q5+vg6vgZd9BfKquq1k6r7Nt2/kssm2BBrkWpxzEzAAZhgsUe95Wd7BLL6jnxb0Jx2dZLs1wvMRAYbbfOIY63R6VeHGN8lPH3ecXJmuWdQXREjGEgH9HIAH4dNtdXWyvXDNqt7tadogm0eaCP/Vn0GAtvA7ZOPzLE5E= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770890535; c=relaxed/simple; bh=x7tYcKwCteLHiZwyHz4dHbxN0Th4mJJiCosWKhhKNhE=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=rQpgvMh6MRm7NLja4PD3ruC1KPsl+mUzaAPxJrmfkeamNEwdY2YtbIjgSXlwYXYw44t+2QecfQKuHzrLidJi3bWDmncQt+VOzh3FoI51oyxKGN36V0F0YGyJAvdIdnhyM4nor7F+ZvmvFDb3gb9UyPaBAH9XYSNF3dVTzNHRvps= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=HJgLaVER; arc=none smtp.client-ip=68.232.154.123 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="HJgLaVER" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1770890534; x=1802426534; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=x7tYcKwCteLHiZwyHz4dHbxN0Th4mJJiCosWKhhKNhE=; b=HJgLaVER5mTxyFtWXakFnTb4HLJkTgQ1w5ETQS0DFkm0C+8+b457cgCt kc1N06j9nFIHswxW7Qv+pboZWHPWgx7h3AI5x8aRZwhA6+0h8tbUBI02u iIWrTQc9fOx50VNeaUuIDrAo+WAP/Bu4JDMChs30J1GwUP8AgS2aj+CG1 0plT+oDE1Fhp95GK3/nAkNAt8C8lxxmLhdX8z+KxYASq+9959FAmIng6s za+cJHQK/5JrrgnKBPfweyYE4nYxPtQXFatTKrCtz0T3IHYDNnwAy/5BP n8NNAwYCAv/BDCBicA2AOGgGFx6YBrRHZGxJk8r6RCxIv/sAZqCNcNj7W g==; X-CSE-ConnectionGUID: J0RxFlJXSD2hBRyc9bDFXw== X-CSE-MsgGUID: uurT8fWXRIWhSFHG2x9hgQ== X-IronPort-AV: E=Sophos;i="6.21,286,1763449200"; d="scan'208";a="52580034" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa4.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Feb 2026 03:02:13 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.87.151) by chn-vm-ex4.mchp-main.com (10.10.87.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.2.2562.35; Thu, 12 Feb 2026 03:02:11 -0700 Received: from archlinux.mchp-main.com (10.10.85.11) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.58 via Frontend Transport; Thu, 12 Feb 2026 03:02:08 -0700 From: Mihai Sain To: , , , , , , , , , , CC: , , , , , Mihai Sain Subject: [PATCH v2 1/4] clk: at91: sam9x7: Remove gmac peripheral and generic clock entries with ID 67 Date: Thu, 12 Feb 2026 12:01:44 +0200 Message-ID: <20260212100147.5007-2-mihai.sain@microchip.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260212100147.5007-1-mihai.sain@microchip.com> References: <20260212100147.5007-1-mihai.sain@microchip.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" According with datasheet table 12.1 the instance ID 67 is reserved. This change drops the gmactsu_clk and gmac_gclk entries from the SAM9X7 clock description tables. Signed-off-by: Mihai Sain --- drivers/clk/at91/sam9x7.c | 10 ---------- 1 file changed, 10 deletions(-) diff --git a/drivers/clk/at91/sam9x7.c b/drivers/clk/at91/sam9x7.c index 89868a0aeaba..d9603f1124d0 100644 --- a/drivers/clk/at91/sam9x7.c +++ b/drivers/clk/at91/sam9x7.c @@ -420,7 +420,6 @@ static const struct { { .n =3D "lvdsc_clk", .id =3D 56, }, { .n =3D "pit64b1_clk", .id =3D 58, }, { .n =3D "puf_clk", .id =3D 59, }, - { .n =3D "gmactsu_clk", .id =3D 67, }, }; =20 /* @@ -702,15 +701,6 @@ static const struct { .pp_count =3D 1, .pp_chg_id =3D INT_MIN, }, - - { - .n =3D "gmac_gclk", - .id =3D 67, - .pp =3D { "audiopll_divpmcck", "plla_div2pmcck", }, - .pp_mux_table =3D { 6, 8, }, - .pp_count =3D 2, - .pp_chg_id =3D INT_MIN, - }, }; =20 static void __init sam9x7_pmc_setup(struct device_node *np) --=20 2.53.0 From nobody Thu Apr 2 19:00:21 2026 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0802620A5F3; Thu, 12 Feb 2026 10:02:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.153.233 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770890572; cv=none; b=MojSu1s34A2ifeTqF+7+BA74FX9R6+jVXlie2W6kL/LsDBeheofuAayZoE36XxejlWftJJi/veqEbfi2ZtFF2JTANyY4t3qosU9G6ZiLrkQoE3O0+Lqq2Jvtv4nVoinqpcbshgBYONaJ0RoUN9hAnvTB8osn+FnUReFpqunz0w8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770890572; c=relaxed/simple; bh=jxgMXG7IrKT/2hEzT76LLPWcnHKaTw8ZHKDyjix3eck=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=M9gbkmDx9AOWAFo02J7RS/MkwJXJVRi+P7MtASqsEdsfBqNzCHbgHNpoy35O9h7kGeqm1saYlkZoASE9ZGub53hzC1ZZYj8eKRUSuf0P9SfOl0KpxYj8ZlRPYXTer3clbbr+b8fw8LyRLjw0XwRgx+RVGSEUTJcbPGbd6jSDg4I= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=JHKlag46; arc=none smtp.client-ip=68.232.153.233 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="JHKlag46" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1770890570; x=1802426570; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=jxgMXG7IrKT/2hEzT76LLPWcnHKaTw8ZHKDyjix3eck=; b=JHKlag46Yg/Y8Wzw8MTdKfqrN0GTd4C3WdAXwHwfUCmA2ZiT01lu3OH1 PEQzZmpSxcy7U6i2Yd2qFyfUzr4OGc4np5VkZELUF135idWnNNxbSU0ii jZ7WxAy1/fvLFAvWCH/Pik/VGh99UAVVqZweGGt/eK2g8gSU/rLfRzbbe Oy6BDiRlJFsWUEjmRC2A59BofT6/lbXhYe90JqK82uoVtzYBi6g71frMu HZfZ7ZnFUY9WDblFpZl1uSK8leOktV3Fmv7hiz7lx44n14/VDnrGwJ4Dh JuWRrEfSLzPNSCLIdATdTqfxhdhJ7m2xzJuYIkvVifvRQ+N9hwJMf0jdI w==; X-CSE-ConnectionGUID: YqyL9f58SZekMU5ZqnKtLA== X-CSE-MsgGUID: pTszDbUqSUSrq0D8mTdlZg== X-IronPort-AV: E=Sophos;i="6.21,286,1763449200"; d="scan'208";a="60606644" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa1.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Feb 2026 03:02:45 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.87.151) by chn-vm-ex4.mchp-main.com (10.10.87.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.2.2562.35; Thu, 12 Feb 2026 03:02:15 -0700 Received: from archlinux.mchp-main.com (10.10.85.11) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.58 via Frontend Transport; Thu, 12 Feb 2026 03:02:12 -0700 From: Mihai Sain To: , , , , , , , , , , CC: , , , , , Mihai Sain Subject: [PATCH v2 2/4] clk: at91: sam9x7: Rename macb0_clk to gmac_clk Date: Thu, 12 Feb 2026 12:01:45 +0200 Message-ID: <20260212100147.5007-3-mihai.sain@microchip.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260212100147.5007-1-mihai.sain@microchip.com> References: <20260212100147.5007-1-mihai.sain@microchip.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Update the peripheral clock name for ID 24 from macb0_clk to gmac_clk to match the actual GMAC hardware block present on SAM9X7 SoCs. This aligns the clock naming with the device tree and avoids confusion with legacy MACB controllers. Signed-off-by: Mihai Sain Reviewed-by: Claudiu Beznea --- drivers/clk/at91/sam9x7.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clk/at91/sam9x7.c b/drivers/clk/at91/sam9x7.c index d9603f1124d0..68e569bd70f5 100644 --- a/drivers/clk/at91/sam9x7.c +++ b/drivers/clk/at91/sam9x7.c @@ -387,7 +387,7 @@ static const struct { { .n =3D "dma0_clk", .id =3D 20, }, { .n =3D "uhphs_clk", .id =3D 22, }, { .n =3D "udphs_clk", .id =3D 23, }, - { .n =3D "macb0_clk", .id =3D 24, }, + { .n =3D "gmac_clk", .id =3D 24, }, { .n =3D "lcd_clk", .id =3D 25, }, { .n =3D "sdmmc1_clk", .id =3D 26, }, { .n =3D "ssc_clk", .id =3D 28, }, --=20 2.53.0 From nobody Thu Apr 2 19:00:21 2026 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1A337770FE; Thu, 12 Feb 2026 10:02:40 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.154.123 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770890573; cv=none; b=kbITP6hHKK/DN/pT+yMQQs8LIsApDku3BtBg1iszr0dD+xjGE7cF9KNTjEMBNUNFmR0FmVchjDxFnk91xYByx9muBnFgD1IYnUZJdG4sGp+LJOd7+PKGF5jDZEyX6yDUZJ8v5EJNiBBrandKvmaG5ind3SPBkh+NfDO7zmz3nG0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770890573; c=relaxed/simple; bh=RgPLsEAvEIhX+x4fiqob1zN/Jh2A9AFXuJ2U8zEAWpM=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=nfq0ALu2AjnKW0pYif7Z1m8hpwNz+BS2eSzkwBOHbwCdyRjqVKnpVJULWiuzzDLE4XpcRjllKNY+BXb8wO/biXwTE8aYyAQl+WUDSBcxasB8QpKZG3nUhD39J67gJJqRElA9gls2ko2i+1Fy4r+AK+QcR5SvObkinNKGFARVU+k= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=xbIp8E93; arc=none smtp.client-ip=68.232.154.123 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="xbIp8E93" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1770890563; x=1802426563; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=RgPLsEAvEIhX+x4fiqob1zN/Jh2A9AFXuJ2U8zEAWpM=; b=xbIp8E93oh9hprjFPEUcFo0dqpjNRpwwI1viJDXwDvE4PDFBxT718V3M qf6fg+mWhO33G+yzD8eYgLOGKJNodJ+e48sIKhVv+NWAgfklOC0+aAv/N JjvA2bSoHCnOAahFLrVB3BG5qlGDjyOQi391D8vPtAjlIb03/5ric0LC2 yhCqaxWF9D5rUwAoex35lMPkhVHU2JCv2ZU8xgYkt3ClWZjRoGRnQ+s3/ RnsFMs8ik/etbN2+Cb+qcdEm4syAMQy7RFZ+yvFxTFWwna9dRoc3tOdtR C4l5xZuEUa2hhOT3Fh5yZxy9k1XLsVx46sVxHqhOMrKvQ9vrcM/tFMaeG w==; X-CSE-ConnectionGUID: MLyYTqveRP6xRNiALHFvrA== X-CSE-MsgGUID: SQ2Xuz9nT8yug6mqergzPw== X-IronPort-AV: E=Sophos;i="6.21,286,1763449200"; d="scan'208";a="220596017" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa6.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Feb 2026 03:02:38 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.87.151) by chn-vm-ex1.mchp-main.com (10.10.87.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.2.2562.35; Thu, 12 Feb 2026 03:02:19 -0700 Received: from archlinux.mchp-main.com (10.10.85.11) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.58 via Frontend Transport; Thu, 12 Feb 2026 03:02:16 -0700 From: Mihai Sain To: , , , , , , , , , , CC: , , , , , Mihai Sain Subject: [PATCH v2 3/4] clk: at91: sam9x7: Add gmac generic clock entry with ID 24 Date: Thu, 12 Feb 2026 12:01:46 +0200 Message-ID: <20260212100147.5007-4-mihai.sain@microchip.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260212100147.5007-1-mihai.sain@microchip.com> References: <20260212100147.5007-1-mihai.sain@microchip.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" According with datasheet table 12.1 the instance ID 24 is used for gmac generic clock. This change adds the gmac_gclk entry in SAM9X7 clock description table. Signed-off-by: Mihai Sain --- drivers/clk/at91/sam9x7.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/drivers/clk/at91/sam9x7.c b/drivers/clk/at91/sam9x7.c index 68e569bd70f5..8b52da194849 100644 --- a/drivers/clk/at91/sam9x7.c +++ b/drivers/clk/at91/sam9x7.c @@ -568,6 +568,15 @@ static const struct { .pp_chg_id =3D INT_MIN, }, =20 + { + .n =3D "gmac_gclk", + .id =3D 24, + .pp =3D { "audiopll_divpmcck", "plla_div2pmcck", }, + .pp_mux_table =3D { 6, 8, }, + .pp_count =3D 2, + .pp_chg_id =3D INT_MIN, + }, + { .n =3D "lcd_gclk", .id =3D 25, --=20 2.53.0 From nobody Thu Apr 2 19:00:21 2026 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C81A22DEA8F; Thu, 12 Feb 2026 10:02:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.154.123 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770890575; cv=none; b=ASD1Lf5tHfdiO6ASdZrqI9NaU/AXnrGCa48ypqX20tbexy+tz13LqjXNK5Y4CjDL/s87MTM9VVK5PlMoUt4hY1McYEVKOTUtbB+60zdh/VYfdJrWg6LpGi7lasR4M0muTF/ifvjn3cLiyK5ihZyrWFy72wAkqfLkL1wW3z21idQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770890575; c=relaxed/simple; bh=HJY0wdSVelljhVy5XonzAMfl6FFec1mLbXSyxYUN/sQ=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=Qpfs/dBmkv7t5ZI/1i+XlRjGF+IkYvwj93P0inhCkSDElZkyhoY9W9UJlPuuR7Dte7H+eAX8KpwLJ2sLY6nSJlQ9y201GHdQntqFlmbJJ2g7T6n2CbVoGXch2kSqu28KmAazqezzCufJq5Eq9Qke7EE0SqBkBUfdgQ3GqfkZ1TU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=KasU26N9; arc=none smtp.client-ip=68.232.154.123 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="KasU26N9" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1770890572; x=1802426572; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=HJY0wdSVelljhVy5XonzAMfl6FFec1mLbXSyxYUN/sQ=; b=KasU26N96FYhthATpYZ97GJaQ1zd7pp60j10HnTf5cl15vI/jy+ZxrbH iRb4JflIYe6J4Q1SdEetid37Hahm3Owv9YnSl+jPqalkx/2fVXM4kGfN2 WXcPXqRvtHn/dMkUWihYwAwgLrdvBrSKg/50N1ICRaOiyyzIC22CHJeHK 0VfuqMcevs3tqy2ADtm2nO1UIIZ3TETxApO5B7y8blk/lXFoQzw6spGO9 ho6fSsQ40bKnRRJuKxw/vZc02CO5jHBRkNxoOcHPdZPrFEixJWKfXz+xo htbwz0i+/jhfg9tq6U3N7IqCe8/JAgIvjc6rHs5zBV+YbgPatpER+k4Wh w==; X-CSE-ConnectionGUID: MLyYTqveRP6xRNiALHFvrA== X-CSE-MsgGUID: PfVU4YbQS2qWnYiR5+ieQQ== X-IronPort-AV: E=Sophos;i="6.21,286,1763449200"; d="scan'208";a="220596018" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa6.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Feb 2026 03:02:38 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.87.151) by chn-vm-ex1.mchp-main.com (10.10.87.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.2.2562.35; Thu, 12 Feb 2026 03:02:23 -0700 Received: from archlinux.mchp-main.com (10.10.85.11) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.58 via Frontend Transport; Thu, 12 Feb 2026 03:02:20 -0700 From: Mihai Sain To: , , , , , , , , , , CC: , , , , , Mihai Sain Subject: [PATCH v2 4/4] ARM: dts: microchip: sam9x7: fix GMAC clock configuration Date: Thu, 12 Feb 2026 12:01:47 +0200 Message-ID: <20260212100147.5007-5-mihai.sain@microchip.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260212100147.5007-1-mihai.sain@microchip.com> References: <20260212100147.5007-1-mihai.sain@microchip.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The GMAC node incorrectly listed four clocks, including a separate tx_clk and a TSU GCK clock sourced from ID 67. According to the SAM9X7 clocking scheme, the GMAC uses only three clocks: HCLK, PCLK, and the TSU GCK derived from the GMAC peripheral clock (ID 24). This patch removes the unused tx_clk, updates the clock-names accordingly, and corrects the assigned clock to use GCK 24 instead of GCK 67. This aligns the device tree with the actual hardware clock topology and prevents misconfiguration of the GMAC clock tree. [root@SAM9X75 ~]$ cat /sys/kernel/debug/clk/clk_summary | grep gmac gmac_gclk 1 1 1 266666666 0 0 50000= Y f802c000.ethernet tsu_clk = f802c000.ethernet tsu_clk gmac_clk 2 2 0 266666666 0 0 50000= Y f802c000.ethernet hclk = f802c000.ethernet pclk Fixes: 41af45af8bc3 ("ARM: dts: at91: sam9x7: add device tree for SoC") Signed-off-by: Mihai Sain --- arch/arm/boot/dts/microchip/sam9x7.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm/boot/dts/microchip/sam9x7.dtsi b/arch/arm/boot/dts/mi= crochip/sam9x7.dtsi index 46dacbbd201d..a42716e18da3 100644 --- a/arch/arm/boot/dts/microchip/sam9x7.dtsi +++ b/arch/arm/boot/dts/microchip/sam9x7.dtsi @@ -990,9 +990,9 @@ gmac: ethernet@f802c000 { <62 IRQ_TYPE_LEVEL_HIGH 3>, /* Queue 3 */ <63 IRQ_TYPE_LEVEL_HIGH 3>, /* Queue 4 */ <64 IRQ_TYPE_LEVEL_HIGH 3>; /* Queue 5 */ - clocks =3D <&pmc PMC_TYPE_PERIPHERAL 24>, <&pmc PMC_TYPE_PERIPHERAL 24>= , <&pmc PMC_TYPE_GCK 24>, <&pmc PMC_TYPE_GCK 67>; - clock-names =3D "hclk", "pclk", "tx_clk", "tsu_clk"; - assigned-clocks =3D <&pmc PMC_TYPE_GCK 67>; + clocks =3D <&pmc PMC_TYPE_PERIPHERAL 24>, <&pmc PMC_TYPE_PERIPHERAL 24>= , <&pmc PMC_TYPE_GCK 24>; + clock-names =3D "hclk", "pclk", "tsu_clk"; + assigned-clocks =3D <&pmc PMC_TYPE_GCK 24>; assigned-clock-rates =3D <266666666>; status =3D "disabled"; }; --=20 2.53.0