From nobody Wed Feb 11 11:31:53 2026 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A829134DB7E; Wed, 11 Feb 2026 05:42:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=60.244.123.138 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770788555; cv=none; b=UBF2vsqmAdJy7FC+YFlPk5ABYy+IBTuNT4IAbEDhm2wufUTLL0dUivu2kXbaziEYtRMCG5TKb9V1r/J/HYllGE3DjXa8FCMjddp8YEUQJplq2f6cbiMii7TDWrX9k1Mv0XI8CC6lxINxJL1sHF8fmhDQuqqeHAKkfAJPrw87Utk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770788555; c=relaxed/simple; bh=QZsJ6NW3LSh0b//+23a7cpbYB7McomY+p1w8G0zfGJo=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=A4t6/qerK3qboKL8YgBALqMRuI3SbA9Cb8WfXzXxyn8eT3wsZag0NZcSYvl68eE/VWhQBHpXowgRmlWlBf7P8jqdUKAE5EQvtzYAGlZucSR/ISzj7oiud3gTyZulxokIn9uYnFSa1lzdSyhfDsNOfUnPy6PGXO5hyHVBySOaSuU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com; spf=pass smtp.mailfrom=mediatek.com; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b=U7SWp/HE; arc=none smtp.client-ip=60.244.123.138 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=mediatek.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="U7SWp/HE" X-UUID: 725c4a18070c11f185319dbc3099e8fb-20260211 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=sP83mE/V22wNUz2FwAiwzp1tjQcAYyESfEE5KEPt/HY=; b=U7SWp/HECQH4l+CEHa5wrZ+frQFXYHK+LCGucypkvAu1/WKJ9VxDiKnT1kdF7sILdg4EIDFrWC8Nv7ec94pQUHj253BvOnmxtlV4sdLyc9Bi/HeY9SGu2J3KzlrVd96rOxdzMngZy/kGRkJuoy0IRas95RePagHaqrBZqi7MraA=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.3.11,REQID:62d6fe8b-32c7-4205-aa6e-c3e52fc4462f,IP:0,U RL:0,TC:0,Content:-5,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION :release,TS:-5 X-CID-META: VersionHash:89c9d04,CLOUDID:8750d47a-8c8a-4fc4-88c0-3556e7711556,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:81|82|102|836|888|898,TC:-5,Content: 0|15|50,EDM:-3,IP:nil,URL:0,File:130,RT:0,Bulk:nil,QS:nil,BEC:-1,COL:0,OSI :0,OSA:0,AV:0,LES:1,SPR:NO,DKR:0,DKP:0,BRR:0,BRE:0,ARC:0 X-CID-BVR: 2,SSN|SDN X-CID-BAS: 2,SSN|SDN,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR X-CID-RHF: D41D8CD98F00B204E9800998ECF8427E X-UUID: 725c4a18070c11f185319dbc3099e8fb-20260211 Received: from mtkmbs09n1.mediatek.inc [(172.21.101.35)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1396336693; Wed, 11 Feb 2026 13:42:26 +0800 Received: from mtkmbs11n2.mediatek.inc (172.21.101.187) by mtkmbs11n1.mediatek.inc (172.21.101.185) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.29; Wed, 11 Feb 2026 13:42:25 +0800 Received: from mhfsdcap04.gcn.mediatek.inc (10.17.3.154) by mtkmbs11n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.2562.29 via Frontend Transport; Wed, 11 Feb 2026 13:42:24 +0800 From: Yunfei Dong To: =?UTF-8?q?N=C3=ADcolas=20F=20=2E=20R=20=2E=20A=20=2E=20Prado?= , Sebastian Fricke , Nicolas Dufresne , Hans Verkuil , AngeloGioacchino Del Regno , Benjamin Gaignard , Nathan Hebert , Daniel Almeida CC: Hsin-Yi Wang , Fritz Koenig , Daniel Vetter , Steve Cho , Yunfei Dong , , , , , , Subject: [PATCH v3 04/14] media: mediatek: vcodec: add driver to support vcp encoder Date: Wed, 11 Feb 2026 13:41:31 +0800 Message-ID: <20260211054149.27249-5-yunfei.dong@mediatek.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20260211054149.27249-1-yunfei.dong@mediatek.com> References: <20260211054149.27249-1-yunfei.dong@mediatek.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-MTK: N Content-Type: text/plain; charset="utf-8" Encoder also need to call vcp interface to communicate with vcp, add driver to support encoder. Signed-off-by: Yunfei Dong --- .../vcodec/common/mtk_vcodec_fw_vcp.c | 56 ++++++++++++++++--- .../vcodec/common/mtk_vcodec_fw_vcp.h | 1 + .../mediatek/vcodec/encoder/mtk_vcodec_enc.c | 1 - .../mediatek/vcodec/encoder/mtk_vcodec_enc.h | 2 + 4 files changed, 50 insertions(+), 10 deletions(-) diff --git a/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw_vc= p.c b/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw_vcp.c index 9fee52fed181..32d4e566f357 100644 --- a/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw_vcp.c +++ b/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw_vcp.c @@ -13,6 +13,8 @@ =20 #include "../decoder/mtk_vcodec_dec_drv.h" #include "../decoder/vdec_ipi_msg.h" +#include "../encoder/mtk_vcodec_enc.h" +#include "../encoder/mtk_vcodec_enc_drv.h" #include "mtk_vcodec_fw_priv.h" =20 #define IPI_SEND_TIMEOUT_MS 100U @@ -226,8 +228,13 @@ static int mtk_vcodec_vcp_msg_ipi_send(struct mtk_vcod= ec_fw *fw, int id, void *b } =20 mutex_lock(&vcp->ipi_mutex); - feature_id =3D VDEC_FEATURE_ID; - mailbox_id =3D IPI_OUT_VDEC_1; + if (fw->fw_use =3D=3D ENCODER) { + feature_id =3D VENC_FEATURE_ID; + mailbox_id =3D IPI_OUT_VENC_0; + } else { + feature_id =3D VDEC_FEATURE_ID; + mailbox_id =3D IPI_OUT_VDEC_1; + } =20 timeout_jiffies =3D jiffies + msecs_to_jiffies(VCP_SYNC_TIMEOUT_MS); while (!vcp_device->ops->vcp_is_ready(feature_id)) { @@ -351,10 +358,17 @@ static int mtk_vcodec_vcp_load_firmware(struct mtk_vc= odec_fw *fw) =20 vcp_device =3D fw->vcp->vcp_device; =20 - feature_id =3D VDEC_FEATURE_ID; - mem_id =3D VDEC_MEM_ID; - mailbox_id =3D IPI_IN_VDEC_1; - ipi_id =3D VCP_IPI_LAT_DECODER; + if (fw->fw_use =3D=3D ENCODER) { + feature_id =3D VENC_FEATURE_ID; + mem_id =3D VENC_MEM_ID; + mailbox_id =3D IPI_IN_VENC_0; + ipi_id =3D VCP_IPI_ENCODER; + } else { + feature_id =3D VDEC_FEATURE_ID; + mem_id =3D VDEC_MEM_ID; + mailbox_id =3D IPI_IN_VDEC_1; + ipi_id =3D VCP_IPI_LAT_DECODER; + } =20 ret =3D mtk_vcp_mbox_ipc_register(vcp_get_ipidev(vcp_device), mailbox_id, mtk_vcodec_vcp_msg_ack_isr, fw, &fw->vcp->share_data); @@ -383,6 +397,20 @@ static int mtk_vcodec_vcp_load_firmware(struct mtk_vco= dec_fw *fw) mutex_init(&fw->vcp->ipi_desc[ipi_id].lock); mutex_init(&fw->vcp->ipi_mutex); =20 + if (fw->fw_use =3D=3D ENCODER) { + kthread_run(mtk_vcodec_vcp_msg_process_thread, fw, "vcp_enc_msq_thread"); + + fw->vcp->vsi_addr =3D vcp_device->ops->vcp_get_mem_virt(mem_id); + fw->vcp->vsi_size =3D vcp_device->ops->vcp_get_mem_size(mem_id); + fw->vcp->iova_addr =3D vcp_device->ops->vcp_get_mem_iova(mem_id); + + dev_dbg(&fw->pdev->dev, "enc vcp init done =3D> va: %p size:0x%x iova:%p= ad.\n", + fw->vcp->vsi_addr, fw->vcp->vsi_size, &fw->vcp->iova_addr); + + init_waitqueue_head(&fw->vcp->msg_wq[VCP_IPI_ENCODER]); + return 0; + } + kthread_run(mtk_vcodec_vcp_msg_process_thread, fw, "vcp_vdec_msq_thread"); =20 fw->vcp->vsi_addr =3D vcp_device->ops->vcp_get_mem_virt(mem_id); @@ -406,6 +434,11 @@ static unsigned int mtk_vcodec_vcp_get_vdec_capa(struc= t mtk_vcodec_fw *fw) MTK_VDEC_IS_SUPPORT_10BIT | MTK_VDEC_IS_SUPPORT_EXT; } =20 +static unsigned int mtk_vcodec_vcp_get_venc_capa(struct mtk_vcodec_fw *fw) +{ + return MTK_VENC_4K_CAPABILITY_ENABLE; +} + static void *mtk_vcodec_vcp_dm_addr(struct mtk_vcodec_fw *fw, u32 dtcm_dme= m_addr) { return NULL; @@ -438,8 +471,8 @@ static void mtk_vcodec_vcp_release(struct mtk_vcodec_fw= *fw) if (!fw->vcp->is_register_done) return; =20 - feature_id =3D VDEC_FEATURE_ID; - ret =3D vcp_device->ops->vcp_deregister_feature(vcp_device, VDEC_FEATURE_= ID); + feature_id =3D fw->fw_use =3D=3D ENCODER ? VENC_FEATURE_ID : VDEC_FEATURE= _ID; + ret =3D vcp_device->ops->vcp_deregister_feature(vcp_device, feature_id); if (ret < 0) { dev_err(dev, "deregister feature_id(%d) fail(%d)\n", feature_id, ret); return; @@ -452,6 +485,7 @@ static void mtk_vcodec_vcp_release(struct mtk_vcodec_fw= *fw) static const struct mtk_vcodec_fw_ops mtk_vcodec_vcp_msg =3D { .load_firmware =3D mtk_vcodec_vcp_load_firmware, .get_vdec_capa =3D mtk_vcodec_vcp_get_vdec_capa, + .get_venc_capa =3D mtk_vcodec_vcp_get_venc_capa, .map_dm_addr =3D mtk_vcodec_vcp_dm_addr, .ipi_register =3D mtk_vcodec_vcp_set_ipi_register, .ipi_send =3D mtk_vcodec_vcp_ipi_send, @@ -465,7 +499,11 @@ struct mtk_vcodec_fw *mtk_vcodec_fw_vcp_init(void *pri= v, enum mtk_vcodec_fw_use struct mtk_vcodec_fw *fw; int i; =20 - if (fw_use =3D=3D DECODER) { + if (fw_use =3D=3D ENCODER) { + struct mtk_vcodec_enc_dev *enc_dev =3D priv; + + plat_dev =3D enc_dev->plat_dev; + } else if (fw_use =3D=3D DECODER) { struct mtk_vcodec_dec_dev *dec_dev =3D priv; =20 plat_dev =3D dec_dev->plat_dev; diff --git a/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw_vc= p.h b/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw_vcp.h index fada786124d5..c0632a872892 100644 --- a/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw_vcp.h +++ b/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw_vcp.h @@ -16,6 +16,7 @@ typedef void (*vcp_ipi_handler_t) (void *data, unsigned i= nt len, void *priv); =20 /* enum mtk_vcp_ipi_index - index used to separate different hardware */ enum mtk_vcp_ipi_index { + VCP_IPI_ENCODER, VCP_IPI_LAT_DECODER, VCP_IPI_CORE_DECODER, VCP_IPI_MAX, diff --git a/drivers/media/platform/mediatek/vcodec/encoder/mtk_vcodec_enc.= c b/drivers/media/platform/mediatek/vcodec/encoder/mtk_vcodec_enc.c index 0d4e94463685..48cb5dded70a 100644 --- a/drivers/media/platform/mediatek/vcodec/encoder/mtk_vcodec_enc.c +++ b/drivers/media/platform/mediatek/vcodec/encoder/mtk_vcodec_enc.c @@ -26,7 +26,6 @@ =20 #define MTK_DEFAULT_FRAMERATE_NUM 1001 #define MTK_DEFAULT_FRAMERATE_DENOM 30000 -#define MTK_VENC_4K_CAPABILITY_ENABLE BIT(0) =20 static void mtk_venc_worker(struct work_struct *work); =20 diff --git a/drivers/media/platform/mediatek/vcodec/encoder/mtk_vcodec_enc.= h b/drivers/media/platform/mediatek/vcodec/encoder/mtk_vcodec_enc.h index 908d8179b2d2..84156c102d8d 100644 --- a/drivers/media/platform/mediatek/vcodec/encoder/mtk_vcodec_enc.h +++ b/drivers/media/platform/mediatek/vcodec/encoder/mtk_vcodec_enc.h @@ -23,6 +23,8 @@ #define MTK_VENC_IRQ_STATUS_OFFSET 0x05C #define MTK_VENC_IRQ_ACK_OFFSET 0x060 =20 +#define MTK_VENC_4K_CAPABILITY_ENABLE BIT(0) + /** * struct mtk_video_enc_buf - Private data related to each VB2 buffer. * @m2m_buf: M2M buffer --=20 2.45.2