From nobody Thu Apr 2 15:43:39 2026 Received: from cstnet.cn (smtp81.cstnet.cn [159.226.251.81]) (using TLSv1.2 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6A4CD368297 for ; Tue, 10 Feb 2026 14:13:17 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=159.226.251.81 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770732799; cv=none; b=JbcASwyrNFwm324NCoGMQi98V9l0UneyQ45PkSwgOa7i9DpX04gnyLiow3IKkoggkcktCn9Zw3B9H0rLhx4YWNwTuWcIdUJ9mbTH63Kwnqdd2DOxWCPAai5U2DFf8p04hhrAlJ5mQwq/QRZQqDHocGdT2nPqusXQXHYV1UUf4GU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770732799; c=relaxed/simple; bh=r0Kifpi0gAQhNyk1tOn7oxiInpA45baz3W/cxDiKMD4=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=bfA7PlzDZv5KMEE64Na5f1yyDf7HiT8VYgudOqHU/fmSxFqFMG8SdlXQHCkaptVsLUOr0JFW9BiEIW7o36d/dr+k0m4ZA8yW21PUNLqOStJJEGC2SZAwyKcZceuX32nPhoN2LbFVreY6oHAViM4AERTQzvIZemHIgb4IkVq+WhY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=iscas.ac.cn; spf=pass smtp.mailfrom=iscas.ac.cn; arc=none smtp.client-ip=159.226.251.81 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=iscas.ac.cn Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=iscas.ac.cn Received: from edelgard.fodlan.icenowy.me (unknown [112.94.103.253]) by APP-03 (Coremail) with SMTP id rQCowABXZ87vPItp+RItCA--.18409S5; Tue, 10 Feb 2026 22:13:10 +0800 (CST) From: Icenowy Zheng To: Icenowy Zheng , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org Subject: [PATCH drm-misc-next 3/3] drm: verisilicon: fill plane's vs_format in atomic_check Date: Tue, 10 Feb 2026 22:13:00 +0800 Message-ID: <20260210141300.749013-4-zhengxingda@iscas.ac.cn> X-Mailer: git-send-email 2.52.0 In-Reply-To: <20260210141300.749013-1-zhengxingda@iscas.ac.cn> References: <20260210141300.749013-1-zhengxingda@iscas.ac.cn> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: rQCowABXZ87vPItp+RItCA--.18409S5 X-Coremail-Antispam: 1UD129KBjvJXoWxXw1fCryxAFW8ZrWkJF45trb_yoW5Cw1kpr 4DAFyrKr4ftrWUWr9rJrWDtFZxuan3KryIgrW7GwnagF1rt3y3CF1kJrZ3CFs8Jry7Gw4x tanayFs8Aw42yaUanT9S1TB71UUUUU7qnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDU0xBIdaVrnRJUUUBm14x267AKxVWrJVCq3wAFc2x0x2IEx4CE42xK8VAvwI8IcIk0 rVWrJVCq3wAFIxvE14AKwVWUJVWUGwA2048vs2IY020E87I2jVAFwI0_JrWl82xGYIkIc2 x26xkF7I0E14v26ryj6s0DM28lY4IEw2IIxxk0rwA2F7IY1VAKz4vEj48ve4kI8wA2z4x0 Y4vE2Ix0cI8IcVAFwI0_Gr0_Xr1l84ACjcxK6xIIjxv20xvEc7CjxVAFwI0_Gr0_Cr1l84 ACjcxK6I8E87Iv67AKxVW0oVCq3wA2z4x0Y4vEx4A2jsIEc7CjxVAFwI0_GcCE3s1le2I2 62IYc4CY6c8Ij28IcVAaY2xG8wAqx4xG64xvF2IEw4CE5I8CrVC2j2WlYx0E2Ix0cI8IcV AFwI0_Jr0_Jr4lYx0Ex4A2jsIE14v26r1j6r4UMcvjeVCFs4IE7xkEbVWUJVW8JwACjcxG 0xvY0x0EwIxGrwACjI8F5VA0II8E6IAqYI8I648v4I1lc7CjxVAaw2AFwI0_JF0_Jw1l42 xK82IYc2Ij64vIr41l4I8I3I0E4IkC6x0Yz7v_Jr0_Gr1lx2IqxVAqx4xG67AKxVWUJVWU GwC20s026x8GjcxK67AKxVWUGVWUWwC2zVAF1VAY17CE14v26r1q6r43MIIYrxkI7VAKI4 8JMIIF0xvE2Ix0cI8IcVAFwI0_Jr0_JF4lIxAIcVC0I7IYx2IY6xkF7I0E14v26r4j6F4U MIIF0xvE42xK8VAvwI8IcIk0rVWUJVWUCwCI42IY6I8E87Iv67AKxVWUJVW8JwCI42IY6I 8E87Iv6xkF7I0E14v26r4j6r4UJbIYCTnIWIevJa73UjIFyTuYvjfUYdb1UUUUU X-CM-SenderInfo: x2kh0wp0lqwv3d6l2u1dvotugofq/ Content-Type: text/plain; charset="utf-8" Move the conversion from drm_format to vs_format to atomic_check, which is before the point of no return and can properly bail out. Signed-off-by: Icenowy Zheng --- drivers/gpu/drm/verisilicon/vs_plane.h | 2 ++ drivers/gpu/drm/verisilicon/vs_primary_plane.c | 18 ++++++++++++------ 2 files changed, 14 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/verisilicon/vs_plane.h b/drivers/gpu/drm/veris= ilicon/vs_plane.h index 12848a72af576..df4b248b52954 100644 --- a/drivers/gpu/drm/verisilicon/vs_plane.h +++ b/drivers/gpu/drm/verisilicon/vs_plane.h @@ -65,6 +65,8 @@ struct vs_format { =20 struct vs_plane_state { struct drm_plane_state base; + + struct vs_format format; }; =20 static inline struct vs_plane_state *state_to_vs_plane_state(struct drm_pl= ane_state *state) diff --git a/drivers/gpu/drm/verisilicon/vs_primary_plane.c b/drivers/gpu/d= rm/verisilicon/vs_primary_plane.c index bad0bc5e3242d..b5bc6b0078fc3 100644 --- a/drivers/gpu/drm/verisilicon/vs_primary_plane.c +++ b/drivers/gpu/drm/verisilicon/vs_primary_plane.c @@ -25,12 +25,19 @@ static int vs_primary_plane_atomic_check(struct drm_pla= ne *plane, { struct drm_plane_state *new_plane_state =3D drm_atomic_get_new_plane_stat= e(state, plane); + struct vs_plane_state *new_vs_plane_state =3D state_to_vs_plane_state(new= _plane_state); struct drm_crtc *crtc =3D new_plane_state->crtc; struct drm_crtc_state *crtc_state; + int ret; =20 if (!crtc) return 0; =20 + ret =3D drm_format_to_vs_format(new_plane_state->fb->format->format, + &new_vs_plane_state->format); + if (ret) + return ret; + crtc_state =3D drm_atomic_get_new_crtc_state(state, crtc); if (WARN_ON(!crtc_state)) return -EINVAL; @@ -88,11 +95,11 @@ static void vs_primary_plane_atomic_update(struct drm_p= lane *plane, { struct drm_plane_state *state =3D drm_atomic_get_new_plane_state(atomic_s= tate, plane); + struct vs_plane_state *vs_state =3D state_to_vs_plane_state(state); struct drm_framebuffer *fb =3D state->fb; struct drm_crtc *crtc =3D state->crtc; struct vs_dc *dc; struct vs_crtc *vcrtc; - struct vs_format fmt; unsigned int output; dma_addr_t dma_addr; =20 @@ -105,16 +112,15 @@ static void vs_primary_plane_atomic_update(struct drm= _plane *plane, output =3D vcrtc->id; dc =3D vcrtc->dc; =20 - drm_format_to_vs_format(state->fb->format->format, &fmt); - regmap_update_bits(dc->regs, VSDC_FB_CONFIG(output), VSDC_FB_CONFIG_FMT_MASK, - VSDC_FB_CONFIG_FMT(fmt.color)); + VSDC_FB_CONFIG_FMT(vs_state->format.color)); regmap_update_bits(dc->regs, VSDC_FB_CONFIG(output), VSDC_FB_CONFIG_SWIZZLE_MASK, - VSDC_FB_CONFIG_SWIZZLE(fmt.swizzle)); + VSDC_FB_CONFIG_SWIZZLE(vs_state->format.swizzle)); regmap_assign_bits(dc->regs, VSDC_FB_CONFIG(output), - VSDC_FB_CONFIG_UV_SWIZZLE_EN, fmt.uv_swizzle); + VSDC_FB_CONFIG_UV_SWIZZLE_EN, + vs_state->format.uv_swizzle); =20 dma_addr =3D vs_fb_get_dma_addr(fb, &state->src); =20 --=20 2.52.0