From nobody Sat Apr 18 06:56:12 2026 Received: from mail-43167.protonmail.ch (mail-43167.protonmail.ch [185.70.43.167]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2993D2D24B7 for ; Tue, 10 Feb 2026 07:26:07 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.70.43.167 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770708370; cv=none; b=jglbNB7l1Kuz2KRnR4iAxUOS/o7GmcWfGzHWAwd1DVzEDrLIeoQRy/AEyj3Ru0xTbK7Goi1iUv4tFPu5hctB2YWfUEF9kGtU3JUBO3T8JZ/U3vXfOSZsf2jKYhgCrLP692UbaTfIM6Uu7ERpz2wxdd7WwPxsu7/mAUo76Klu10U= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770708370; c=relaxed/simple; bh=aCNDx4ooNCMwqww/y8mIhjDZ2mmpGSaryF3kxxmKXYQ=; h=Date:To:From:Cc:Subject:Message-ID:MIME-Version:Content-Type; b=MT7nrWccSkb3ckYFenvsuz04YDyMH6qsc1rVEtMYvkEV6+cgXvWmjt1GBEprpMpVNm3T28taffGKbDw44Xcz13RsWBMqd5WHiN8B6Nh8ydQmHVOUJSEUus7FIJ3T/ILf25MGfOiTFNpgYkbRcEccExEmEF6/aw5N3r5flAVdMpQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=proton.me; spf=pass smtp.mailfrom=proton.me; dkim=pass (2048-bit key) header.d=proton.me header.i=@proton.me header.b=TSqGC3j2; arc=none smtp.client-ip=185.70.43.167 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=proton.me Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=proton.me Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=proton.me header.i=@proton.me header.b="TSqGC3j2" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=proton.me; s=protonmail; t=1770708366; x=1770967566; bh=DUEQxGnzVTqsxG7XY59PJwUJytlx+BuBDvfcVat/qiU=; h=Date:To:From:Cc:Subject:Message-ID:Feedback-ID:From:To:Cc:Date: Subject:Reply-To:Feedback-ID:Message-ID:BIMI-Selector; b=TSqGC3j2KMAK2Rkhf1h0cUIVQfIolKGcUwoWDCkbjKcCCrOxtocwI1HMqExBEtP6r mN21CSzCq0TIBeQnyjJGP1Y+TW/ovBiJCfqI4ZZlOsyjikcX25v5nxUT/Ccy1qxS+L kDZcOXJbxu7WSb7CF1KqI4rh88//cKCQZXxPtvrC0XkeGEglXweXLhNc91ddNYgJyS TTUinOQxajVvJ4bKIbdUF9hiHGKBSsK2QvwVCjkhk0guSCDn6pZYNJezPw6Fp0niLV r1xCduWxErY4Mdjze/u11/qCkorE4i3Wh8anC6cFdC6xxpEqjaTJxKK4BNQsyQOnjI /ZrlG6wlNQdYQ== Date: Tue, 10 Feb 2026 07:26:00 +0000 To: amd-gfx@lists.freedesktop.org From: decce6 Cc: decce6 , Alex Deucher , =?utf-8?Q?Christian_K=C3=B6nig?= , David Airlie , Simona Vetter , dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org Subject: [PATCH] drm/radeon: Add HAINAN clock adjustment Message-ID: <20260210072524.15119-1-decce6@proton.me> Feedback-ID: 132957244:user:proton X-Pm-Message-ID: 58cf92cb1645be630600c2e92405036104c3d8c1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" This patch limits the clock speeds of the AMD Radeon R5 M420 GPU from 850/1000MHz (core/memory) to 800/950 MHz, making it work stably. This patch is for radeon. Signed-off-by: decce6 --- drivers/gpu/drm/radeon/si_dpm.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/gpu/drm/radeon/si_dpm.c b/drivers/gpu/drm/radeon/si_dp= m.c index 9deb91970d4d..f12227145ef0 100644 --- a/drivers/gpu/drm/radeon/si_dpm.c +++ b/drivers/gpu/drm/radeon/si_dpm.c @@ -2925,6 +2925,11 @@ static void si_apply_state_adjust_rules(struct radeo= n_device *rdev, max_sclk =3D 60000; max_mclk =3D 80000; } + if ((rdev->pdev->device =3D=3D 0x666f) && + (rdev->pdev->revision =3D=3D 0x00)) { + max_sclk =3D 80000; + max_mclk =3D 95000; + } } else if (rdev->family =3D=3D CHIP_OLAND) { if ((rdev->pdev->revision =3D=3D 0xC7) || (rdev->pdev->revision =3D=3D 0x80) || --=20 2.43.0