From nobody Tue Feb 10 10:53:25 2026 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 69CB732ABF1; Mon, 9 Feb 2026 09:08:22 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.153.233 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770628102; cv=none; b=fuHRpb0Ll2DGTMNxkde9NVarPZQ8QJZWCJCl6jxvLTi3nMcIxZ2nfosf6+5YMcAdIin5HC/oIZSdcOHYC4yj0e5wAvjaa3WqVWgKpW7SQSDx/Fv3ypgzRhzxXd2wggu9IYuCWb49RpqyGMgqXHzthQdrZUidJzvBlVa3KegoLeo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770628102; c=relaxed/simple; bh=tJorA0fNCKm3BvR9HVxFu7GfXmHBPROs/lhg5ksDUYw=; h=From:To:CC:Subject:Date:Message-ID:MIME-Version:Content-Type; b=bvQEY/y2DAXZTbpKJWZDYLgDvfMZgMYZDt5KgxOW+rZb6wmdzOaiMrKbQSa1J0l2Po9qaziWE26GyJjbyEeqXeKR1iiUd8tXXgoplKKLDZq9on2L0NdPFBHx1L1EaPkCWKBjjkcktksT/sgGNQ6qUDseEDjIXtT8OxS+bSR4Z7E= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=sjD2PHR6; arc=none smtp.client-ip=68.232.153.233 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="sjD2PHR6" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1770628100; x=1802164100; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=tJorA0fNCKm3BvR9HVxFu7GfXmHBPROs/lhg5ksDUYw=; b=sjD2PHR6sgK0qmpOfpOAsY3Be+ucHvuRdflPhfdYhMcoOBOTArVzkiuI IkOTyfq2zj62yZ0LIqmtMVm+bjjHOEZY93tby02chHEdfFsu8GXFmen8y y51vEn42Pw2FcORohTQ1xWFV8AidfbYKFtrBGAKAX4LzjSuEGJWkMeTnz dHgPTJBGNjGaG16UMb8Mw4R8heBhuziztMTzmyz51idGiG/XJXYb9nPgL SRW0tABIN4USYwBGiERSAq1Y/uWZQtOd3jF4j5CPC86wUyt5R/k57b12c pA4u9nUBcI56r9cUlNCt0D9lOuwb802kfPSESOFw/PSy3U5VgQxLOUlft A==; X-CSE-ConnectionGUID: 81ZPVNkQSz6nV3HsOCpGbA== X-CSE-MsgGUID: 2cvv8S72RxCXiX09dmrrTA== X-IronPort-AV: E=Sophos;i="6.21,281,1763449200"; d="scan'208";a="284507848" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa5.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 09 Feb 2026 02:08:14 -0700 Received: from chn-vm-ex01.mchp-main.com (10.10.85.143) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.58; Mon, 9 Feb 2026 02:07:47 -0700 Received: from archlinux.mchp-main.com (10.10.85.11) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.2507.58 via Frontend Transport; Mon, 9 Feb 2026 02:07:44 -0700 From: Mihai Sain To: , , , , , , CC: , , , Mihai Sain Subject: [PATCH] ARM: dts: microchip: sam9x7: fix gpio-lines count for pioB Date: Mon, 9 Feb 2026 11:07:35 +0200 Message-ID: <20260209090735.2016-1-mihai.sain@microchip.com> X-Mailer: git-send-email 2.53.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The pioB controller on the SAM9X7 SoC actually supports 27 GPIO lines. The previous value of 26 was incorrect, leading to the last pin being unavailable for use by the GPIO subsystem. Update the #gpio-lines property to reflect the correct hardware specification. Fixes: 41af45af8bc3 ("ARM: dts: at91: sam9x7: add device tree for SoC") Signed-off-by: Mihai Sain --- arch/arm/boot/dts/microchip/sam9x7.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/microchip/sam9x7.dtsi b/arch/arm/boot/dts/mi= crochip/sam9x7.dtsi index 46dacbbd201d..d242d7a934d0 100644 --- a/arch/arm/boot/dts/microchip/sam9x7.dtsi +++ b/arch/arm/boot/dts/microchip/sam9x7.dtsi @@ -1226,7 +1226,7 @@ pioB: gpio@fffff600 { interrupt-controller; #gpio-cells =3D <2>; gpio-controller; - #gpio-lines =3D <26>; + #gpio-lines =3D <27>; clocks =3D <&pmc PMC_TYPE_PERIPHERAL 3>; }; =20 base-commit: 05f7e89ab9731565d8a62e3b5d1ec206485eeb0b --=20 2.53.0