From nobody Tue Feb 10 04:13:50 2026 Received: from canpmsgout03.his.huawei.com (canpmsgout03.his.huawei.com [113.46.200.218]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9E30B2BD030 for ; Sat, 7 Feb 2026 09:56:18 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=113.46.200.218 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770458179; cv=none; b=XFRnrmbjt9nGjMCv+7iodJJKCSGTgHJMgG96bJm3VvAbC0KWwf09JLrx33EOcurg/84MN2YGYTztMptCj3wS3xD94gDNICJNqwA9dX89vufjDzeHChKRogkxKSpI4hEqMYyDjzgkaERD12o5uf19U8mX7oSXlLioWGRdZz6QPSs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770458179; c=relaxed/simple; bh=5KRB8cHu5vo1L7zRCoGxR2mFXVZ/BkRWxuq9v0Ma1HU=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=HmEPN1J4k0h+U91JD/nolWjRHqVjsTTQqmIZfMcvmEZs4H6vPTRrYug0uWaSkHTzHnzKVSK1N0tLcqzyDNDk98ftplKB5yLl53lKL2rVS3/c8NANgBsDskHhO4oA6BeTdI9nz+wyoQw5T8V9+bKg8J0m4cbRjGXmBxhgFED+v9k= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=huawei.com; spf=pass smtp.mailfrom=huawei.com; dkim=pass (1024-bit key) header.d=huawei.com header.i=@huawei.com header.b=l0DqnOSq; arc=none smtp.client-ip=113.46.200.218 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=huawei.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=huawei.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=huawei.com header.i=@huawei.com header.b="l0DqnOSq" dkim-signature: v=1; a=rsa-sha256; d=huawei.com; s=dkim; c=relaxed/relaxed; q=dns/txt; h=From; bh=gaaccTEGgYSF/Y51slW2XBH57ChBtzMNGdlBF3cTEnw=; b=l0DqnOSqYvjKukF9hAc+24Z2WXAINJ3+aTUUGdcBfp0AH8lz6CGNXFr0IvfRHn/DTh7r6JakL l6iG2d/x25pZaItMxOtt2jXSMadW+VcVnXL88PtxUtUknexYW/nUbC57BcSe8wcY4+cke2Suz+B /xIZuzfFCWL2aH8CmvLb3Jg= Received: from mail.maildlp.com (unknown [172.19.162.197]) by canpmsgout03.his.huawei.com (SkyGuard) with ESMTPS id 4f7R7b2DXczpSvG; Sat, 7 Feb 2026 17:51:55 +0800 (CST) Received: from dggemv705-chm.china.huawei.com (unknown [10.3.19.32]) by mail.maildlp.com (Postfix) with ESMTPS id 538E940569; Sat, 7 Feb 2026 17:56:11 +0800 (CST) Received: from kwepemq100007.china.huawei.com (7.202.195.175) by dggemv705-chm.china.huawei.com (10.3.19.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.11; Sat, 7 Feb 2026 17:56:11 +0800 Received: from localhost.huawei.com (10.169.71.169) by kwepemq100007.china.huawei.com (7.202.195.175) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.11; Sat, 7 Feb 2026 17:56:10 +0800 From: Yongbang Shi To: , , , , , , , , CC: , , , , , , , , Subject: [PATCH drm-dp 3/4] drm/hisilicon/hibmc: move display contrl config to hibmc_probe() Date: Sat, 7 Feb 2026 17:48:36 +0800 Message-ID: <20260207094837.1468985-4-shiyongbang@huawei.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20260207094837.1468985-1-shiyongbang@huawei.com> References: <20260207094837.1468985-1-shiyongbang@huawei.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: kwepems500002.china.huawei.com (7.221.188.17) To kwepemq100007.china.huawei.com (7.202.195.175) Content-Type: text/plain; charset="utf-8" From: Lin He If there's no VGA output, this encoder modeset won't be called, which will cause displaying data from GPU being cut off. It's actually a common display config for DP and VGA, so move the vdac encoder modeset to driver load stage. Fixes: 5294967f4ae4 ("drm/hisilicon/hibmc: Add support for VDAC") Signed-off-by: Lin He Signed-off-by: Yongbang Shi --- .../gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c | 14 ++++++++++++ .../gpu/drm/hisilicon/hibmc/hibmc_drm_vdac.c | 22 ------------------- 2 files changed, 14 insertions(+), 22 deletions(-) diff --git a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c b/drivers/gpu/= drm/hisilicon/hibmc/hibmc_drm_drv.c index 289304500ab0..c7ce44a5370b 100644 --- a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c +++ b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c @@ -214,6 +214,18 @@ void hibmc_set_current_gate(struct hibmc_drm_private *= priv, unsigned int gate) writel(gate, mmio + gate_reg); } =20 +static void hibmc_display_ctrl(struct hibmc_drm_private *priv) +{ + u32 reg; + + reg =3D readl(priv->mmio + HIBMC_DISPLAY_CONTROL_HISILE); + reg |=3D HIBMC_DISPLAY_CONTROL_FPVDDEN(1); + reg |=3D HIBMC_DISPLAY_CONTROL_PANELDATE(1); + reg |=3D HIBMC_DISPLAY_CONTROL_FPEN(1); + reg |=3D HIBMC_DISPLAY_CONTROL_VBIASEN(1); + writel(reg, priv->mmio + HIBMC_DISPLAY_CONTROL_HISILE); +} + static void hibmc_hw_config(struct hibmc_drm_private *priv) { u32 reg; @@ -245,6 +257,8 @@ static void hibmc_hw_config(struct hibmc_drm_private *p= riv) reg |=3D HIBMC_MSCCTL_LOCALMEM_RESET(1); =20 writel(reg, priv->mmio + HIBMC_MISC_CTRL); + + hibmc_display_ctrl(priv); } =20 static int hibmc_hw_map(struct hibmc_drm_private *priv) diff --git a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_vdac.c b/drivers/gpu= /drm/hisilicon/hibmc/hibmc_drm_vdac.c index 502494cba541..b02e9753112b 100644 --- a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_vdac.c +++ b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_vdac.c @@ -85,26 +85,6 @@ static const struct drm_connector_funcs hibmc_connector_= funcs =3D { .atomic_destroy_state =3D drm_atomic_helper_connector_destroy_state, }; =20 -static void hibmc_encoder_mode_set(struct drm_encoder *encoder, - struct drm_display_mode *mode, - struct drm_display_mode *adj_mode) -{ - u32 reg; - struct drm_device *dev =3D encoder->dev; - struct hibmc_drm_private *priv =3D to_hibmc_drm_private(dev); - - reg =3D readl(priv->mmio + HIBMC_DISPLAY_CONTROL_HISILE); - reg |=3D HIBMC_DISPLAY_CONTROL_FPVDDEN(1); - reg |=3D HIBMC_DISPLAY_CONTROL_PANELDATE(1); - reg |=3D HIBMC_DISPLAY_CONTROL_FPEN(1); - reg |=3D HIBMC_DISPLAY_CONTROL_VBIASEN(1); - writel(reg, priv->mmio + HIBMC_DISPLAY_CONTROL_HISILE); -} - -static const struct drm_encoder_helper_funcs hibmc_encoder_helper_funcs = =3D { - .mode_set =3D hibmc_encoder_mode_set, -}; - int hibmc_vdac_init(struct hibmc_drm_private *priv) { struct drm_device *dev =3D &priv->dev; @@ -127,8 +107,6 @@ int hibmc_vdac_init(struct hibmc_drm_private *priv) goto err; } =20 - drm_encoder_helper_add(encoder, &hibmc_encoder_helper_funcs); - ret =3D drm_connector_init_with_ddc(dev, connector, &hibmc_connector_funcs, DRM_MODE_CONNECTOR_VGA, --=20 2.33.0