From nobody Mon Feb 9 21:19:12 2026 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.13]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AA7CE31327D for ; Fri, 6 Feb 2026 23:14:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.13 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770419686; cv=none; b=B5e7ZhzKEKxTe0qf1lqFb/x0CRv8syk3lrzlf/62jy2FTQg60IZUm/UnHgcEQsNX4SDgY/hEe6A91C5mrWXADdDmCNsnf9Qj/BA/wpDDGJ352WLdzE1dQUVTrbUst+cWZjO+VrF2BIH304q3dTHGSGldaTQYAq3xUMlBAu9Lzko= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770419686; c=relaxed/simple; bh=urUFSF3dVgkSKy3H7ccPkgVi9Omn9FQ3Nv85PTissdI=; h=Subject:To:Cc:From:Date:References:In-Reply-To:Message-Id; b=afON/QiL2BcjxTGunQzqv01C2KZkXMEkJQzEP7QYqz4ss+jne36GwEngYWGvlIv4U40sTGZgZDhIO83U5I8t4sXLD08JZNP2t8sAKw+UYMZ4L4gkCoZNDt5p0joNik7GyjD3CdCFSiHMBONubViuWp8DIhHapcsnvKAmQ9cw8f4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=pass smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=dBs9/HxF; arc=none smtp.client-ip=192.198.163.13 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="dBs9/HxF" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1770419687; x=1801955687; h=subject:to:cc:from:date:references:in-reply-to: message-id; bh=urUFSF3dVgkSKy3H7ccPkgVi9Omn9FQ3Nv85PTissdI=; b=dBs9/HxFhMdNcPbohk+7oVIVE40Ln0erwYptBrHUfKwZHaGIOW4c8wxF 2el7PVZTGnYhHPusav3MF2xYucdNSs4sPGZn838md2m0xcRFjojSYV7OE CUT4dyStqLKLmldiVT1bWTy8hvBIZ+FO9do9UBBBPekXJeo25FfXpvCTZ BQ7kIbNbb2/mf8l7xK0DIPIBLRlzmWc5uvH1WPixaVSaqoIQRFtdcpQqV muMCIollM85ofoaqN8xeXuTCzS/wMd7Tk68D4BVvjQMSBnq3EFO7DuYXh L1siNV5FC7k0r9zkkOMxbAECmnRFgYo1XqQU0QScyuknxfenCrCCIng9P w==; X-CSE-ConnectionGUID: gV2KOPnKSTaySSaPjYQZbw== X-CSE-MsgGUID: 2k/l/Qp4Sd6GCaWZM6y2Mw== X-IronPort-AV: E=McAfee;i="6800,10657,11693"; a="74232706" X-IronPort-AV: E=Sophos;i="6.21,277,1763452800"; d="scan'208";a="74232706" Received: from fmviesa008.fm.intel.com ([10.60.135.148]) by fmvoesa107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Feb 2026 15:14:46 -0800 X-CSE-ConnectionGUID: ZT0nL+3HT1u9PmGK4ImQ5g== X-CSE-MsgGUID: d5KnKFdRQbGkSNq13vu5Zw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.21,277,1763452800"; d="scan'208";a="210851525" Received: from davehans-spike.ostc.intel.com (HELO localhost.localdomain) ([10.165.164.11]) by fmviesa008.fm.intel.com with ESMTP; 06 Feb 2026 15:14:46 -0800 Subject: [PATCH 4/6] x86/cpu: Add platform ID to CPU info structure To: linux-kernel@vger.kernel.org Cc: sohil.mehta@intel.com, zhao1.liu@intel.com, Dave Hansen , Borislav Petkov , "H. Peter Anvin" , Ingo Molnar , Jon Kohler , Pawan Gupta , "Peter Zijlstra (Intel)" , Thomas Gleixner , Tony Luck , x86@kernel.org From: Dave Hansen Date: Fri, 06 Feb 2026 15:14:45 -0800 References: <20260206231438.720FF4E3@davehans-spike.ostc.intel.com> In-Reply-To: <20260206231438.720FF4E3@davehans-spike.ostc.intel.com> Message-Id: <20260206231445.2D569730@davehans-spike.ostc.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Dave Hansen The end goal here is to be able to do x86_match_cpu() and match on a specific platform ID. While it would be possible to stash this ID off somewhere or read it dynamically, that approaches would not be consistent with the other fields which can be matched. Read the platform ID and store it in cpuinfo_x86->x86_platform_id. There are lots of sites to set this new field. Place it near the place c->microcode is established since the platform ID is so closely intertwined with microcode updates. Note: This should not grow the size of 'struct cpuinfo_x86' in practice since the u8 fits next to another u8 in the structure. Signed-off-by: Dave Hansen Cc: Thomas Gleixner Cc: Ingo Molnar Cc: Borislav Petkov Cc: Dave Hansen Cc: "H. Peter Anvin" Cc: Tony Luck Cc: Pawan Gupta Cc: "Peter Zijlstra (Intel)" Cc: x86@kernel.org Cc: Jon Kohler --- b/arch/x86/include/asm/processor.h | 2 ++ b/arch/x86/kernel/cpu/common.c | 4 +++- b/arch/x86/kernel/cpu/intel.c | 1 + 3 files changed, 6 insertions(+), 1 deletion(-) diff -puN arch/x86/include/asm/processor.h~cpu-x86_stepping arch/x86/includ= e/asm/processor.h --- a/arch/x86/include/asm/processor.h~cpu-x86_stepping 2026-02-06 15:14:23= .528790212 -0800 +++ b/arch/x86/include/asm/processor.h 2026-02-06 15:14:23.567791582 -0800 @@ -140,6 +140,8 @@ struct cpuinfo_x86 { __u32 x86_vfm; }; __u8 x86_stepping; + /* Intel-only. 3 bits: */ + __u8 x86_platform_id; #ifdef CONFIG_X86_64 /* Number of 4K pages in DTLB/ITLB combined(in pages): */ int x86_tlbsize; diff -puN arch/x86/kernel/cpu/common.c~cpu-x86_stepping arch/x86/kernel/cpu= /common.c --- a/arch/x86/kernel/cpu/common.c~cpu-x86_stepping 2026-02-06 15:14:23.552= 791055 -0800 +++ b/arch/x86/kernel/cpu/common.c 2026-02-06 15:14:23.568791618 -0800 @@ -1981,7 +1981,9 @@ static void identify_cpu(struct cpuinfo_ c->loops_per_jiffy =3D loops_per_jiffy; c->x86_cache_size =3D 0; c->x86_vendor =3D X86_VENDOR_UNKNOWN; - c->x86_model =3D c->x86_stepping =3D 0; /* So far unknown... */ + c->x86_model =3D 0; + c->x86_stepping =3D 0; + c->x86_platform_id =3D 0; c->x86_vendor_id[0] =3D '\0'; /* Unset */ c->x86_model_id[0] =3D '\0'; /* Unset */ #ifdef CONFIG_X86_64 diff -puN arch/x86/kernel/cpu/intel.c~cpu-x86_stepping arch/x86/kernel/cpu/= intel.c --- a/arch/x86/kernel/cpu/intel.c~cpu-x86_stepping 2026-02-06 15:14:23.5647= 91477 -0800 +++ b/arch/x86/kernel/cpu/intel.c 2026-02-06 15:14:23.568791618 -0800 @@ -205,6 +205,7 @@ static void early_init_intel(struct cpui =20 if (c->x86 >=3D 6 && !cpu_has(c, X86_FEATURE_IA64)) c->microcode =3D intel_get_microcode_revision(); + c->x86_platform_id =3D intel_get_platform_id(); =20 /* Now if any of them are set, check the blacklist and clear the lot */ if ((cpu_has(c, X86_FEATURE_SPEC_CTRL) || _