From nobody Mon Feb 9 08:55:54 2026 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.13]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DA7C430F803 for ; Fri, 6 Feb 2026 23:14:44 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.13 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770419685; cv=none; b=BfBi7whnzTXzJq3KAM1b7r1kYZuZ9qcPa7FZF5YJJP8JtVlPSAVfv4U8KKIm/u7mS2xXJxMuETeaekisHj121LnzkK0xfsGqMkUkPqri7uRBToqx/C2CqUkaC/6WkJABwQ0W8kK+CMrvaZ/ubUUWV8wYLQtGm7D8NaMQqZUR6/o= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770419685; c=relaxed/simple; bh=VK0Ck29wdOWRaEnKwH6fSaxeq1lBqpZDmM3vN1CaVjs=; h=Subject:To:Cc:From:Date:References:In-Reply-To:Message-Id; b=WniTqK16RkeKWDFkg5BgVH7POv9Rv4XjCoNtGXbfYafWVTCjHVvG5+hFZJ67hDy+q0fC+AmyYbP2oAprNhV5S15SNuz/VpPgWGVhMmei7NY0MP+QK3S1Frjj16QlQC2n8OVXSKPsX/BVpjMfGvbLblNoYeW6EliBG7smQDVx13c= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=pass smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=ZFB6u2eF; arc=none smtp.client-ip=192.198.163.13 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="ZFB6u2eF" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1770419685; x=1801955685; h=subject:to:cc:from:date:references:in-reply-to: message-id; bh=VK0Ck29wdOWRaEnKwH6fSaxeq1lBqpZDmM3vN1CaVjs=; b=ZFB6u2eFeEbU2JVXYiYason5f+xqP3gGytjw+C8eKuPk0KUNNuhaMYdi 7Eh0aP31noMDT74HYjrqWeEdQn5RXmkAW+p/PlsGTnEy46KZ+wnWu9PfI /FR68PnAi5XwCn/yRxeLOgb46r6UVXw6VmOLEuTX9t5VSkocnUe+RUwXI ENXQ+bpeoHyesSx1pqoKcEIQDmqrXWhINDuLrZkJLqD+0y7aHGdZHmFea aslRyNWA0reWpkyd3ngAQDNAqQy5h5r2yIbGa0ZWNcvERGGuju6wsryt/ 6wZ2NEZNs9QFDdZeij+z36irLDMhoG5M8DiIRZGMvyz0h7znyIUJ93xpf g==; X-CSE-ConnectionGUID: uY4zsngaQ16BK0XQ7BJP1Q== X-CSE-MsgGUID: 1ATEclAzQaCPM3P0Y9ITdQ== X-IronPort-AV: E=McAfee;i="6800,10657,11693"; a="74232698" X-IronPort-AV: E=Sophos;i="6.21,277,1763452800"; d="scan'208";a="74232698" Received: from fmviesa008.fm.intel.com ([10.60.135.148]) by fmvoesa107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Feb 2026 15:14:45 -0800 X-CSE-ConnectionGUID: 1GaLcW04TO+6c60FNyU28Q== X-CSE-MsgGUID: kW+VIc9yRkqSesBF9Kl6BQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.21,277,1763452800"; d="scan'208";a="210851519" Received: from davehans-spike.ostc.intel.com (HELO localhost.localdomain) ([10.165.164.11]) by fmviesa008.fm.intel.com with ESMTP; 06 Feb 2026 15:14:44 -0800 Subject: [PATCH 3/6] x86/microcode: Refactor platform ID enumeration into a helper To: linux-kernel@vger.kernel.org Cc: sohil.mehta@intel.com, zhao1.liu@intel.com, Dave Hansen , Borislav Petkov , "H. Peter Anvin" , Ingo Molnar , Jon Kohler , Pawan Gupta , "Peter Zijlstra (Intel)" , Thomas Gleixner , Tony Luck , x86@kernel.org From: Dave Hansen Date: Fri, 06 Feb 2026 15:14:44 -0800 References: <20260206231438.720FF4E3@davehans-spike.ostc.intel.com> In-Reply-To: <20260206231438.720FF4E3@davehans-spike.ostc.intel.com> Message-Id: <20260206231444.8D057E6D@davehans-spike.ostc.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Dave Hansen The only code that cares about the platform ID is the microcode update code itself. To facilitate storing the platform ID in a more generic place and using it outside of the microcode update itself, put the enumeration into a helper function in a header. Mirror intel_get_microcode_revision()'s naming and location. But, moving away from intel_collect_cpu_info() means that the model and family information in CPUID is not readily available. Just call CPUID again. Note that the microcode header is a mask of supported platform IDs. Only stick the ID part in the helper. Leave the 1< Cc: Thomas Gleixner Cc: Ingo Molnar Cc: Borislav Petkov Cc: Dave Hansen Cc: "H. Peter Anvin" Cc: Tony Luck Cc: Pawan Gupta Cc: "Peter Zijlstra (Intel)" Cc: x86@kernel.org Cc: Jon Kohler --- b/arch/x86/include/asm/microcode.h | 32 +++++++++++++++++++++++++++= +++++ b/arch/x86/kernel/cpu/microcode/intel.c | 10 +--------- 2 files changed, 33 insertions(+), 9 deletions(-) diff -puN arch/x86/include/asm/microcode.h~refactor-get-processor-flags arc= h/x86/include/asm/microcode.h --- a/arch/x86/include/asm/microcode.h~refactor-get-processor-flags 2026-02= -06 15:14:22.932769264 -0800 +++ b/arch/x86/include/asm/microcode.h 2026-02-06 15:14:22.989771267 -0800 @@ -2,6 +2,8 @@ #ifndef _ASM_X86_MICROCODE_H #define _ASM_X86_MICROCODE_H =20 +#include +#include #include =20 struct cpu_signature { @@ -75,6 +77,36 @@ static inline u32 intel_get_microcode_re =20 return rev; } + +/* + * Use CPUID to generate a "vfm" value. Useful + * before 'cpuinfo_x86' structures are populated. + */ +static inline u32 intel_cpuid_vfm(void) +{ + u32 eax =3D cpuid_eax(1); + u32 fam =3D x86_family(eax); + u32 model =3D x86_model(eax); + + return IFM(fam, model); +} + +static inline u32 intel_get_platform_id(void) +{ + unsigned int val[2]; + + /* + * This can be called early. Use CPUID directly to + * generate the VFM value for this CPU. + */ + if (intel_cpuid_vfm() < INTEL_PENTIUM_III_DESCHUTES) + return 0; + + /* get processor flags from MSR 0x17 */ + native_rdmsr(MSR_IA32_PLATFORM_ID, val[0], val[1]); + + return (val[1] >> 18) & 7; +} #endif /* !CONFIG_CPU_SUP_INTEL */ =20 bool microcode_nmi_handler(void); diff -puN arch/x86/kernel/cpu/microcode/intel.c~refactor-get-processor-flag= s arch/x86/kernel/cpu/microcode/intel.c --- a/arch/x86/kernel/cpu/microcode/intel.c~refactor-get-processor-flags 20= 26-02-06 15:14:22.987771197 -0800 +++ b/arch/x86/kernel/cpu/microcode/intel.c 2026-02-06 15:14:22.989771267 -= 0800 @@ -123,16 +123,8 @@ static inline unsigned int exttable_size void intel_collect_cpu_info(struct cpu_signature *sig) { sig->sig =3D cpuid_eax(1); - sig->pf =3D 0; sig->rev =3D intel_get_microcode_revision(); - - if (IFM(x86_family(sig->sig), x86_model(sig->sig)) >=3D INTEL_PENTIUM_III= _DESCHUTES) { - unsigned int val[2]; - - /* get processor flags from MSR 0x17 */ - native_rdmsr(MSR_IA32_PLATFORM_ID, val[0], val[1]); - sig->pf =3D 1 << ((val[1] >> 18) & 7); - } + sig->pf =3D 1 << intel_get_platform_id(); } EXPORT_SYMBOL_GPL(intel_collect_cpu_info); =20 _