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Fri, 06 Feb 2026 09:56:32 +0000 (GMT) Received: from 1.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.ip6.arpa (172.25.6.240) by HHMAIL01.hh.imgtec.org (10.100.10.19) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.35; Fri, 6 Feb 2026 09:56:31 +0000 From: Matt Coster Date: Fri, 6 Feb 2026 09:56:26 +0000 Subject: [PATCH 2/2] drm/imagination: Add PVR_GPU_ID_FMT to format pvr_gpu_id Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20260206-bvnc-cleanup-v1-2-f3c818541fbe@imgtec.com> References: <20260206-bvnc-cleanup-v1-0-f3c818541fbe@imgtec.com> In-Reply-To: <20260206-bvnc-cleanup-v1-0-f3c818541fbe@imgtec.com> To: Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter CC: Frank Binns , Brajesh Gupta , Alessio Belle , Alexandru Dadu , , , "Matt Coster" X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=3459; i=matt.coster@imgtec.com; h=from:subject:message-id; bh=yJ7P/Wy9o6odDdmjvuxN/nO0tjNOm7u94ehiOkuCuGs=; b=owGbwMvMwCFWuUfy8817WRsYT6slMWS27jpXFvDuqsLGhgDR0Os+2RK5+plnuax5Pa4vVD+kx Xhnw9OAjlIWBjEOBlkxRZYdKyxXqP1R05K48asYZg4rE8gQBi5OAZhIeC8jw1rbDLZIq7XO88Mb SiRbVFlvROUX+m6Imeu+UyHHzfveZ4b/yTEi+fybFLLX55xMXLpHUP5bnfXqxI11JVxtzpuZq71 ZAA== X-Developer-Key: i=matt.coster@imgtec.com; a=openpgp; fpr=05A40CFCE7269D61D97100A1747F0A9036F90DFA X-Authority-Analysis: v=2.4 cv=TpLrRTXh c=1 sm=1 tr=0 ts=6985bad0 cx=c_pps a=AKOq//PuzOIrVTIF9yBwbA==:117 a=AKOq//PuzOIrVTIF9yBwbA==:17 a=N16aOacbDtMA:10 a=IkcTkHD0fZMA:10 a=HzLeVaNsDn8A:10 a=VkNPw1HP01LnGYTKEx00:22 a=Mpw57Om8IfrbqaoTuvik:22 a=GgsMoib0sEa3-_RKJdDe:22 a=r_1tXGB3AAAA:8 a=SGYt_DqNckTIVf0CK1AA:9 a=QEXdDO2ut3YA:10 a=t8nPyN_e6usw4ciXM-Pk:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMjA2MDA2NiBTYWx0ZWRfXyEdSAyxyn//q yG1s/FpkSVOSjmhF4zu29nVhmvLZWOGMd6IUTlGgInQKg0CJs/niDVJKR4ZdRWsNPvBO0TpeVT7 l658ePt1HAWjGmosJxxrFUzNiB5wKlMksZ1KllIrftE1oiYc/WgCuTs53q+8xVbCktjGrrgwYp5 GUae/flA4z1G4VlVrrHv8uaf9O/12YBIDPf/wBV392T/Rlrebhit2iVZuiN9A2jqnEHRWxBCDsJ 3NmH8jfNQX6leLkYeSauBxilLOxSvTBr4P7JEqAgqZWos4Tke7rjx8aMelKul2x9ZxPCh2qDNvZ DeVfDPBpHew6bpizlK1GmHX4r/0wqf7KLwWlEBSIeQcEbExfc+zY7sKDgw2tyWcYgLu+iazOfpq gfnhH9T+QsWROKkPN3Jlpf5awY/C+1FcbyWzShHhD08C/NwvxO22nIjrS8UUkjFFr7drRix4X0K UOu48izDJ1epoaaAJ4Q== X-Proofpoint-GUID: L8Oi0LpbWnTcm2bqG6c8VFFzyueeYsDA X-Proofpoint-ORIG-GUID: L8Oi0LpbWnTcm2bqG6c8VFFzyueeYsDA There are currently two different combinations of format specifiers used to print a struct pvr_gpu_id, one using %i and one using %d. Both of these are technically incorrect since the components are stored as u16. Introduce macros to simplify and correct the formatting of these values: - PVR_GPU_ID_FMT: A pre-constructed format string fragment, in the style of PRIu32. - PVR_GPU_ID_FMT_ARGS(): Accepts a &struct pvr_gpu_id and expands the fields into appropriate format arguments to be used with PVR_GPU_ID_FMT. - PVR_GPU_ID_FMT_ARGS_PACKED(): Accepts a packed GPUID as a u64 and extracts the components directly into appropriate format arguments to be used with PVR_GPU_ID_FMT. Signed-off-by: Matt Coster --- drivers/gpu/drm/imagination/pvr_device.c | 4 ++-- drivers/gpu/drm/imagination/pvr_device.h | 6 ++++++ drivers/gpu/drm/imagination/pvr_fw.c | 12 +++++------- 3 files changed, 13 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/imagination/pvr_device.c b/drivers/gpu/drm/ima= gination/pvr_device.c index f58bb66a6327..e032ebe1e505 100644 --- a/drivers/gpu/drm/imagination/pvr_device.c +++ b/drivers/gpu/drm/imagination/pvr_device.c @@ -362,8 +362,8 @@ pvr_build_firmware_filename(struct pvr_device *pvr_dev,= const char *base, { struct pvr_gpu_id *gpu_id =3D &pvr_dev->gpu_id; =20 - return kasprintf(GFP_KERNEL, "%s_%d.%d.%d.%d_v%d.fw", base, gpu_id->b, - gpu_id->v, gpu_id->n, gpu_id->c, major); + return kasprintf(GFP_KERNEL, "%s_" PVR_GPU_ID_FMT "_v%d.fw", base, + PVR_GPU_ID_FMT_ARGS(gpu_id), major); } =20 static void diff --git a/drivers/gpu/drm/imagination/pvr_device.h b/drivers/gpu/drm/ima= gination/pvr_device.h index 58f0eae05ad9..4213eb8dd7cd 100644 --- a/drivers/gpu/drm/imagination/pvr_device.h +++ b/drivers/gpu/drm/imagination/pvr_device.h @@ -53,6 +53,12 @@ struct pvr_gpu_id { u16 b, v, n, c; }; =20 +#define PVR_GPU_ID_FMT "%u.%u.%u.%u" +#define PVR_GPU_ID_FMT_ARGS(gpu_id) (gpu_id)->b, (gpu_id)->v, (gpu_id)->n,= (gpu_id)->c +#define PVR_GPU_ID_FMT_ARGS_PACKED(gpu_id) \ + (u32)FIELD_GET(DRM_PVR_BVNC_B, gpu_id), (u32)FIELD_GET(DRM_PVR_BVNC_V, gp= u_id), \ + (u32)FIELD_GET(DRM_PVR_BVNC_N, gpu_id), (u32)FIELD_GET(DRM_PVR_BVNC_C, gp= u_id) + /** * struct pvr_fw_version - Firmware version information * @major: Major version number. diff --git a/drivers/gpu/drm/imagination/pvr_fw.c b/drivers/gpu/drm/imagina= tion/pvr_fw.c index 779a58fe6ee8..b258c5a4f433 100644 --- a/drivers/gpu/drm/imagination/pvr_fw.c +++ b/drivers/gpu/drm/imagination/pvr_fw.c @@ -125,13 +125,11 @@ pvr_fw_validate(struct pvr_device *pvr_dev) return -EINVAL; } =20 - if (pvr_gpu_id_to_packed_bvnc(&pvr_dev->gpu_id) !=3D header->bvnc) { - struct pvr_gpu_id fw_gpu_id; - - packed_bvnc_to_pvr_gpu_id(header->bvnc, &fw_gpu_id); - drm_err(drm_dev, "FW built for incorrect GPU ID %i.%i.%i.%i (expected %i= .%i.%i.%i)\n", - fw_gpu_id.b, fw_gpu_id.v, fw_gpu_id.n, fw_gpu_id.c, - pvr_dev->gpu_id.b, pvr_dev->gpu_id.v, pvr_dev->gpu_id.n, pvr_dev->gpu_i= d.c); + u64 device_gpu_id_packed =3D pvr_gpu_id_to_packed_bvnc(&pvr_dev->gpu_id); + if (device_gpu_id_packed !=3D header->bvnc) { + drm_err(drm_dev, "FW built for incorrect GPU ID " PVR_GPU_ID_FMT " (expe= cted " PVR_GPU_ID_FMT ")\n", + PVR_GPU_ID_FMT_ARGS_PACKED(header->bvnc), + PVR_GPU_ID_FMT_ARGS_PACKED(device_gpu_id_packed)); return -EINVAL; } =20 --=20 2.52.0