From nobody Sun Feb 8 02:42:10 2026 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C378C32ED54; Thu, 5 Feb 2026 21:19:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.11.138.130 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770326397; cv=none; b=JurOxqBPSKWwu+cx2fWKTQcfYyZYUXtIR4pGWTM8gIHgo86HgwMAx5kqP+VskHcU6QO2A3U7RWBdCf7aALMSy0IHUihebQtCiP9gjjqnnQh1AnGG0EyyvvJpo34Iy4gJF2XrXfav87ESClI5t6A5S7MC0hdRt5NVkWmnTQjfT44= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770326397; c=relaxed/simple; bh=b0Ot+wQmDFYhFZ3CCvWtSLAMivCWJBM2Q2zqzd/lqN4=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=V1J0hbQn2d5xPeCRGgTLUg7q2h7AlSVZVX5Vyo6cR1Ad/Y5/M63mYjYTjau9tP3B11jPW6Ev7Dcpuo4Y7dH8Mid95438fowy8C/GVVYGU30I5FFvNmHeguzQgaLLo1Np6r4LcZsl88NjmB5y7w4boBmvvtpTuiPzilTBXZ+yJCg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de; spf=pass smtp.mailfrom=sntech.de; dkim=pass (2048-bit key) header.d=sntech.de header.i=@sntech.de header.b=FXspVDJk; arc=none smtp.client-ip=185.11.138.130 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sntech.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=sntech.de header.i=@sntech.de header.b="FXspVDJk" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=sntech.de; s=gloria202408; h=Content-Transfer-Encoding:MIME-Version:References: In-Reply-To:Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-Type; bh=ZSOvELGA2EuKRZ+dcy6xv6vUM0tTuySjHGPM8Fdt7Cg=; b=FXspVDJkdinxtd5OLNoypx0bDB /4j7Rr9t5C9Jp+248IwBpFD9XNEYx3ouJptrP92ycZ8be+CE7V80aG7P5rX3GqgWFvrxXdBlkT8UG LPG3GgwXZUYX3Nm9cTrn+o1k04+8+rQcTKldsLp9FfXBOw5PIhslcdugNcDt607R6Oss4lX5uSXKE yiGsYqTIEaXvcHq48A7UjletnmO9gwl26T5UAJ4+VpGrjOAUI8e/ZF36vMYiVnERMzkssxmQ9/n4L 9LgpbPk5Z8Rz7e1ZyFraMpQ76/1RbcvOQBCOjKMafvauAnrF8EGyTD0uEBMR5rmnfTcZ7iIAij5Ap H56z7jCw==; Received: from i53875afe.versanet.de ([83.135.90.254] helo=localhost.localdomain) by gloria.sntech.de with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1vo6lN-007GGK-Mb; Thu, 05 Feb 2026 22:19:46 +0100 From: Heiko Stuebner To: srini@kernel.org Cc: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, heiko@sntech.de, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, kever.yang@rock-chips.com, finley.xiao@rock-chips.com, w@1wt.eu, jonas@kwiboo.se Subject: [PATCH v4 1/6] dt-bindings: nvmem: rockchip,otp: Add support for RK3562 and RK3568 Date: Thu, 5 Feb 2026 22:18:56 +0100 Message-ID: <20260205211901.490181-2-heiko@sntech.de> X-Mailer: git-send-email 2.47.2 In-Reply-To: <20260205211901.490181-1-heiko@sntech.de> References: <20260205211901.490181-1-heiko@sntech.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Kever Yang Add compatible entry for the otp controller in RK3562 and RK3568, add schema for different clock names for new entry. Signed-off-by: Kever Yang Reviewed-by: Rob Herring (Arm) Signed-off-by: Heiko Stuebner --- .../bindings/nvmem/rockchip,otp.yaml | 58 +++++++++++++++---- 1 file changed, 48 insertions(+), 10 deletions(-) diff --git a/Documentation/devicetree/bindings/nvmem/rockchip,otp.yaml b/Do= cumentation/devicetree/bindings/nvmem/rockchip,otp.yaml index dc89020b0950..e90136f7dcfb 100644 --- a/Documentation/devicetree/bindings/nvmem/rockchip,otp.yaml +++ b/Documentation/devicetree/bindings/nvmem/rockchip,otp.yaml @@ -14,6 +14,8 @@ properties: enum: - rockchip,px30-otp - rockchip,rk3308-otp + - rockchip,rk3562-otp + - rockchip,rk3568-otp - rockchip,rk3576-otp - rockchip,rk3588-otp =20 @@ -26,19 +28,15 @@ properties: =20 clock-names: minItems: 3 - items: - - const: otp - - const: apb_pclk - - const: phy - - const: arb + maxItems: 4 =20 resets: minItems: 1 - maxItems: 3 + maxItems: 4 =20 reset-names: minItems: 1 - maxItems: 3 + maxItems: 4 =20 required: - compatible @@ -64,13 +62,44 @@ allOf: clocks: maxItems: 3 clock-names: - maxItems: 3 + items: + - const: otp + - const: apb_pclk + - const: phy resets: maxItems: 1 reset-names: items: - const: phy =20 + - if: + properties: + compatible: + contains: + enum: + - rockchip,rk3562-otp + - rockchip,rk3568-otp + then: + properties: + clocks: + minItems: 4 + maxItems: 4 + clock-names: + items: + - const: otp + - const: apb_pclk + - const: phy + - const: sbpi + resets: + minItems: 4 + maxItems: 4 + reset-names: + items: + - const: otp + - const: apb + - const: phy + - const: sbpi + - if: properties: compatible: @@ -82,7 +111,10 @@ allOf: clocks: maxItems: 3 clock-names: - maxItems: 3 + items: + - const: otp + - const: apb_pclk + - const: phy resets: minItems: 2 maxItems: 2 @@ -101,10 +133,16 @@ allOf: properties: clocks: minItems: 4 + maxItems: 4 clock-names: - minItems: 4 + items: + - const: otp + - const: apb_pclk + - const: phy + - const: arb resets: minItems: 3 + maxItems: 3 reset-names: items: - const: otp --=20 2.47.2 From nobody Sun Feb 8 02:42:10 2026 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1240D32ED57; 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Thu, 05 Feb 2026 22:19:46 +0100 From: Heiko Stuebner To: srini@kernel.org Cc: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, heiko@sntech.de, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, kever.yang@rock-chips.com, finley.xiao@rock-chips.com, w@1wt.eu, jonas@kwiboo.se Subject: [PATCH v4 2/6] dt-bindings: nvmem: rockchip,otp: Add compatible for RK3528 Date: Thu, 5 Feb 2026 22:18:57 +0100 Message-ID: <20260205211901.490181-3-heiko@sntech.de> X-Mailer: git-send-email 2.47.2 In-Reply-To: <20260205211901.490181-1-heiko@sntech.de> References: <20260205211901.490181-1-heiko@sntech.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Jonas Karlman Add compatible string for the OTP controller in RK3528. Compared to the RK3562 and RK3568 the OTP in RK3528 does not have a phy clock or reset. Signed-off-by: Jonas Karlman Signed-off-by: Heiko Stuebner --- .../bindings/nvmem/rockchip,otp.yaml | 25 +++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/Documentation/devicetree/bindings/nvmem/rockchip,otp.yaml b/Do= cumentation/devicetree/bindings/nvmem/rockchip,otp.yaml index e90136f7dcfb..7e4d5e1c4ced 100644 --- a/Documentation/devicetree/bindings/nvmem/rockchip,otp.yaml +++ b/Documentation/devicetree/bindings/nvmem/rockchip,otp.yaml @@ -14,6 +14,7 @@ properties: enum: - rockchip,px30-otp - rockchip,rk3308-otp + - rockchip,rk3528-otp - rockchip,rk3562-otp - rockchip,rk3568-otp - rockchip,rk3576-otp @@ -72,6 +73,30 @@ allOf: items: - const: phy =20 + - if: + properties: + compatible: + contains: + enum: + - rockchip,rk3528-otp + then: + properties: + clocks: + maxItems: 3 + clock-names: + items: + - const: otp + - const: apb_pclk + - const: sbpi + resets: + minItems: 3 + maxItems: 3 + reset-names: + items: + - const: otp + - const: apb + - const: sbpi + - if: properties: compatible: --=20 2.47.2 From nobody Sun Feb 8 02:42:10 2026 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6F26633067C; Thu, 5 Feb 2026 21:19:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.11.138.130 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770326397; cv=none; b=k9Spo24N0ZeTebX8LEYL6ZdmBGr1BlbOy3+9q3c+ra8dMX0V82s2letNg9Hp453PTlzD+JbjUz7gPV0GvxPMLijqrQCqQbhRR5gT/bFwsg8hAxB9xVIwMTffQZwjp9fPnMMvgmF00d/00qeTXPQyhZgCtRTKIODnuvNTAPezhvw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770326397; c=relaxed/simple; bh=Xasw4d4mwXG93qD8usrdknc6eFJyRzwpsqBGaPXBE5c=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=MsbRR6CKPs6FP53HwkSlzA8fLmlLtxf/6ejP6UK0rntUqVXHWmmR22M0yX59HaR6d7xJNjF6DUs0pRC+TA0yo+tUjHdyYw07iDhVMkDTypc/+xF6nQ0Dbl/sLsKv65ij2A7ySDnuwfOoRkygEUKyeXGKDjXuP0Jo2CyYiYPu1oY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de; spf=pass smtp.mailfrom=sntech.de; dkim=pass (2048-bit key) header.d=sntech.de header.i=@sntech.de header.b=eaSMbcqw; arc=none smtp.client-ip=185.11.138.130 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sntech.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=sntech.de header.i=@sntech.de header.b="eaSMbcqw" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=sntech.de; s=gloria202408; h=Content-Transfer-Encoding:MIME-Version:References: In-Reply-To:Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-Type; bh=ZOF//ASirxT4IYkkrfdpjk6ayaCFhALsQsVAb+Q9UIA=; b=eaSMbcqwVMt9yjzpsxTrnAkLIZ bS8/943Z8NMb4IKV652gDM6lHm9YRf7qhsIVdIo1DaFMH+gj1UASpJfuGXpYPz30y9dV3yUCDWBIU eJVE+tMqDYUgl+ctF7Pe4+haiBuiW7bXYAXN3VXBQOP+gWw2Osj7Wln+p9giBPJMPP7ceGwc8tViB 1WzmqOf9yd2mtrJ/q+o7RoHvUprDjEjKZBox0lHdVLzL8PHgkKfxZsdqD0rWorZMiEzzM5qKWVkL8 CWscPJlLnpayL/EDRM9xU6heCP6bb9TG0o4YBOxjURo4ZokEWF2YOrNgTjx/JnJaAlv5Bkkckojx4 8FwiH1Vg==; Received: from i53875afe.versanet.de ([83.135.90.254] helo=localhost.localdomain) by gloria.sntech.de with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1vo6lO-007GGK-OW; Thu, 05 Feb 2026 22:19:47 +0100 From: Heiko Stuebner To: srini@kernel.org Cc: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, heiko@sntech.de, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, kever.yang@rock-chips.com, finley.xiao@rock-chips.com, w@1wt.eu, jonas@kwiboo.se Subject: [PATCH v4 3/6] nvmem: rockchip-otp: Handle internal word_size in main reg_read op Date: Thu, 5 Feb 2026 22:18:58 +0100 Message-ID: <20260205211901.490181-4-heiko@sntech.de> X-Mailer: git-send-email 2.47.2 In-Reply-To: <20260205211901.490181-1-heiko@sntech.de> References: <20260205211901.490181-1-heiko@sntech.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Jonas Karlman Rockchip SoCs RK3576 and RK3588 read data from the OTP using 32-bit words instead of normal 8-bit bytes. Similar RK3506, RK3528, RK3562 and RK3568 will read data from OTP using 16-bit words. The nvmem core stride and word_size cannot fully be used as cells is not always aligned. Continue to report a stride=3D1 and word_size=3D1 in nvmem_config and instead handle use of SoC specific word_size internally in the driver. Move current SoC specific word_size handling from the RK3588 read_reg operation to the main read_reg operation to help simplify the SoC specific read_reg operation and allow code reuse in a future RK3568 reg_read operation. Signed-off-by: Jonas Karlman Tested-by: Willy Tarreau Signed-off-by: Heiko Stuebner --- drivers/nvmem/rockchip-otp.c | 72 ++++++++++++++++++++---------------- 1 file changed, 40 insertions(+), 32 deletions(-) diff --git a/drivers/nvmem/rockchip-otp.c b/drivers/nvmem/rockchip-otp.c index d88f12c53242..45bbb6147fb7 100644 --- a/drivers/nvmem/rockchip-otp.c +++ b/drivers/nvmem/rockchip-otp.c @@ -59,7 +59,6 @@ #define RK3588_OTPC_AUTO_EN 0x08 #define RK3588_OTPC_INT_ST 0x84 #define RK3588_OTPC_DOUT0 0x20 -#define RK3588_NBYTES 4 #define RK3588_BURST_NUM 1 #define RK3588_BURST_SHIFT 8 #define RK3588_ADDR_SHIFT 16 @@ -69,6 +68,7 @@ struct rockchip_data { int size; int read_offset; + int word_size; const char * const *clks; int num_clks; nvmem_reg_read_t reg_read; @@ -185,48 +185,28 @@ static int px30_otp_read(void *context, unsigned int = offset, } =20 static int rk3588_otp_read(void *context, unsigned int offset, - void *val, size_t bytes) + void *val, size_t count) { struct rockchip_otp *otp =3D context; - unsigned int addr_start, addr_end, addr_len; - int ret, i =3D 0; - u32 data; - u8 *buf; - - addr_start =3D round_down(offset, RK3588_NBYTES) / RK3588_NBYTES; - addr_end =3D round_up(offset + bytes, RK3588_NBYTES) / RK3588_NBYTES; - addr_len =3D addr_end - addr_start; - addr_start +=3D otp->data->read_offset / RK3588_NBYTES; - - buf =3D kzalloc(array_size(addr_len, RK3588_NBYTES), GFP_KERNEL); - if (!buf) - return -ENOMEM; + u32 *buf =3D val; + int ret; =20 - while (addr_len--) { - writel((addr_start << RK3588_ADDR_SHIFT) | + while (count--) { + writel((offset++ << RK3588_ADDR_SHIFT) | (RK3588_BURST_NUM << RK3588_BURST_SHIFT), otp->base + RK3588_OTPC_AUTO_CTRL); writel(RK3588_AUTO_EN, otp->base + RK3588_OTPC_AUTO_EN); =20 ret =3D rockchip_otp_wait_status(otp, RK3588_OTPC_INT_ST, RK3588_RD_DONE); - if (ret < 0) { + if (ret) { dev_err(otp->dev, "timeout during read setup\n"); - goto read_end; + return ret; } =20 - data =3D readl(otp->base + RK3588_OTPC_DOUT0); - memcpy(&buf[i], &data, RK3588_NBYTES); - - i +=3D RK3588_NBYTES; - addr_start++; + *buf++ =3D readl(otp->base + RK3588_OTPC_DOUT0); } =20 - memcpy(val, buf + offset % RK3588_NBYTES, bytes); - -read_end: - kfree(buf); - return ret; } =20 @@ -234,7 +214,7 @@ static int rockchip_otp_read(void *context, unsigned in= t offset, void *val, size_t bytes) { struct rockchip_otp *otp =3D context; - int ret; + int ret, word_size; =20 if (!otp->data || !otp->data->reg_read) return -EINVAL; @@ -245,8 +225,34 @@ static int rockchip_otp_read(void *context, unsigned i= nt offset, return ret; } =20 - ret =3D otp->data->reg_read(context, offset, val, bytes); + offset +=3D otp->data->read_offset; + word_size =3D otp->data->word_size; + + if (word_size > 1) { + unsigned int addr_start, addr_end; + size_t count; + u8 *buf; + + addr_start =3D offset / word_size; + addr_end =3D DIV_ROUND_UP(offset + bytes, word_size); + count =3D addr_end - addr_start; + + buf =3D kzalloc(array_size(count, word_size), GFP_KERNEL); + if (!buf) { + ret =3D -ENOMEM; + goto err; + } + + ret =3D otp->data->reg_read(context, addr_start, buf, count); + if (!ret) + memcpy(val, buf + (offset % word_size), bytes); + + kfree(buf); + } else { + ret =3D otp->data->reg_read(context, offset, val, bytes); + } =20 +err: clk_bulk_disable_unprepare(otp->data->num_clks, otp->clks); =20 return ret; @@ -259,7 +265,7 @@ static struct nvmem_config otp_config =3D { .type =3D NVMEM_TYPE_OTP, .read_only =3D true, .stride =3D 1, - .word_size =3D 1, + .word_size =3D sizeof(u8), .reg_read =3D rockchip_otp_read, }; =20 @@ -277,6 +283,7 @@ static const struct rockchip_data px30_data =3D { static const struct rockchip_data rk3576_data =3D { .size =3D 0x100, .read_offset =3D 0x700, + .word_size =3D sizeof(u32), .clks =3D px30_otp_clocks, .num_clks =3D ARRAY_SIZE(px30_otp_clocks), .reg_read =3D rk3588_otp_read, @@ -289,6 +296,7 @@ static const char * const rk3588_otp_clocks[] =3D { static const struct rockchip_data rk3588_data =3D { .size =3D 0x400, .read_offset =3D 0xc00, + .word_size =3D sizeof(u32), .clks =3D rk3588_otp_clocks, .num_clks =3D ARRAY_SIZE(rk3588_otp_clocks), .reg_read =3D rk3588_otp_read, --=20 2.47.2 From nobody Sun Feb 8 02:42:10 2026 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 334FE330D5E; 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Thu, 05 Feb 2026 22:19:47 +0100 From: Heiko Stuebner To: srini@kernel.org Cc: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, heiko@sntech.de, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, kever.yang@rock-chips.com, finley.xiao@rock-chips.com, w@1wt.eu, jonas@kwiboo.se Subject: [PATCH v4 4/6] nvmem: rockchip-otp: Add support for RK3568 Date: Thu, 5 Feb 2026 22:18:59 +0100 Message-ID: <20260205211901.490181-5-heiko@sntech.de> X-Mailer: git-send-email 2.47.2 In-Reply-To: <20260205211901.490181-1-heiko@sntech.de> References: <20260205211901.490181-1-heiko@sntech.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Finley Xiao This adds the necessary data for handling otp the rk3568. Signed-off-by: Finley Xiao Signed-off-by: Kever Yang Signed-off-by: Heiko Stuebner --- drivers/nvmem/rockchip-otp.c | 69 ++++++++++++++++++++++++++++++++++++ 1 file changed, 69 insertions(+) diff --git a/drivers/nvmem/rockchip-otp.c b/drivers/nvmem/rockchip-otp.c index 45bbb6147fb7..cfb69bc58869 100644 --- a/drivers/nvmem/rockchip-otp.c +++ b/drivers/nvmem/rockchip-otp.c @@ -27,6 +27,7 @@ #define OTPC_USER_CTRL 0x0100 #define OTPC_USER_ADDR 0x0104 #define OTPC_USER_ENABLE 0x0108 +#define OTPC_USER_QP 0x0120 #define OTPC_USER_Q 0x0124 #define OTPC_INT_STATUS 0x0304 #define OTPC_SBPI_CMD0_OFFSET 0x1000 @@ -184,6 +185,58 @@ static int px30_otp_read(void *context, unsigned int o= ffset, return ret; } =20 +static int rk3568_otp_read(void *context, unsigned int offset, void *val, + size_t count) +{ + struct rockchip_otp *otp =3D context; + u16 *buf =3D val; + u32 otp_qp; + int ret; + + ret =3D rockchip_otp_reset(otp); + if (ret) { + dev_err(otp->dev, "failed to reset otp phy\n"); + return ret; + } + + ret =3D rockchip_otp_ecc_enable(otp, true); + if (ret) { + dev_err(otp->dev, "rockchip_otp_ecc_enable err\n"); + return ret; + } + + writel(OTPC_USE_USER | OTPC_USE_USER_MASK, otp->base + OTPC_USER_CTRL); + udelay(5); + + while (count--) { + writel(offset++ | OTPC_USER_ADDR_MASK, + otp->base + OTPC_USER_ADDR); + writel(OTPC_USER_FSM_ENABLE | OTPC_USER_FSM_ENABLE_MASK, + otp->base + OTPC_USER_ENABLE); + + ret =3D rockchip_otp_wait_status(otp, OTPC_INT_STATUS, + OTPC_USER_DONE); + if (ret) { + dev_err(otp->dev, "timeout during read setup\n"); + goto read_end; + } + + otp_qp =3D readl(otp->base + OTPC_USER_QP); + if (((otp_qp & 0xc0) =3D=3D 0xc0) || (otp_qp & 0x20)) { + ret =3D -EIO; + dev_err(otp->dev, "ecc check error during read setup\n"); + goto read_end; + } + + *buf++ =3D readl(otp->base + OTPC_USER_Q); + } + +read_end: + writel(0x0 | OTPC_USE_USER_MASK, otp->base + OTPC_USER_CTRL); + + return ret; +} + static int rk3588_otp_read(void *context, unsigned int offset, void *val, size_t count) { @@ -280,6 +333,18 @@ static const struct rockchip_data px30_data =3D { .reg_read =3D px30_otp_read, }; =20 +static const char * const rk3568_otp_clocks[] =3D { + "otp", "apb_pclk", "phy", "sbpi", +}; + +static const struct rockchip_data rk3568_data =3D { + .size =3D 0x80, + .word_size =3D sizeof(u16), + .clks =3D rk3568_otp_clocks, + .num_clks =3D ARRAY_SIZE(rk3568_otp_clocks), + .reg_read =3D rk3568_otp_read, +}; + static const struct rockchip_data rk3576_data =3D { .size =3D 0x100, .read_offset =3D 0x700, @@ -311,6 +376,10 @@ static const struct of_device_id rockchip_otp_match[] = =3D { .compatible =3D "rockchip,rk3308-otp", .data =3D &px30_data, }, + { + .compatible =3D "rockchip,rk3568-otp", + .data =3D &rk3568_data, + }, { .compatible =3D "rockchip,rk3576-otp", .data =3D &rk3576_data, --=20 2.47.2 From nobody Sun Feb 8 02:42:10 2026 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 55FBC33065C; Thu, 5 Feb 2026 21:19:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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Thu, 05 Feb 2026 22:19:48 +0100 From: Heiko Stuebner To: srini@kernel.org Cc: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, heiko@sntech.de, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, kever.yang@rock-chips.com, finley.xiao@rock-chips.com, w@1wt.eu, jonas@kwiboo.se Subject: [PATCH v4 5/6] nvmem: rockchip-otp: Add support for RK3562 Date: Thu, 5 Feb 2026 22:19:00 +0100 Message-ID: <20260205211901.490181-6-heiko@sntech.de> X-Mailer: git-send-email 2.47.2 In-Reply-To: <20260205211901.490181-1-heiko@sntech.de> References: <20260205211901.490181-1-heiko@sntech.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Finley Xiao This adds the necessary data for handling otp on the rk3562. Signed-off-by: Finley Xiao Signed-off-by: Kever Yang Signed-off-by: Heiko Stuebner --- drivers/nvmem/rockchip-otp.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/nvmem/rockchip-otp.c b/drivers/nvmem/rockchip-otp.c index cfb69bc58869..62ce22d72586 100644 --- a/drivers/nvmem/rockchip-otp.c +++ b/drivers/nvmem/rockchip-otp.c @@ -376,6 +376,10 @@ static const struct of_device_id rockchip_otp_match[] = =3D { .compatible =3D "rockchip,rk3308-otp", .data =3D &px30_data, }, + { + .compatible =3D "rockchip,rk3562-otp", + .data =3D &rk3568_data, + }, { .compatible =3D "rockchip,rk3568-otp", .data =3D &rk3568_data, --=20 2.47.2 From nobody Sun Feb 8 02:42:10 2026 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C372032BF23; Thu, 5 Feb 2026 21:19:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.11.138.130 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770326397; cv=none; b=kyPitbgrkcCcs33eYdmcri68iSy4oLsdP6coNpMCXvqGsIV1mG1DAL3hEdIRym8nlys3CINVafQZawah4HqV7dbs4jVmL16ZjobKuiHNxtGGRz3fMno2G0qKnBEaOFP9HKGTil1ABxBKv7MR8+WMDgfwF34dv+LmZWDZDdQsSDo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770326397; c=relaxed/simple; bh=LxtDRo9j2d9jEPzrf9el54kc9kssnfvVqksCnraeOL8=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=ZL2M44UMdGniBSsYynZlepGndgmlGJMR7ZKhLs3hP5pDYmeTQ1uO8Ryifi04JT6MI5ki2cPhD+RwCN4weupiV5NbP05CKHGQkpGrZr2BR36no+mrJV/NUmtoFYfIjnK8bwRo/J9MMnURyCKc2yZu8n52yY6mflZKjtmXkdFuF1I= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de; spf=pass smtp.mailfrom=sntech.de; dkim=pass (2048-bit key) header.d=sntech.de header.i=@sntech.de header.b=EYyfYt4w; arc=none smtp.client-ip=185.11.138.130 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sntech.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=sntech.de header.i=@sntech.de header.b="EYyfYt4w" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=sntech.de; s=gloria202408; h=Content-Transfer-Encoding:MIME-Version:References: In-Reply-To:Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-Type; bh=1hNV9IUB5w5au3NsTLYYRa1ygl6b7jhZ/NpWWlTkpJI=; b=EYyfYt4wodonT7h7+8rY+/oC0I gBJ8FScAIPK9+39RLp1mRgx34ddagBLoY5NHqkI+JGgFD+HF4boH3ltEQgPNRWeNlibc9URsr1QUz d6fYCQC77CoCXGgAG8szMJT/GCaHtT6zUnH7PPib21HcIIr6gVA525F43T1947jF3kQ+7/VOlCBlh C1kqmuXG+1+OUfUdvGTEYBgjvm0mj3uw7bYchs4+rS1Zp5mwkxeISUEYYPugaY15/qjfOp7NCwOns 2nrW5xlWik4Fu622bSBcM4CIgVw3JmVQF8ccp4FMireukQSZIb3YUVo3Y9VVPblh28FZ8+NQOQiNc PV8RZtbQ==; Received: from i53875afe.versanet.de ([83.135.90.254] helo=localhost.localdomain) by gloria.sntech.de with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1vo6lQ-007GGK-Aq; Thu, 05 Feb 2026 22:19:48 +0100 From: Heiko Stuebner To: srini@kernel.org Cc: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, heiko@sntech.de, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, kever.yang@rock-chips.com, finley.xiao@rock-chips.com, w@1wt.eu, jonas@kwiboo.se Subject: [PATCH v4 6/6] nvmem: rockchip-otp: Add support for RK3528 Date: Thu, 5 Feb 2026 22:19:01 +0100 Message-ID: <20260205211901.490181-7-heiko@sntech.de> X-Mailer: git-send-email 2.47.2 In-Reply-To: <20260205211901.490181-1-heiko@sntech.de> References: <20260205211901.490181-1-heiko@sntech.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Jonas Karlman Add support for the OTP controller in RK3528. The OTPC is similar to the OTPC in RK3562 and RK3568, exept for a missing phy clock and reset. Signed-off-by: Jonas Karlman Signed-off-by: Heiko Stuebner Tested-by: Willy Tarreau --- drivers/nvmem/rockchip-otp.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/drivers/nvmem/rockchip-otp.c b/drivers/nvmem/rockchip-otp.c index 62ce22d72586..0ec78b5e19e7 100644 --- a/drivers/nvmem/rockchip-otp.c +++ b/drivers/nvmem/rockchip-otp.c @@ -333,6 +333,18 @@ static const struct rockchip_data px30_data =3D { .reg_read =3D px30_otp_read, }; =20 +static const char * const rk3528_otp_clocks[] =3D { + "otp", "apb_pclk", "sbpi", +}; + +static const struct rockchip_data rk3528_data =3D { + .size =3D 0x80, + .word_size =3D sizeof(u16), + .clks =3D rk3528_otp_clocks, + .num_clks =3D ARRAY_SIZE(rk3528_otp_clocks), + .reg_read =3D rk3568_otp_read, +}; + static const char * const rk3568_otp_clocks[] =3D { "otp", "apb_pclk", "phy", "sbpi", }; @@ -376,6 +388,10 @@ static const struct of_device_id rockchip_otp_match[] = =3D { .compatible =3D "rockchip,rk3308-otp", .data =3D &px30_data, }, + { + .compatible =3D "rockchip,rk3528-otp", + .data =3D &rk3528_data, + }, { .compatible =3D "rockchip,rk3562-otp", .data =3D &rk3568_data, --=20 2.47.2