From nobody Sun Feb 8 02:55:55 2026 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.133.124]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 25F32425CCB for ; Thu, 5 Feb 2026 15:44:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=170.10.133.124 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770306246; cv=none; b=F//ywSZUlGJZPmwKyYewrFTDndAqqRqv16J6WuCTDzvPqEWiAIou54zJiQccjYuu916zGkZuqQMwgNacTHggsyiVYDEBjaOvl+0k2ek5PaL9SU0chsoqaiZKjrp8hpe3K4BKtE5dQ5QrN1EWNKes0o3jzI1p7Q3fEMZ/9D4bHec= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770306246; c=relaxed/simple; bh=+fWCDknhNcyAfl0L6h7iW0/iLxaqFgE0u/8YubZwQGw=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=KHwgNyYI4ShDu8eCv9P+5WskPYnUxXJ7cVvnAzD9tjLNPPTRBFkE+P69I0RnnK0HJiuqeiAlXh7dpCCrseOTxCm2g0xblHd7taleegXKRSnZz56G0fOdbPnKvrQDL9ewohnz6AZff2+htieKm/DXFu4UMZADc1sJycCbb3zd8L8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=redhat.com; spf=pass smtp.mailfrom=redhat.com; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b=Q3/052hY; arc=none smtp.client-ip=170.10.133.124 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=redhat.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=redhat.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="Q3/052hY" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1770306245; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=gx/aDrZcZXnVX7vlg1sIDkqJnzGEYa0QLLZg8IYNH7c=; b=Q3/052hY8jy7tj99g3w+qLxzERRvScLFBLYuIr8if1V89EQj7MiKyWYixyW6gX8GYJzBJ/ Pz2tOmKhjmWC/z5RuGVW2ThcCOwSk8noQ8qzvAcQKB9F0n2QsQNPSgguVdHLWj8mChomyo Ou8patjW4EgyB6TDERqNGFw9KD/JMto= Received: from mx-prod-mc-05.mail-002.prod.us-west-2.aws.redhat.com (ec2-54-186-198-63.us-west-2.compute.amazonaws.com [54.186.198.63]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-412-6JNKmIVrPz2_Ll8Qm_NGDQ-1; Thu, 05 Feb 2026 10:43:59 -0500 X-MC-Unique: 6JNKmIVrPz2_Ll8Qm_NGDQ-1 X-Mimecast-MFC-AGG-ID: 6JNKmIVrPz2_Ll8Qm_NGDQ_1770306238 Received: from mx-prod-int-08.mail-002.prod.us-west-2.aws.redhat.com (mx-prod-int-08.mail-002.prod.us-west-2.aws.redhat.com [10.30.177.111]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mx-prod-mc-05.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTPS id BF0A61955DC2; Thu, 5 Feb 2026 15:43:57 +0000 (UTC) Received: from cnb-01.lab.eng.brq2.redhat.com (cnb-01.lab.eng.brq2.redhat.com [10.37.129.36]) by mx-prod-int-08.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTP id E647B18003F6; Thu, 5 Feb 2026 15:43:55 +0000 (UTC) From: Ivan Vecera To: netdev@vger.kernel.org Cc: Prathosh Satish , Vadim Fedorenko , Arkadiusz Kubalewski , Jiri Pirko , linux-kernel@vger.kernel.org Subject: [PATCH net-next 1/2] dpll: zl3073x: Add output pin frequency helper Date: Thu, 5 Feb 2026 16:43:49 +0100 Message-ID: <20260205154350.3180465-2-ivecera@redhat.com> In-Reply-To: <20260205154350.3180465-1-ivecera@redhat.com> References: <20260205154350.3180465-1-ivecera@redhat.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.111 Content-Type: text/plain; charset="utf-8" Introduce zl3073x_dev_output_pin_freq_get() helper function to compute the output pin frequency based on synthesizer frequency, output divisor, and signal format. For N-div signal formats, the N-pin frequency is additionally divided by esync_n_period. Add zl3073x_out_is_ndiv() helper to check if an output is configured in N-div mode (2_NDIV or 2_NDIV_INV signal formats). Refactor zl3073x_dpll_output_pin_frequency_get() callback to use the new helper, reducing code duplication and enabling reuse of the frequency calculation logic in other contexts. This is a preparatory change for adding current frequency to the supported frequencies list in pin properties. Signed-off-by: Ivan Vecera --- drivers/dpll/zl3073x/core.h | 30 ++++++++++++++++++++++++++++ drivers/dpll/zl3073x/dpll.c | 39 +------------------------------------ drivers/dpll/zl3073x/out.h | 17 ++++++++++++++++ 3 files changed, 48 insertions(+), 38 deletions(-) diff --git a/drivers/dpll/zl3073x/core.h b/drivers/dpll/zl3073x/core.h index 09bca2d0926d..dddfcacea5c0 100644 --- a/drivers/dpll/zl3073x/core.h +++ b/drivers/dpll/zl3073x/core.h @@ -301,6 +301,36 @@ u8 zl3073x_dev_out_dpll_get(struct zl3073x_dev *zldev,= u8 index) return zl3073x_synth_dpll_get(synth); } =20 +/** + * zl3073x_dev_output_pin_freq_get - get output pin frequency + * @zldev: pointer to zl3073x device + * @id: output pin id + * + * Computes the output pin frequency based on the synth frequency, output + * divisor, and signal format. For N-div formats, N-pin frequency is + * additionally divided by esync_n_period. + * + * Return: frequency of the given output pin in Hz + */ +static inline u32 +zl3073x_dev_output_pin_freq_get(struct zl3073x_dev *zldev, u8 id) +{ + const struct zl3073x_synth *synth; + const struct zl3073x_out *out; + u8 out_id; + u32 freq; + + out_id =3D zl3073x_output_pin_out_get(id); + out =3D zl3073x_out_state_get(zldev, out_id); + synth =3D zl3073x_synth_state_get(zldev, zl3073x_out_synth_get(out)); + freq =3D zl3073x_synth_freq_get(synth) / out->div; + + if (zl3073x_out_is_ndiv(out) && zl3073x_is_n_pin(id)) + freq /=3D out->esync_n_period; + + return freq; +} + /** * zl3073x_dev_out_is_diff - check if the given output is differential * @zldev: pointer to zl3073x device diff --git a/drivers/dpll/zl3073x/dpll.c b/drivers/dpll/zl3073x/dpll.c index 7d8ed948b970..7301b4b1edde 100644 --- a/drivers/dpll/zl3073x/dpll.c +++ b/drivers/dpll/zl3073x/dpll.c @@ -914,46 +914,9 @@ zl3073x_dpll_output_pin_frequency_get(const struct dpl= l_pin *dpll_pin, struct netlink_ext_ack *extack) { struct zl3073x_dpll *zldpll =3D dpll_priv; - struct zl3073x_dev *zldev =3D zldpll->dev; struct zl3073x_dpll_pin *pin =3D pin_priv; - const struct zl3073x_synth *synth; - const struct zl3073x_out *out; - u32 synth_freq; - u8 out_id; =20 - out_id =3D zl3073x_output_pin_out_get(pin->id); - out =3D zl3073x_out_state_get(zldev, out_id); - - /* Get attached synth frequency */ - synth =3D zl3073x_synth_state_get(zldev, zl3073x_out_synth_get(out)); - synth_freq =3D zl3073x_synth_freq_get(synth); - - switch (zl3073x_out_signal_format_get(out)) { - case ZL_OUTPUT_MODE_SIGNAL_FORMAT_2_NDIV: - case ZL_OUTPUT_MODE_SIGNAL_FORMAT_2_NDIV_INV: - /* In case of divided format we have to distiguish between - * given output pin type. - * - * For P-pin the resulting frequency is computed as simple - * division of synth frequency and output divisor. - * - * For N-pin we have to divide additionally by divisor stored - * in esync_n_period output mailbox register that is used as - * N-pin divisor for these modes. - */ - *frequency =3D synth_freq / out->div; - - if (!zl3073x_dpll_is_p_pin(pin)) - *frequency =3D (u32)*frequency / out->esync_n_period; - - break; - default: - /* In other modes the resulting frequency is computed as - * division of synth frequency and output divisor. - */ - *frequency =3D synth_freq / out->div; - break; - } + *frequency =3D zl3073x_dev_output_pin_freq_get(zldpll->dev, pin->id); =20 return 0; } diff --git a/drivers/dpll/zl3073x/out.h b/drivers/dpll/zl3073x/out.h index e8ea7a0e0f07..318f9bb8da3a 100644 --- a/drivers/dpll/zl3073x/out.h +++ b/drivers/dpll/zl3073x/out.h @@ -79,6 +79,23 @@ static inline bool zl3073x_out_is_enabled(const struct z= l3073x_out *out) return !!FIELD_GET(ZL_OUTPUT_CTRL_EN, out->ctrl); } =20 +/** + * zl3073x_out_is_ndiv - check if the given output is in N-div mode + * @out: pointer to out state + * + * Return: true if output is in N-div mode, false otherwise + */ +static inline bool zl3073x_out_is_ndiv(const struct zl3073x_out *out) +{ + switch (zl3073x_out_signal_format_get(out)) { + case ZL_OUTPUT_MODE_SIGNAL_FORMAT_2_NDIV: + case ZL_OUTPUT_MODE_SIGNAL_FORMAT_2_NDIV_INV: + return true; + default: + return false; + } +} + /** * zl3073x_out_synth_get - get synth connected to given output * @out: pointer to out state --=20 2.52.0 From nobody Sun Feb 8 02:55:55 2026 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.133.124]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D8EDF423A8A for ; Thu, 5 Feb 2026 15:44:10 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=170.10.133.124 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770306251; cv=none; b=eTtl3Enpp/Uk8DJQZiY+MQrsKbAfQW1WEGTo1ZwO2IYmCjSI6wDd1gQ3nmYifJR/I1HwE9HwQ0KZwx1xMJUPs5UdrwnYSiOrjyuRnd4cFAK43fLYmirsnD5g6igLXohHeLUV3X2TLGarjKTXOyZM36qPzaWJ8uJL9EZmTWKOlus= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770306251; c=relaxed/simple; bh=beJbh9Q51hftX3sFzrLlw65qA1wbptRaJa7R+UbWVuU=; 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Thu, 5 Feb 2026 15:44:00 +0000 (UTC) Received: from cnb-01.lab.eng.brq2.redhat.com (cnb-01.lab.eng.brq2.redhat.com [10.37.129.36]) by mx-prod-int-08.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTP id 282F018003F6; Thu, 5 Feb 2026 15:43:57 +0000 (UTC) From: Ivan Vecera To: netdev@vger.kernel.org Cc: Prathosh Satish , Vadim Fedorenko , Arkadiusz Kubalewski , Jiri Pirko , linux-kernel@vger.kernel.org Subject: [PATCH net-next 2/2] dpll: zl3073x: Include current frequency in supported frequencies list Date: Thu, 5 Feb 2026 16:43:50 +0100 Message-ID: <20260205154350.3180465-3-ivecera@redhat.com> In-Reply-To: <20260205154350.3180465-1-ivecera@redhat.com> References: <20260205154350.3180465-1-ivecera@redhat.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.111 Content-Type: text/plain; charset="utf-8" Ensure the current pin frequency is always present in the list of supported frequencies reported to userspace. Previously, if the firmware node was missing or didn't include the current operating frequency in the supported-frequencies-hz property, the pin would report a frequency that wasn't in its supported list. Get the current frequency early in zl3073x_pin_props_get(): - For input pins: use zl3073x_dev_ref_freq_get() - For output pins: use zl3073x_dev_output_pin_freq_get() Place the current frequency at index 0 of the supported frequencies array, then append frequencies from the firmware node (if present), skipping any duplicate of the current frequency. Signed-off-by: Ivan Vecera --- drivers/dpll/zl3073x/prop.c | 32 +++++++++++++++++++++----------- 1 file changed, 21 insertions(+), 11 deletions(-) diff --git a/drivers/dpll/zl3073x/prop.c b/drivers/dpll/zl3073x/prop.c index 4ed153087570..51748b0e523b 100644 --- a/drivers/dpll/zl3073x/prop.c +++ b/drivers/dpll/zl3073x/prop.c @@ -193,9 +193,10 @@ struct zl3073x_pin_props *zl3073x_pin_props_get(struct= zl3073x_dev *zldev, { struct dpll_pin_frequency *ranges; struct zl3073x_pin_props *props; - int i, j, num_freqs, rc; + int i, j, num_freqs =3D 0, rc; + u64 *freqs =3D NULL; const char *type; - u64 *freqs; + u32 curr_freq; =20 props =3D kzalloc(sizeof(*props), GFP_KERNEL); if (!props) @@ -207,6 +208,7 @@ struct zl3073x_pin_props *zl3073x_pin_props_get(struct = zl3073x_dev *zldev, props->dpll_props.capabilities =3D DPLL_PIN_CAPABILITIES_PRIORITY_CAN_CHANGE | DPLL_PIN_CAPABILITIES_STATE_CAN_CHANGE; + curr_freq =3D zl3073x_dev_ref_freq_get(zldev, index); } else { u8 out, synth; u32 f; @@ -220,6 +222,7 @@ struct zl3073x_pin_props *zl3073x_pin_props_get(struct = zl3073x_dev *zldev, synth =3D zl3073x_dev_out_synth_get(zldev, out); f =3D 2 * zl3073x_dev_synth_freq_get(zldev, synth); props->dpll_props.phase_gran =3D f ? div_u64(PSEC_PER_SEC, f) : 1; + curr_freq =3D zl3073x_dev_output_pin_freq_get(zldev, index); } =20 props->dpll_props.phase_range.min =3D S32_MIN; @@ -230,7 +233,7 @@ struct zl3073x_pin_props *zl3073x_pin_props_get(struct = zl3073x_dev *zldev, /* Get firmware node for the given pin */ rc =3D zl3073x_prop_pin_fwnode_get(zldev, props, dir, index); if (rc) - return props; /* Return if it does not exist */ + goto skip_fwnode_props; =20 /* Look for label property and store the value as board label */ fwnode_property_read_string(props->fwnode, "label", @@ -262,9 +265,10 @@ struct zl3073x_pin_props *zl3073x_pin_props_get(struct= zl3073x_dev *zldev, /* Read supported frequencies property if it is specified */ num_freqs =3D fwnode_property_count_u64(props->fwnode, "supported-frequencies-hz"); - if (num_freqs <=3D 0) - /* Return if the property does not exist or number is 0 */ - return props; + if (num_freqs <=3D 0) { + num_freqs =3D 0; + goto skip_fwnode_props; + } =20 /* The firmware node specifies list of supported frequencies while * DPLL core pin properties requires list of frequency ranges. @@ -281,19 +285,25 @@ struct zl3073x_pin_props *zl3073x_pin_props_get(struc= t zl3073x_dev *zldev, "supported-frequencies-hz", freqs, num_freqs); =20 - /* Allocate frequency ranges list and fill it */ - ranges =3D kcalloc(num_freqs, sizeof(*ranges), GFP_KERNEL); +skip_fwnode_props: + /* Allocate frequency ranges list - extra slot for current frequency */ + ranges =3D kcalloc(num_freqs + 1, sizeof(*ranges), GFP_KERNEL); if (!ranges) { rc =3D -ENOMEM; goto err_alloc_ranges; } =20 - /* Convert list of frequencies to list of frequency ranges but - * filter-out frequencies that are not representable by device + /* Start with current frequency at index 0 */ + ranges[0] =3D (struct dpll_pin_frequency)DPLL_PIN_FREQUENCY(curr_freq); + + /* Add frequencies from firmware node, skipping current frequency + * and filtering out frequencies not representable by device */ - for (i =3D 0, j =3D 0; i < num_freqs; i++) { + for (i =3D 0, j =3D 1; i < num_freqs; i++) { struct dpll_pin_frequency freq =3D DPLL_PIN_FREQUENCY(freqs[i]); =20 + if (freqs[i] =3D=3D curr_freq) + continue; if (zl3073x_pin_check_freq(zldev, dir, index, freqs[i])) { ranges[j] =3D freq; j++; --=20 2.52.0