From nobody Sat Feb 7 15:10:59 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 43BA03A7F4F; Thu, 5 Feb 2026 10:09:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.17 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770286179; cv=none; b=IHxPRk5WvnGhH4imMvZIpmSd7DdPg3UyogBj5X7LW6bZp8IBXrhdf+KpTxjTRSplC5jWkwYhVpT4MFk/Cv8Cs+FulSOYmsGssU9Xiu8BtHgDr548XNXhEB+mQk2nrNpPaN7UWd2HBYaInkcqW2M6CQr7vTm3NmmBZmanX1pbWF0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770286179; c=relaxed/simple; bh=8THRXBi85fbzXkk7iqY16ie3SHmpU5RsoRpOmh5p5eo=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=tSOLVYL6uG6wZi4MctTW8cE15hYEpezhQhA14RWLr5mfu35Ce5iKjso6OpyvAcnZrYTkJLKDf5ThD1l9/uQNTc7GY1L5ZK24v540v4bemTiQ7eSL+plKdAcStDD4sGKfpUeu7DFKyQuHhW8BZvRKlRDqI4Fh9ZmkDNvkf+WouEQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=YkHjfAWU; arc=none smtp.client-ip=198.175.65.17 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="YkHjfAWU" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1770286178; x=1801822178; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=8THRXBi85fbzXkk7iqY16ie3SHmpU5RsoRpOmh5p5eo=; b=YkHjfAWU1uDRc2eBEh7jMHieBSeKVGjZHiwuPR5e7xjwkS31tozvLDS+ 6/RsGkUfqcnm2h2syU9J5G39UE2pXhRmXkoiKKMtMSxFylZNNklMNfQ1x n3aTTxjEOavnD1PFaYBg5w8KICb2nlCltrN11Q9DznH8rsTTPL/9AFc6M 4aBVzY0Ie4XudvOzCRTTEnmbqaQPvxGsD5lRGvOV1QhepcqshlIdGMBAK kr8Lh6MQZHTVsovDxkFjdzHH6oS9aZLBK0nru0rbmJwbSp1+OexYxSfs+ 5OyArGWkk39uB3Jwjwwd4v998/50Byqda4U/lYfZ+gVjywoygJHQYbB9r A==; X-CSE-ConnectionGUID: Iwd6GIBSTMeM3EcPbg1QPQ== X-CSE-MsgGUID: TD4qF0ukTaa5UhKJpiEXHA== X-IronPort-AV: E=McAfee;i="6800,10657,11691"; a="71471728" X-IronPort-AV: E=Sophos;i="6.21,274,1763452800"; d="scan'208";a="71471728" Received: from orviesa003.jf.intel.com ([10.64.159.143]) by orvoesa109.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 Feb 2026 02:09:37 -0800 X-CSE-ConnectionGUID: zo9u6nJmSFeGqzEsIH/wEQ== X-CSE-MsgGUID: baG2yiM2TAaCnj/kTQwxVA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.21,274,1763452800"; d="scan'208";a="214631183" Received: from smoticic-mobl1.ger.corp.intel.com (HELO ahunter6-desk) ([10.245.244.58]) by ORVIESA003-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 Feb 2026 02:09:35 -0800 From: Adrian Hunter To: alexandre.belloni@bootlin.com Cc: Frank.Li@nxp.com, rafael@kernel.org, linux-i3c@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org Subject: [PATCH V3 5/5] i3c: mipi-i3c-hci-pci: Enable IBI while runtime suspended for Intel controllers Date: Thu, 5 Feb 2026 12:09:15 +0200 Message-ID: <20260205100915.19792-6-adrian.hunter@intel.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260205100915.19792-1-adrian.hunter@intel.com> References: <20260205100915.19792-1-adrian.hunter@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Organization: Intel Finland Oy, Registered Address: c/o Alberga Business Park, 6 krs, Bertel Jungin Aukio 5, 02600 Espoo, Business Identity Code: 0357606 - 4, Domiciled in Helsinki Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Intel LPSS I3C controllers can wake from runtime suspend to receive in-band interrupts (IBIs), and they also implement the MIPI I3C HCI Multi-Bus Instance capability. When multiple I3C bus instances share the same PCI wakeup, the PCI parent must coordinate runtime PM so that all instances suspend together and their mipi-i3c-hci runtime suspend callbacks are invoked in a consistent manner. Enable IBI-based wakeup by setting HCI_QUIRK_RPM_IBI_ALLOWED for the intel-lpss-i3c platform device. Also set HCI_QUIRK_RPM_PARENT_MANAGED so that the mipi-i3c-hci core driver expects runtime PM to be controlled by the PCI parent rather than by individual instances. For all Intel HCI PCI configurations, enable the corresponding control_instance_pm flag in the PCI driver. Signed-off-by: Adrian Hunter Reviewed-by: Frank Li --- Changes in V3: Add Frank's Rev'd-by Changes in V2: Retain HCI_QUIRK_RPM_ALLOWED Amend commit message accordingly drivers/i3c/master/mipi-i3c-hci/core.c | 4 +++- drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c | 3 +++ 2 files changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/i3c/master/mipi-i3c-hci/core.c b/drivers/i3c/master/mi= pi-i3c-hci/core.c index 149b3fad34b5..d19be1d276b5 100644 --- a/drivers/i3c/master/mipi-i3c-hci/core.c +++ b/drivers/i3c/master/mipi-i3c-hci/core.c @@ -1005,7 +1005,9 @@ static const struct acpi_device_id i3c_hci_acpi_match= [] =3D { MODULE_DEVICE_TABLE(acpi, i3c_hci_acpi_match); =20 static const struct platform_device_id i3c_hci_driver_ids[] =3D { - { .name =3D "intel-lpss-i3c", HCI_QUIRK_RPM_ALLOWED }, + { .name =3D "intel-lpss-i3c", HCI_QUIRK_RPM_ALLOWED | + HCI_QUIRK_RPM_IBI_ALLOWED | + HCI_QUIRK_RPM_PARENT_MANAGED }, { /* sentinel */ } }; MODULE_DEVICE_TABLE(platform, i3c_hci_driver_ids); diff --git a/drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c b/drivers/i= 3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c index ed0efed17726..54a2176ca79d 100644 --- a/drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c +++ b/drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c @@ -200,6 +200,7 @@ static const struct mipi_i3c_hci_pci_info intel_mi_1_in= fo =3D { .id =3D {0, 1}, .instance_offset =3D {0, 0x400}, .instance_count =3D 2, + .control_instance_pm =3D true, }; =20 static const struct mipi_i3c_hci_pci_info intel_mi_2_info =3D { @@ -209,6 +210,7 @@ static const struct mipi_i3c_hci_pci_info intel_mi_2_in= fo =3D { .id =3D {2, 3}, .instance_offset =3D {0, 0x400}, .instance_count =3D 2, + .control_instance_pm =3D true, }; =20 static const struct mipi_i3c_hci_pci_info intel_si_2_info =3D { @@ -218,6 +220,7 @@ static const struct mipi_i3c_hci_pci_info intel_si_2_in= fo =3D { .id =3D {2}, .instance_offset =3D {0}, .instance_count =3D 1, + .control_instance_pm =3D true, }; =20 static int mipi_i3c_hci_pci_find_instance(struct mipi_i3c_hci_pci *hci, st= ruct device *dev) --=20 2.51.0