From nobody Mon Feb 9 01:21:17 2026 Received: from TWMBX01.aspeed.com (mail.aspeedtech.com [211.20.114.72]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9D90C3346BD; Thu, 5 Feb 2026 06:07:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=211.20.114.72 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770271662; cv=none; b=qJlpxdJzjhUtuxgm7hKTYQXFSr1rWUzvQmr/C7F7wxGMb21yqxjR12ChnA3ZnZ2HelJ5v3sR8KmaY32dR/hhU3gkGod7nJMCgFEW4ym4s4U8Z8S9Nl1VuDqpz1izv7sRp6zMqjhcAbQz8DoMPQL9L8DzbJHbBgmi0XC3SFSP1ss= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770271662; c=relaxed/simple; bh=/czyJlFUz+m3+HZmKZTbaU3DI1sOmd48ORlq8dtx26A=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=uYmXEM0DrW/LUB7vWINQxGvsOuDlH7/o2CKiFemljVUuI7PCQsr729UrXPAdSptAoPG3rllydO9vjgHvbM5e7fkPVX7fSd2fO8rWMPxLnGcTRQGxYH4jCcT8hso3aALI6gHGT+CAaN8WyFNPs+Bt1MybXj1nL6h+rD3i3NC7av4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=aspeedtech.com; spf=pass smtp.mailfrom=aspeedtech.com; arc=none smtp.client-ip=211.20.114.72 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=aspeedtech.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=aspeedtech.com Received: from TWMBX01.aspeed.com (192.168.0.62) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1748.10; Thu, 5 Feb 2026 14:07:30 +0800 Received: from [127.0.1.1] (192.168.10.13) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server id 15.2.1748.10 via Frontend Transport; Thu, 5 Feb 2026 14:07:30 +0800 From: Ryan Chen Date: Thu, 5 Feb 2026 14:07:21 +0800 Subject: [PATCH 3/4] irqchip/aspeed: Remove legacy AST2700 interrupt controller driver Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20260205-irqchip-v1-3-b0310e06c087@aspeedtech.com> References: <20260205-irqchip-v1-0-b0310e06c087@aspeedtech.com> In-Reply-To: <20260205-irqchip-v1-0-b0310e06c087@aspeedtech.com> To: Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Joel Stanley , Andrew Jeffery , Paul Walmsley , Palmer Dabbelt , "Albert Ou" , Alexandre Ghiti CC: , , , , , Ryan Chen X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1770271649; l=5554; i=ryan_chen@aspeedtech.com; s=20251126; h=from:subject:message-id; bh=/czyJlFUz+m3+HZmKZTbaU3DI1sOmd48ORlq8dtx26A=; b=aJadvqQVyHVtwWconhPq6ddtSwD01LZGhovAH0kIteVf2af1Re1ccgCw1Uthb3ijsZLlSwz/9 NHRDXaSH5MFC+wATQXcP5WsnF0d3X5f8qH93gCvuMs672x0nTSo6NcY X-Developer-Key: i=ryan_chen@aspeedtech.com; a=ed25519; pk=Xe73xY6tcnkuRjjbVAB/oU30KdB3FvG4nuJuILj7ZVc= The legacy driver was designed around a PSP-centric interrupt model and cannot describe the full routing and protection capabilities of the AST2700 interrupt architecture. This driver is superseded by the new AST2700 INTC0/INTC1 drivers, which provide a unified, block-level description suitable for all integrated processors. There are no known upstream users of the legacy aspeed,ast2700-intc-ic compatible. Signed-off-by: Ryan Chen --- drivers/irqchip/Makefile | 1 - drivers/irqchip/irq-aspeed-intc.c | 139 ----------------------------------= ---- 2 files changed, 140 deletions(-) diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile index 51fdf269e436..ed547e90ae89 100644 --- a/drivers/irqchip/Makefile +++ b/drivers/irqchip/Makefile @@ -90,7 +90,6 @@ obj-$(CONFIG_LS_EXTIRQ) +=3D irq-ls-extirq.o obj-$(CONFIG_LS_SCFG_MSI) +=3D irq-ls-scfg-msi.o obj-$(CONFIG_ASPEED_AST2700_INTC) +=3D irq-ast2700.o irq-ast2700-intc0.o i= rq-ast2700-intc1.o obj-$(CONFIG_ARCH_ASPEED) +=3D irq-aspeed-vic.o irq-aspeed-i2c-ic.o irq-a= speed-scu-ic.o -obj-$(CONFIG_ARCH_ASPEED) +=3D irq-aspeed-intc.o obj-$(CONFIG_STM32MP_EXTI) +=3D irq-stm32mp-exti.o obj-$(CONFIG_STM32_EXTI) +=3D irq-stm32-exti.o obj-$(CONFIG_QCOM_IRQ_COMBINER) +=3D qcom-irq-combiner.o diff --git a/drivers/irqchip/irq-aspeed-intc.c b/drivers/irqchip/irq-aspeed= -intc.c deleted file mode 100644 index 8330221799a0..000000000000 --- a/drivers/irqchip/irq-aspeed-intc.c +++ /dev/null @@ -1,139 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Aspeed Interrupt Controller. - * - * Copyright (C) 2023 ASPEED Technology Inc. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#define INTC_INT_ENABLE_REG 0x00 -#define INTC_INT_STATUS_REG 0x04 -#define INTC_IRQS_PER_WORD 32 - -struct aspeed_intc_ic { - void __iomem *base; - raw_spinlock_t gic_lock; - raw_spinlock_t intc_lock; - struct irq_domain *irq_domain; -}; - -static void aspeed_intc_ic_irq_handler(struct irq_desc *desc) -{ - struct aspeed_intc_ic *intc_ic =3D irq_desc_get_handler_data(desc); - struct irq_chip *chip =3D irq_desc_get_chip(desc); - - chained_irq_enter(chip, desc); - - scoped_guard(raw_spinlock, &intc_ic->gic_lock) { - unsigned long bit, status; - - status =3D readl(intc_ic->base + INTC_INT_STATUS_REG); - for_each_set_bit(bit, &status, INTC_IRQS_PER_WORD) { - generic_handle_domain_irq(intc_ic->irq_domain, bit); - writel(BIT(bit), intc_ic->base + INTC_INT_STATUS_REG); - } - } - - chained_irq_exit(chip, desc); -} - -static void aspeed_intc_irq_mask(struct irq_data *data) -{ - struct aspeed_intc_ic *intc_ic =3D irq_data_get_irq_chip_data(data); - unsigned int mask =3D readl(intc_ic->base + INTC_INT_ENABLE_REG) & ~BIT(d= ata->hwirq); - - guard(raw_spinlock)(&intc_ic->intc_lock); - writel(mask, intc_ic->base + INTC_INT_ENABLE_REG); -} - -static void aspeed_intc_irq_unmask(struct irq_data *data) -{ - struct aspeed_intc_ic *intc_ic =3D irq_data_get_irq_chip_data(data); - unsigned int unmask =3D readl(intc_ic->base + INTC_INT_ENABLE_REG) | BIT(= data->hwirq); - - guard(raw_spinlock)(&intc_ic->intc_lock); - writel(unmask, intc_ic->base + INTC_INT_ENABLE_REG); -} - -static struct irq_chip aspeed_intc_chip =3D { - .name =3D "ASPEED INTC", - .irq_mask =3D aspeed_intc_irq_mask, - .irq_unmask =3D aspeed_intc_irq_unmask, -}; - -static int aspeed_intc_ic_map_irq_domain(struct irq_domain *domain, unsign= ed int irq, - irq_hw_number_t hwirq) -{ - irq_set_chip_and_handler(irq, &aspeed_intc_chip, handle_level_irq); - irq_set_chip_data(irq, domain->host_data); - - return 0; -} - -static const struct irq_domain_ops aspeed_intc_ic_irq_domain_ops =3D { - .map =3D aspeed_intc_ic_map_irq_domain, -}; - -static int __init aspeed_intc_ic_of_init(struct device_node *node, - struct device_node *parent) -{ - struct aspeed_intc_ic *intc_ic; - int irq, i, ret =3D 0; - - intc_ic =3D kzalloc(sizeof(*intc_ic), GFP_KERNEL); - if (!intc_ic) - return -ENOMEM; - - intc_ic->base =3D of_iomap(node, 0); - if (!intc_ic->base) { - pr_err("Failed to iomap intc_ic base\n"); - ret =3D -ENOMEM; - goto err_free_ic; - } - writel(0xffffffff, intc_ic->base + INTC_INT_STATUS_REG); - writel(0x0, intc_ic->base + INTC_INT_ENABLE_REG); - - intc_ic->irq_domain =3D irq_domain_create_linear(of_fwnode_handle(node), = INTC_IRQS_PER_WORD, - &aspeed_intc_ic_irq_domain_ops, intc_ic); - if (!intc_ic->irq_domain) { - ret =3D -ENOMEM; - goto err_iounmap; - } - - raw_spin_lock_init(&intc_ic->gic_lock); - raw_spin_lock_init(&intc_ic->intc_lock); - - /* Check all the irq numbers valid. If not, unmaps all the base and frees= the data. */ - for (i =3D 0; i < of_irq_count(node); i++) { - irq =3D irq_of_parse_and_map(node, i); - if (!irq) { - pr_err("Failed to get irq number\n"); - ret =3D -EINVAL; - goto err_iounmap; - } - } - - for (i =3D 0; i < of_irq_count(node); i++) { - irq =3D irq_of_parse_and_map(node, i); - irq_set_chained_handler_and_data(irq, aspeed_intc_ic_irq_handler, intc_i= c); - } - - return 0; - -err_iounmap: - iounmap(intc_ic->base); -err_free_ic: - kfree(intc_ic); - return ret; -} - -IRQCHIP_DECLARE(ast2700_intc_ic, "aspeed,ast2700-intc-ic", aspeed_intc_ic_= of_init); --=20 2.34.1