From nobody Mon Feb 9 16:18:28 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 532403346AB; Thu, 5 Feb 2026 06:04:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770271446; cv=none; b=RsLc/IWRkVYhAitKmaM6p8eD4hu7lOzAKAh2l2TRONAU2FFxdztNe80Mq9Z8Ndg5kqo3y6oUE6KKcOGbkp813fFxm8IEXuLPlr+NuDaM16jCUR+1rQB9RKez67k1uB5QNJzv14XIJFnQKRVe3DnGImwjYO0TcFuXrNxFWWge3TU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770271446; c=relaxed/simple; bh=bALSOoddiL5w8oFGgff93Z4RVCpo79tvO8FM1Vpr8Io=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=F0Fdp+zij3KudSlfVWMckxPHndsJ5oukSw3yuVbT7XtV2f/OSHaXlEt/t+cwOIzDrD0EM48Kq7ltdRTYkOFuplZNBBGKL4nYaTE5Yksv04RyxUf8Obu0MeAiuW4FP2hqsgi8J18QAhUIEXLcjP7ICCNYS2gP1QN/dYjhnu/Y9ss= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=uGzP40zQ; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="uGzP40zQ" Received: by smtp.kernel.org (Postfix) with ESMTPS id 18BD6C116D0; Thu, 5 Feb 2026 06:04:06 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1770271446; bh=bALSOoddiL5w8oFGgff93Z4RVCpo79tvO8FM1Vpr8Io=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=uGzP40zQe1nh/3wGqqOU1BLeUpMxIQcqbvTMtABt6+zxra/h4dg0vIjy4kDpVPglE GfjkMDgrXNv0KjgJadaoJg0YHWzoNthlHnjFkeJj5HmM2EKGczSh06VUtQQilGZ5GV WsMGRd8M17yJrdz6/4aiYCa9WZSBx8xs2FB/fyX8tE2qZEyJi5e2rZLA2KLSnvt2vD NUNxJz9zuLV8SVpnvrLMnSuG33zi1F8bj+5a57OrlwxkXeoKfcqBRI/aadezomlVq1 CZFoNwLFP9e4Z6C70/wXREe3QyUaDcNYb3woTKLuhU9kIWRz1wIIV6zXrKe22DGHRx AOQUaSLHmffVw== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0DF8DE91266; Thu, 5 Feb 2026 06:04:06 +0000 (UTC) From: Xianwei Zhao via B4 Relay Date: Thu, 05 Feb 2026 06:04:04 +0000 Subject: [PATCH 3/3] arm64: dts: add support for A9 based Amlogic BY401 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260205-a9-baisc-dts-v1-3-1212b46f95a7@amlogic.com> References: <20260205-a9-baisc-dts-v1-0-1212b46f95a7@amlogic.com> In-Reply-To: <20260205-a9-baisc-dts-v1-0-1212b46f95a7@amlogic.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong , Martin Blumenstingl , Jerome Brunet , Kevin Hilman , Greg Kroah-Hartman , Jiri Slaby Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, Xianwei Zhao X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1770271444; l=5459; i=xianwei.zhao@amlogic.com; s=20251216; h=from:subject:message-id; bh=JhCz1Y1IOz9OdVW/Aed/kqLeeuwkxIYlT4hUhJxOrwE=; b=vZedrmy9syLNJKmc0Xin1CXTe/3bxIiCASzGl8eNYkKugQc3R1LsyEAd91Vv3tk2UY9Ju9HXF 3opi9rMOVdzC0xZl8o45oKJG0iqGWRX5AMUFXsQPseT6ERkhiWDac5X X-Developer-Key: i=xianwei.zhao@amlogic.com; a=ed25519; pk=dWwxtWCxC6FHRurOmxEtr34SuBYU+WJowV/ZmRJ7H+k= X-Endpoint-Received: by B4 Relay for xianwei.zhao@amlogic.com/20251216 with auth_id=578 X-Original-From: Xianwei Zhao Reply-To: xianwei.zhao@amlogic.com From: Xianwei Zhao Add basic support for the A9 based Amlogic BY401 board, which describes the following components: CPU, GIC, IRQ, Timer and UART. These are capable of booting up into the serial console. Signed-off-by: Xianwei Zhao --- arch/arm64/boot/dts/amlogic/Makefile | 1 + .../boot/dts/amlogic/amlogic-a9-a311y3-by401.dts | 41 +++++++ arch/arm64/boot/dts/amlogic/amlogic-a9.dtsi | 127 +++++++++++++++++= ++++ 3 files changed, 169 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/aml= ogic/Makefile index 15f9c817e502..57bc440fa55c 100644 --- a/arch/arm64/boot/dts/amlogic/Makefile +++ b/arch/arm64/boot/dts/amlogic/Makefile @@ -1,6 +1,7 @@ # SPDX-License-Identifier: GPL-2.0 dtb-$(CONFIG_ARCH_MESON) +=3D amlogic-a4-a113l2-ba400.dtb dtb-$(CONFIG_ARCH_MESON) +=3D amlogic-a5-a113x2-av400.dtb +dtb-$(CONFIG_ARCH_MESON) +=3D amlogic-a9-a311y3-by401.dtb dtb-$(CONFIG_ARCH_MESON) +=3D amlogic-c3-c302x-aw409.dtb dtb-$(CONFIG_ARCH_MESON) +=3D amlogic-c3-c308l-aw419.dtb dtb-$(CONFIG_ARCH_MESON) +=3D amlogic-s6-s905x5-bl209.dtb diff --git a/arch/arm64/boot/dts/amlogic/amlogic-a9-a311y3-by401.dts b/arch= /arm64/boot/dts/amlogic/amlogic-a9-a311y3-by401.dts new file mode 100644 index 000000000000..ad35a3292d49 --- /dev/null +++ b/arch/arm64/boot/dts/amlogic/amlogic-a9-a311y3-by401.dts @@ -0,0 +1,41 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2026 Amlogic, Inc. All rights reserved. + */ + +/dts-v1/; + +#include "amlogic-a9.dtsi" +/ { + model =3D "Amlogic A311DY3 BY401 Development Board"; + compatible =3D "amlogic,by401", "amlogic,a9"; + interrupt-parent =3D <&gic>; + #address-cells =3D <2>; + #size-cells =3D <2>; + + aliases { + serial0 =3D &uart_b; + }; + + memory@0 { + device_type =3D "memory"; + reg =3D <0x0 0x0 0x0 0x80000000>; + }; + + reserved-memory { + #address-cells =3D <2>; + #size-cells =3D <2>; + ranges; + + /* 35 MiB reserved for ARM Trusted Firmware */ + secmon_reserved: secmon@5000000 { + compatible =3D "shared-dma-pool"; + reg =3D <0x0 0x05000000 0x0 0x2300000>; + no-map; + }; + }; +}; + +&uart_b { + status =3D "okay"; +}; diff --git a/arch/arm64/boot/dts/amlogic/amlogic-a9.dtsi b/arch/arm64/boot/= dts/amlogic/amlogic-a9.dtsi new file mode 100644 index 000000000000..a3744547edde --- /dev/null +++ b/arch/arm64/boot/dts/amlogic/amlogic-a9.dtsi @@ -0,0 +1,127 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2026 Amlogic, Inc. All rights reserved. + */ + +#include +#include +#include + +/ { + cpus { + #address-cells =3D <2>; + #size-cells =3D <0>; + + cpu0: cpu@0 { + device_type =3D "cpu"; + compatible =3D "arm,cortex-a55"; + reg =3D <0x0 0x0>; + enable-method =3D "psci"; + }; + + cpu1: cpu@100 { + device_type =3D "cpu"; + compatible =3D "arm,cortex-a55"; + reg =3D <0x0 0x100>; + enable-method =3D "psci"; + }; + + cpu2: cpu@200 { + device_type =3D "cpu"; + compatible =3D "arm,cortex-a55"; + reg =3D <0x0 0x200>; + enable-method =3D "psci"; + }; + + cpu3: cpu@300 { + device_type =3D "cpu"; + compatible =3D "arm,cortex-a55"; + reg =3D <0x0 0x300>; + enable-method =3D "psci"; + }; + + cpu4: cpu@400 { + device_type =3D "cpu"; + compatible =3D "arm,cortex-a55"; + reg =3D <0x0 0x400>; + enable-method =3D "psci"; + }; + + cpu5: cpu@500 { + device_type =3D "cpu"; + compatible =3D "arm,cortex-a55"; + reg =3D <0x0 0x500>; + enable-method =3D "psci"; + }; + + cpu6: cpu@600 { + device_type =3D "cpu"; + compatible =3D "arm,cortex-a78"; + reg =3D <0x0 0x600>; + enable-method =3D "psci"; + }; + + cpu7: cpu@700 { + device_type =3D "cpu"; + compatible =3D "arm,cortex-a78"; + reg =3D <0x0 0x700>; + enable-method =3D "psci"; + }; + }; + + timer { + compatible =3D "arm,armv8-timer"; + interrupts =3D , + , + , + ; + }; + + psci { + compatible =3D "arm,psci-1.0"; + method =3D "smc"; + }; + + xtal: xtal-clk { + compatible =3D "fixed-clock"; + clock-frequency =3D <24000000>; + clock-output-names =3D "xtal"; + #clock-cells =3D <0>; + }; + + soc { + compatible =3D "simple-bus"; + #address-cells =3D <2>; + #size-cells =3D <2>; + ranges; + + gic: interrupt-controller@ff800000 { + compatible =3D "arm,gic-v3"; + #interrupt-cells =3D <3>; + #address-cells =3D <0>; + interrupt-controller; + reg =3D <0x0 0xff800000 0 0x1000>, + <0x0 0xff840000 0 0x8000>; + interrupts =3D ; + }; + + aobus: bus@ffa00000 { + compatible =3D "simple-bus"; + reg =3D <0x0 0xffa00000 0x0 0x100000>; + #address-cells =3D <2>; + #size-cells =3D <2>; + ranges =3D <0x0 0x0 0x0 0xffa00000 0x0 0x100000>; + + uart_b: serial@1e000 { + compatible =3D "amlogic,a9-uart", + "amlogic,meson-s4-uart"; + reg =3D <0x0 0x1e000 0x0 0x18>; + interrupts =3D ; + clocks =3D <&xtal>, <&xtal>, <&xtal>; + clock-names =3D "xtal", "pclk", "baud"; + status =3D "disabled"; + }; + }; + }; +}; + --=20 2.52.0