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Wed, 04 Feb 2026 10:06:42 -0800 (PST) From: Biju X-Google-Original-From: Biju To: Geert Uytterhoeven , Magnus Damm , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Biju Das , linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Prabhakar Mahadev Lad , Biju Das Subject: [PATCH v2 9/9] arm64: dts: renesas: r9a08g046: Add ICU node Date: Wed, 4 Feb 2026 18:06:25 +0000 Message-ID: <20260204180632.249139-10-biju.das.jz@bp.renesas.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260204180632.249139-1-biju.das.jz@bp.renesas.com> References: <20260204180632.249139-1-biju.das.jz@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Biju Das Add interrupt control node to RZ/G3L ("R9A08G046") SoC DTSI and add icu as interrupt-parent of pincontrol. Signed-off-by: Biju Das --- This patch depend upon [1] [1] https://lore.kernel.org/linux-renesas-soc/20260203131048.421708-9-biju.= das.jz@bp.renesas.com/T/#u --- arch/arm64/boot/dts/renesas/r9a08g046.dtsi | 91 ++++++++++++++++++++++ 1 file changed, 91 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r9a08g046.dtsi b/arch/arm64/boot/d= ts/renesas/r9a08g046.dtsi index a92a4e07cc10..65dfa145ef59 100644 --- a/arch/arm64/boot/dts/renesas/r9a08g046.dtsi +++ b/arch/arm64/boot/dts/renesas/r9a08g046.dtsi @@ -188,6 +188,7 @@ pinctrl: pinctrl@11030000 { gpio-ranges =3D <&pinctrl 0 0 232>; interrupt-controller; #interrupt-cells =3D <2>; + interrupt-parent =3D <&icu>; clocks =3D <&cpg CPG_MOD R9A08G046_GPIO_HCLK>; power-domains =3D <&cpg>; resets =3D <&cpg R9A08G046_GPIO_RSTN>, @@ -196,6 +197,96 @@ pinctrl: pinctrl@11030000 { reset-names =3D "rstn", "port", "spare"; }; =20 + icu: interrupt-controller@11050000 { + compatible =3D "renesas,r9a08g046-irqc"; + #interrupt-cells =3D <2>; + #address-cells =3D <0>; + interrupt-controller; + reg =3D <0 0x11050000 0 0x10000>; + interrupts =3D , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + interrupt-names =3D "nmi", + "irq0", "irq1", "irq2", "irq3", + "irq4", "irq5", "irq6", "irq7", + "irq8", "irq9", "irq10", "irq11", + "irq12", "irq13", "irq14", "irq15", + "tint0", "tint1", "tint2", "tint3", + "tint4", "tint5", "tint6", "tint7", + "tint8", "tint9", "tint10", "tint11", + "tint12", "tint13", "tint14", "tint15", + "tint16", "tint17", "tint18", "tint19", + "tint20", "tint21", "tint22", "tint23", + "tint24", "tint25", "tint26", "tint27", + "tint28", "tint29", "tint30", "tint31", + "bus-err", "ec7tie1-0", "ec7tie2-0", "ec7tiovf-0", + "ovfunf0", "ovfunf1", "ovfunf2", "ovfunf3", + "ovfunf4", "ovfunf5", "ovfunf6", "ovfunf7"; + clocks =3D <&cpg CPG_MOD R9A08G046_IA55_CLK>, + <&cpg CPG_MOD R9A08G046_IA55_PCLK>; + clock-names =3D "clk", "pclk"; + power-domains =3D <&cpg>; + resets =3D <&cpg R9A08G046_IA55_RESETN>; + }; + dmac: dma-controller@11820000 { compatible =3D "renesas,r9a08g046-dmac", "renesas,rz-dmac"; reg =3D <0 0x11820000 0 0x10000>, --=20 2.43.0